Skip to content
GitLab
Menu
Projects
Groups
Snippets
Loading...
Help
Help
Support
Community forum
Keyboard shortcuts
?
Submit feedback
Contribute to GitLab
Sign in / Register
Toggle navigation
Menu
Open sidebar
ycai
simbricks
Commits
792075ed
Unverified
Commit
792075ed
authored
Sep 19, 2024
by
Jakob Görgen
Browse files
reversed changes reagrding default initialization of component interfaces
parent
74fcfa90
Changes
3
Hide whitespace changes
Inline
Side-by-side
Showing
3 changed files
with
4 additions
and
16 deletions
+4
-16
experiments/pyexps/netperf_sysconf.py
experiments/pyexps/netperf_sysconf.py
+0
-8
experiments/simbricks/orchestration/system/eth.py
experiments/simbricks/orchestration/system/eth.py
+2
-4
experiments/simbricks/orchestration/system/pcie.py
experiments/simbricks/orchestration/system/pcie.py
+2
-4
No files found.
experiments/pyexps/netperf_sysconf.py
View file @
792075ed
...
@@ -24,8 +24,6 @@ host0 = system.I40ELinuxHost(sys)
...
@@ -24,8 +24,6 @@ host0 = system.I40ELinuxHost(sys)
pcie0
=
system
.
PCIeHostInterface
(
host0
)
pcie0
=
system
.
PCIeHostInterface
(
host0
)
host0
.
add_if
(
pcie0
)
host0
.
add_if
(
pcie0
)
nic0
=
system
.
IntelI40eNIC
(
sys
)
nic0
=
system
.
IntelI40eNIC
(
sys
)
nic0_pci
=
system
.
PCIeDeviceInterface
(
nic0
)
nic0
.
add_if
(
nic0_pci
)
nic0
.
add_ipv4
(
'10.0.0.1'
)
nic0
.
add_ipv4
(
'10.0.0.1'
)
pcichannel0
=
system
.
PCIeChannel
(
pcie0
,
nic0
.
_pci_if
)
pcichannel0
=
system
.
PCIeChannel
(
pcie0
,
nic0
.
_pci_if
)
...
@@ -34,8 +32,6 @@ host1 = system.I40ELinuxHost(sys)
...
@@ -34,8 +32,6 @@ host1 = system.I40ELinuxHost(sys)
pcie1
=
system
.
PCIeHostInterface
(
host1
)
pcie1
=
system
.
PCIeHostInterface
(
host1
)
host1
.
add_if
(
pcie0
)
host1
.
add_if
(
pcie0
)
nic1
=
system
.
IntelI40eNIC
(
sys
)
nic1
=
system
.
IntelI40eNIC
(
sys
)
nic1_pci
=
system
.
PCIeDeviceInterface
(
nic1
)
nic1
.
add_if
(
nic1_pci
)
nic1
.
add_ipv4
(
'10.0.0.2'
)
nic1
.
add_ipv4
(
'10.0.0.2'
)
pcichannel1
=
system
.
PCIeChannel
(
pcie1
,
nic1
.
_pci_if
)
pcichannel1
=
system
.
PCIeChannel
(
pcie1
,
nic1
.
_pci_if
)
...
@@ -46,10 +42,6 @@ switch.add_if(netif0)
...
@@ -46,10 +42,6 @@ switch.add_if(netif0)
netif1
=
system
.
EthInterface
(
switch
)
netif1
=
system
.
EthInterface
(
switch
)
switch
.
add_if
(
netif1
)
switch
.
add_if
(
netif1
)
nic0_eth
=
system
.
EthInterface
(
nic0
)
nic0
.
add_if
(
nic0_eth
)
nic1_eth
=
system
.
EthInterface
(
nic1
)
nic1
.
add_if
(
nic1_eth
)
# create channels and connect the switch to the host nics
# create channels and connect the switch to the host nics
ethchannel0
=
system
.
EthChannel
(
switch
.
eth_ifs
[
0
],
nic0
.
_eth_if
)
ethchannel0
=
system
.
EthChannel
(
switch
.
eth_ifs
[
0
],
nic0
.
_eth_if
)
...
...
experiments/simbricks/orchestration/system/eth.py
View file @
792075ed
...
@@ -44,16 +44,14 @@ class EthSimpleNIC(base.Component):
...
@@ -44,16 +44,14 @@ class EthSimpleNIC(base.Component):
def
__init__
(
self
,
s
:
base
.
System
)
->
None
:
def
__init__
(
self
,
s
:
base
.
System
)
->
None
:
super
().
__init__
(
s
)
super
().
__init__
(
s
)
self
.
_ip
:
str
|
None
=
None
self
.
_ip
:
str
|
None
=
None
self
.
_eth_if
:
EthInterface
|
None
=
None
self
.
_eth_if
:
EthInterface
=
EthInterface
(
self
)
def
add_ipv4
(
self
,
ip
:
str
)
->
None
:
def
add_ipv4
(
self
,
ip
:
str
)
->
None
:
assert
self
.
_ip
is
None
assert
self
.
_ip
is
None
self
.
_ip
=
ip
self
.
_ip
=
ip
def
add_if
(
self
,
interface
:
EthInterface
)
->
None
:
def
add_if
(
self
,
interface
:
EthInterface
)
->
None
:
utils_base
.
has_expected_type
(
obj
=
interface
,
expected_type
=
EthInterface
)
raise
Exception
(
"EthSimpleNIC already has ethernet interface"
)
assert
self
.
_eth_if
is
None
self
.
_eth_if
=
interface
class
BaseEthNetComponent
(
base
.
Component
):
class
BaseEthNetComponent
(
base
.
Component
):
def
__init__
(
self
,
s
:
base
.
System
)
->
None
:
def
__init__
(
self
,
s
:
base
.
System
)
->
None
:
...
...
experiments/simbricks/orchestration/system/pcie.py
View file @
792075ed
...
@@ -56,12 +56,10 @@ class PCIeChannel(base.Channel):
...
@@ -56,12 +56,10 @@ class PCIeChannel(base.Channel):
class
PCIeSimpleDevice
(
base
.
Component
):
class
PCIeSimpleDevice
(
base
.
Component
):
def
__init__
(
self
,
s
:
base
.
System
):
def
__init__
(
self
,
s
:
base
.
System
):
super
().
__init__
(
s
)
super
().
__init__
(
s
)
self
.
_pci_if
:
PCIeDeviceInterface
|
None
=
None
self
.
_pci_if
:
PCIeDeviceInterface
=
PCIeDeviceInterface
(
self
)
def
interfaces
(
self
)
->
list
[
base
.
Interface
]:
def
interfaces
(
self
)
->
list
[
base
.
Interface
]:
return
[
self
.
_pci_if
]
return
[
self
.
_pci_if
]
def
add_if
(
self
,
interface
:
PCIeDeviceInterface
)
->
None
:
def
add_if
(
self
,
interface
:
PCIeDeviceInterface
)
->
None
:
utils_base
.
has_expected_type
(
obj
=
interface
,
expected_type
=
PCIeDeviceInterface
)
raise
Exception
(
"PCIeSimpleDevice already has PCI device interface"
)
assert
self
.
_pci_if
is
None
self
.
_pci_if
=
interface
\ No newline at end of file
Write
Preview
Markdown
is supported
0%
Try again
or
attach a new file
.
Attach a file
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Cancel
Please
register
or
sign in
to comment