Commits · 3322e26420bc9ea22c5033e9199cd9fb8be5f424 · OpenDAS / vllm_cscc

19 Mar, 2026 1 commit
- [Bugfix] Avoid more OpenMP thread reallocation in CPU torch compile (#37538) · 3322e264
  Li, Jiang authored Mar 19, 2026
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Signed-off-by: jiang1.li <jiang1.li@intel.com>
```
  3322e264
18 Mar, 2026 2 commits
- [Log] Reduce duplicate log (#37313) · c373b5c0
  Wentao Ye authored Mar 18, 2026
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Signed-off-by: yewentao256 <zhyanwentao@126.com>
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  c373b5c0
- [Bugfix] Avoid OpenMP thread reallocation in CPU torch compile (#37391) · 26180124
  Li, Jiang authored Mar 18, 2026
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Signed-off-by: jiang1.li <jiang1.li@intel.com>
```
  26180124
17 Mar, 2026 2 commits
- [ROCm] Validate block_size for explicitly selected attention backends (#36846) · 3ed7b1e6
  Andreas Karatzas authored Mar 17, 2026
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Signed-off-by: Andreas Karatzas <akaratza@amd.com>
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  3ed7b1e6
- [Perf] Set Flashinfer sparse MLA as default backend for FP8 kv cache (#37252) · b36adfa3
  Wei Zhao authored Mar 17, 2026
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Signed-off-by: wzhao18 <wzhao18.sz@gmail.com>
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  b36adfa3
16 Mar, 2026 1 commit
- [ROCm] Fix KV copy methods and auto-select attention backend for ROCm (#36845) · 911355e2
  Andreas Karatzas authored Mar 16, 2026
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Signed-off-by: Andreas Karatzas <akaratza@amd.com>
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  911355e2
15 Mar, 2026 1 commit

In-Tree AMD Zen CPU Backend via zentorch [1/N] (#35970) · 7acaea63

Lalithnarayan C authored Mar 16, 2026


Signed-off-by: Lalithnarayan C <Lalithnarayan.C@amd.com>
Signed-off-by: Tyler Michael Smith <tlrmchlsmth@gmail.com>
Co-authored-by: Chinmay-Kulkarni-AMD <Chinmay.Kulkarni@amd.com>
Co-authored-by: Tyler Michael Smith <tyler@neuralmagic.com>
Co-authored-by: Tyler Michael Smith <tlrmchlsmth@gmail.com>
Co-authored-by: Claude Sonnet 4.6 <noreply@anthropic.com>

7acaea63

14 Mar, 2026 1 commit

[UX] Improve UX of CPU backend (#36968) · 092ace9e

Li, Jiang authored Mar 14, 2026

Signed-off-by: jiang1.li <jiang1.li@intel.com>
Signed-off-by: Li, Jiang <bigpyj64@gmail.com>
Co-authored-by: gemini-code-assist[bot] <176961590+gemini-code-assist[bot]@users.noreply.github.com>

092ace9e

13 Mar, 2026 1 commit
- [XPU] Support LoRA via torch.compile on XPU platform (#36962) · 82f836d9
  Chaojun Zhang authored Mar 13, 2026
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Signed-off-by: chzhang <chaojun.zhang@intel.com>
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  82f836d9
11 Mar, 2026 4 commits
- [Bugfix][ROCm] Strip block_size before attention backend validation (#36274) · 428bc718
  jennyyyyzhen authored Mar 11, 2026
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Signed-off-by: jennyyyyzhen <yzhen@hmc.edu>
Co-authored-by: Lu Fang <30275821+houseroad@users.noreply.github.com>
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  428bc718
- Add XPU MLA Sparse backend for DeepSeek v3.2 (#33230) · e584dce5
  Wuxun Zhang authored Mar 11, 2026
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Signed-off-by: Zhang, Wuxun <wuxun.zhang@intel.com>
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  e584dce5
- platforms: Fix Ray DP startup crash (#36665) · 5353c9b0
  Itay Alroy authored Mar 11, 2026
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Signed-off-by: Itay Alroy <ialroy@nvidia.com>
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  5353c9b0
- feat: add RISC-V support for CPU backend (v2) (#36578) · 41846537
  typer-J authored Mar 11, 2026
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Signed-off-by: typer-J <2236066784@qq.com>
Co-authored-by: Li, Jiang <jiang1.li@intel.com>
```
  41846537
09 Mar, 2026 2 commits
- Reapply [Attention] Refactor `check_and_update_config` (#35122) · 77a73458
  Matthew Bonanni authored Mar 09, 2026
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Signed-off-by: Matthew Bonanni <mbonanni@redhat.com>
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  77a73458
- [MM Encoder] Default to use TORCH_SDPA backend for ViT on Volta/Turing GPU (#36472) · b0906d8b
  Isotr0py authored Mar 09, 2026
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Signed-off-by: Isotr0py <mozf@mail2.sysu.edu.cn>
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  b0906d8b
05 Mar, 2026 2 commits
- [ROCm] Refactor ROCm attention backend selection logic (#35246) · 8c760b6a
  Sage Moore authored Mar 05, 2026
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Signed-off-by: Sage Moore <sage@neuralmagic.com>
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  8c760b6a
- Add platform method to enable custom collective ops registration (#34760) · 792cbd64
  nkm-meta authored Mar 04, 2026
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Signed-off-by: Naina Kuruballi Mahesh <nainakm@meta.com>
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  792cbd64
03 Mar, 2026 2 commits
- [ROCm][Bugfix]: Disable AITER Triton ROPE by default (#35601) · 3a8eef58
  Rohan Potdar authored Mar 03, 2026
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Signed-off-by: Rohan138 <rohanpotdar138@gmail.com>
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  3a8eef58
- [XPU][NIXL] Add GPUDirect RDMA support for XPU (#35270) · 9dd656f0
  liuzhenwei authored Mar 03, 2026
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Signed-off-by: zhenwei-intel <zhenwei.liu@intel.com>
Co-authored-by: Kunshang Ji <kunshang.ji@intel.com>
```
  9dd656f0
28 Feb, 2026 3 commits

[ROCm] Derive device capability from GCN arch string without CUDA init (#35069) · 94029ffa
Andreas Karatzas authored Feb 27, 2026
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Signed-off-by: Andreas Karatzas <akaratza@amd.com>
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94029ffa

[1/N] Elastic EP Milestone 2 (#34861) · dea26833

Itay Alroy authored Feb 28, 2026


Signed-off-by: Yongji Wu <wuyongji317@gmail.com>
Signed-off-by: Itay Alroy <ialroy@nvidia.com>
Signed-off-by: Tyler Michael Smith <tlrmchlsmth@gmail.com>
Signed-off-by: Ron Tourgeman <rtourgeman@nvidia.com>
Co-authored-by: Yongji Wu <wuyongji317@gmail.com>
Co-authored-by: Tyler Michael Smith <tlrmchlsmth@gmail.com>
Co-authored-by: Ron Tourgeman <rtourgeman@nvidia.com>

dea26833

[CI/Build] CPU release supports both of AVX2 and AVX512 (#35466) · 90805ff4
Ma Jian authored Feb 28, 2026
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Signed-off-by: jiang1.li <jiang1.li@intel.com>
Co-authored-by: jiang1.li <jiang1.li@intel.com>
```
90805ff4

27 Feb, 2026 1 commit

Flashinfer cuDNN backend for Qwen3 VL ViT attention (#34580) · 9c3fe993

Max Hu authored Feb 27, 2026


Signed-off-by: Max Hu <maxhu@nvidia.com>
Signed-off-by: Max Hu <hyoung2991@gmail.com>
Co-authored-by: Max Hu <maxhu@nvidia.com>
Co-authored-by: Shang Wang <shangw@nvidia.com>

9c3fe993

26 Feb, 2026 2 commits

[ROCm] Add extra step in config initialization to populate custom ops before... · 6042e66c

Gregory Shtrasberg authored Feb 26, 2026


[ROCm] Add extra step in config initialization to populate custom ops before compilation config init (#34848)
Signed-off-by: Gregory Shtrasberg <Gregory.Shtrasberg@amd.com>

6042e66c

[BugFix][XPU] Fix speculative decoding on Intel XPU due to bug with... · a07c4c59

Ofir Zafrir authored Feb 26, 2026


[BugFix][XPU] Fix speculative decoding on Intel XPU due to bug with `IGC_ForceOCLSIMDWidth=16` (#35298)
Signed-off-by: Ofir Zafrir <ofir.zafrir@intel.com>
Co-authored-by: Kunshang Ji <kunshang.ji@intel.com>

a07c4c59

25 Feb, 2026 3 commits

[XPU]Support CUDAGraph on XPU Platform (#34482) · 35d44b45

Xinyu Chen authored Feb 25, 2026


Signed-off-by: Xinyu Chen <xinyu1.chen@intel.com>
Co-authored-by: chzhang <chaojun.zhang@intel.com>
Co-authored-by: zhenwei-intel <zhenwei.liu@intel.com>
Co-authored-by: Kunshang Ji <kunshang.ji@intel.com>

35d44b45

[Platform] Add current_platform.num_compute_units interface (#35042) · 8ad54a99
Kunshang Ji authored Feb 25, 2026
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Signed-off-by: Kunshang Ji <kunshang.ji@intel.com>
Signed-off-by: Kunshang Ji <jikunshang95@gmail.com>
```
8ad54a99
[ROCm]: Enable customop and rope+kvcache fusion for AITER RoPE (#35180) · f38f8c97
Rohan Potdar authored Feb 24, 2026
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Signed-off-by: Rohan138 <rohanpotdar138@gmail.com>
```
f38f8c97

23 Feb, 2026 1 commit
- [XPU] allow TORCH_SDPA/TRITON_ATTN as XPU vit Backend (#35010) · b1b5e045
  Yan Ma authored Feb 23, 2026
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Signed-off-by: Yan Ma <yan.ma@intel.com>
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  b1b5e045
21 Feb, 2026 1 commit
- [ROCm] Enable bitsandbytes quantization support on ROCm (#34688) · 8dc8a99b
  BADAOUI Abdennacer authored Feb 21, 2026
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Signed-off-by: badaoui <abdennacerbadaoui0@gmail.com>
```
  8dc8a99b
20 Feb, 2026 1 commit
- [CI] Revert PRs 34818 and 33600 (#34979) · aaefc58e
  Lucas Wilkinson authored Feb 20, 2026
  
  aaefc58e
19 Feb, 2026 1 commit

[Bugfix] Fix Basic Models Test (#34818) · 662205d3

Matthew Bonanni authored Feb 19, 2026


Signed-off-by: Matthew Bonanni <mbonanni@redhat.com>
Co-authored-by: Robert Shaw <114415538+robertgshaw2-redhat@users.noreply.github.com>

662205d3

18 Feb, 2026 2 commits
- [Renderer] Deprecate code paths for old input processing (#34775) · a766b303
  Cyrus Leung authored Feb 18, 2026
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Signed-off-by: DarkLight1337 <tlleungac@connect.ust.hk>
```
  a766b303
- [Attention] Refactor `check_and_update_config` (#33600) · 77431529
  Matthew Bonanni authored Feb 17, 2026
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Signed-off-by: Matthew Bonanni <mbonanni@redhat.com>
```
  77431529
17 Feb, 2026 1 commit
- [Renderer] Move InputPreprocessor into Renderer (2/2) (#34560) · 574fe752
  Cyrus Leung authored Feb 17, 2026
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Signed-off-by: DarkLight1337 <tlleungac@connect.ust.hk>
```
  574fe752
15 Feb, 2026 1 commit
- [MM Encoder] Add Triton ViT attention backend (#32183) · 71cd8926
  Isotr0py authored Feb 15, 2026
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Signed-off-by: Isotr0py <mozf@mail2.sysu.edu.cn>
```
  71cd8926
12 Feb, 2026 1 commit

[Attention] Add FlashInfer Sparse MLA backend (#33451) · f2c47886

Matthew Bonanni authored Feb 12, 2026


Signed-off-by: Matthew Bonanni <mbonanni@redhat.com>
Signed-off-by: Lucas Wilkinson <lwilkins@redhat.com>
Co-authored-by: Lucas Wilkinson <lwilkins@redhat.com>
Co-authored-by: Lucas Wilkinson <LucasWilkinson@users.noreply.github.com>

f2c47886

11 Feb, 2026 2 commits
- [Docs] Reduce time spent generating API docs (#34255) · 40b8f553
  Harry Mellor authored Feb 11, 2026
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Signed-off-by: Harry Mellor <19981378+hmellor@users.noreply.github.com>
```
  40b8f553
- [XPU][9/N] clean up existing ipex code/doc (#34111) · cb9574eb
  Kunshang Ji authored Feb 11, 2026
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Signed-off-by: Kunshang Ji <kunshang.ji@intel.com>
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  cb9574eb
10 Feb, 2026 1 commit
- [ROCm][Bugfix] Resolve Dynamo tracing crash from amdsmi calls in on_gfx* arch detection (#34108) · 4cde2e01
  Andreas Karatzas authored Feb 09, 2026
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Signed-off-by: Andreas Karatzas <akaratza@amd.com>
```
  4cde2e01