1. 08 May, 2022 1 commit
    • Illia Silin's avatar
      Add Benchmark test into CI (#226) · a3c910ac
      Illia Silin authored
      
      
      * add performance test to jenkins pipeline
      
      * fix typo
      
      * fix the syntax in conv_fwd_util.cpp
      
      * fix the error message syntax spacing
      
      * fix the error message syntax spacing again
      
      * run profile_gemm and archive results
      
      * fix typo
      
      * try to figure out the paths
      
      * try to figure out the paths one more time
      
      * skip the copying step
      
      * build ckProfiler release only once
      
      * change directory using dir
      
      * fix dir syntax
      
      * change the gemm parameters
      
      * do not pipe script output to file
      
      * try running ckProfiler directly
      
      * fix typo
      
      * use set +e
      
      * run profile_gemm.sh || true
      
      * run multiple gemms and parse results
      
      * fix typo in jenkinsfile
      
      * fix syntax
      
      * add new gemm sizes, update scripts
      
      * put all jenkins steps in original order
      Co-authored-by: default avatarChao Liu <chao.liu2@amd.com>
      Co-authored-by: default avatarChao Liu <lc.roy86@gmail.com>
      a3c910ac
  2. 24 Nov, 2021 1 commit
  3. 15 Nov, 2021 1 commit
    • Chao Liu's avatar
      FP16 data in-register transpose (#41) · b491ebf3
      Chao Liu authored
      * start fixing 16bit data packing
      
      * adding StaticTensor
      
      * adding StaticTensor
      
      * adding StaticTensor
      
      * add missing constexpr
      
      * adding static tensor
      
      * adding static tensor
      
      * adding transpose
      
      * add inline asm for transpose 2x2 of half_t
      
      * add general transpose_vectors(), but have unnecessary register initialization using v_mov
      
      * fix unnecessary register initialization in transpose_vector by using more pass-by-reference
      
      * add hardcoded logic for NHWC wrw
      
      * improve asm for v_pack
      
      * make ThreadwiseTensorSliceTransfer_v3r2 support any tensor
      
      * tweak
      
      * reorganize file
      b491ebf3