- 01 Jun, 2020 4 commits
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Thomas Trummer authored
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peastman authored
Silence warning about casting 'int' to 'void*' on x64 for msvc
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peastman authored
Improvements for ARM64 vector implementation
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Thomas Trummer authored
Cast 'int' to an integer with the same size as a pointer before casting to a 'void*' (fixes warning C4312: 'type cast': conversion from 'int' to 'void *' of greater size).
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- 29 May, 2020 4 commits
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peastman authored
Replace NULL with nullptr when adding kernel arguments
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Thomas Trummer authored
This ensures that the correct argument size is used when calling clSetKernelArg.
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peastman authored
Fix invalid call to __host__ function in computeBondedForces
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peastman authored
Added Integrator.setIntegrationForceGroups()
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- 28 May, 2020 3 commits
- 27 May, 2020 3 commits
- 26 May, 2020 1 commit
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peastman authored
Cpu generic vector test
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- 25 May, 2020 1 commit
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Thomas Trummer authored
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- 24 May, 2020 8 commits
- 22 May, 2020 6 commits
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peastman authored
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peastman authored
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Thomas Trummer authored
Explicitly cast the second parameter to the type of the first one so the compiler can pick an overload that is supported in device code (fixes error: calling a __host__ function("fmin<float, int, (int)0> ") from a __global__ function("computeBondedForces") is not allowed). -
peastman authored
Removed name of variadic argument list
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Daniel Towner authored
This helps pave the way to test wider SIMD ISAs, such as AVX-512.
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Thomas Trummer authored
Naming the argument list of a variadic macro is a GNU extension which is not supported by msvc. Since CUDA uses the system preprocessor this will fail to build kernels on Windows (fixes error C2010: '.': unexpected in macro parameter list).
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- 21 May, 2020 2 commits
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peastman authored
Replaced alternative spelling of not-operator with '!'
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Thomas Trummer authored
This is required by msvc when standard conformance mode is not enabled (DrudeNoseHooverIntegratorProxy.cpp(53): error C2065: 'not': undeclared identifier).
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- 19 May, 2020 1 commit
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peastman authored
Bug fix in periodic spline filter (solves #2627)
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- 18 May, 2020 2 commits
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peastman authored
CPU: Widen mask for exclusion bits (#2676)
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Daniel Towner authored
The exclusion mask was 8-bits wide, but future CPU support will require more bits than this (e.g., AVX-512 will be 16-bit).
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- 11 May, 2020 1 commit
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Thomas Trummer authored
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- 06 May, 2020 2 commits
- 05 May, 2020 1 commit
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peastman authored
* Fixed OpenCL compiler errors * Fixed incorrect references to BAOAB * Fixed a method that was incorrectly made public
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- 04 May, 2020 1 commit
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Andy Simmonett authored
* Convert Nose-Hoover into LF middle scheme by copying NH kernels * Rebrand VelocityVerletIntegrator as NoseHooverIntegrator * Consolidate NH tests * NoseHooverChainKernel begone * Make Windows builds happy * Add missing header for Windows build * Fix mistake in CommonKernels header * Add 6th Yoshida-Suzuki and make it the default
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