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tsoc
openmm
Commits
ad61d016
Commit
ad61d016
authored
Mar 28, 2020
by
Marc Marí
Browse files
Update TargetArch.cmake to support modern ARM architectures
Add __ARM64__ to differentiate between 32 and 64 bit ARM
parent
691ee619
Changes
2
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2 changed files
with
33 additions
and
9 deletions
+33
-9
CMakeLists.txt
CMakeLists.txt
+5
-1
cmake_modules/TargetArch.cmake
cmake_modules/TargetArch.cmake
+28
-8
No files found.
CMakeLists.txt
View file @
ad61d016
...
@@ -41,7 +41,11 @@ if ("${TARGET_ARCH}" MATCHES "x86_64|i386")
...
@@ -41,7 +41,11 @@ if ("${TARGET_ARCH}" MATCHES "x86_64|i386")
endif
()
endif
()
if
(
"
${
TARGET_ARCH
}
"
MATCHES
"arm"
)
if
(
"
${
TARGET_ARCH
}
"
MATCHES
"arm"
)
set
(
ARM ON
)
set
(
ARM ON
)
add_compile_definitions
(
__ARM__=1
)
if
(
"
${
TARGET_ARCH
}
"
MATCHES
"armv8"
)
add_compile_definitions
(
__ARM64__=1
)
else
()
add_compile_definitions
(
__ARM__=1
)
endif
()
endif
()
endif
()
if
(
"
${
TARGET_ARCH
}
"
MATCHES
"ppc"
)
if
(
"
${
TARGET_ARCH
}
"
MATCHES
"ppc"
)
set
(
PPC ON
)
set
(
PPC ON
)
...
...
cmake_modules/TargetArch.cmake
View file @
ad61d016
...
@@ -24,19 +24,40 @@
...
@@ -24,19 +24,40 @@
# OF THE POSSIBILITY OF SUCH DAMAGE.
# OF THE POSSIBILITY OF SUCH DAMAGE.
# Based on the Qt 5 processor detection code, so should be very accurate
# Based on the Qt 5 processor detection code, so should be very accurate
# https://
qt.gitorious.org
/qt/qtbase/blob
s/master
/src/corelib/global/qprocessordetection.h
# https://
github.com
/qt/qtbase/blob
/9a6a847
/src/corelib/global/qprocessordetection.h
# Currently handles arm (v5, v6, v7), x86 (32/64), ia64, and ppc (32/64)
# Currently handles arm
/ aarch64
(v5, v6, v7
, v8
), x86 (32/64), ia64, and ppc (32/64)
# Regarding POWER/PowerPC, just as is noted in the Qt source,
# Regarding POWER/PowerPC, just as is noted in the Qt source,
# "There are many more known variants/revisions that we do not handle/detect."
# "There are many more known variants/revisions that we do not handle/detect."
set
(
archdetect_c_code
"
set
(
archdetect_c_code
"
#if defined(__arm__) || defined(__TARGET_ARCH_ARM)
#define _STR(x) #x
#if defined(__ARM_ARCH_7__)
\\
#define STR(x) _STR(x)
#if defined(__arm__) || defined(__TARGET_ARCH_ARM) || defined(_M_ARM) ||
\\
defined(_M_ARM64) || defined(__aarch64__) || defined(__ARM64__)
#if defined(__ARM_ARCH) && __ARM_ARCH > 1
#pragma message
\"
cmake_ARCH armv
\"
STR(__ARM_ARCH)
#error
#elif defined(__TARGET_ARCH_ARM) && __TARGET_ARCH_ARM > 1
#pragma message
\"
cmake_ARCH armv
\"
STR(__TARGET_ARCH_ARM)
#error
#elif defined(_M_ARM) && _M_ARM > 1
#error cmake_ARCH arm ## __M_ARM
#elif defined(__ARM64_ARCH_8__)
\\
|| defined(__aarch64__)
\\
|| defined(__ARMv8__)
\\
|| defined(__ARMv8_A__)
\\
|| defined(_M_ARM64)
#error cmake_ARCH armv8
#elif defined(__ARM_ARCH_7__)
\\
|| defined(__ARM_ARCH_7A__)
\\
|| defined(__ARM_ARCH_7A__)
\\
|| defined(__ARM_ARCH_7R__)
\\
|| defined(__ARM_ARCH_7R__)
\\
|| defined(__ARM_ARCH_7M__)
\\
|| defined(__ARM_ARCH_7M__)
\\
|| (defined(__TARGET_ARCH_ARM) && __TARGET_ARCH_ARM-0 >= 7)
|| defined(__ARM_ARCH_7S__)
\\
|| defined(_ARM_ARCH_7)
\\
|| defined(__CORE_CORTEXA__)
#error cmake_ARCH armv7
#error cmake_ARCH armv7
#elif defined(__ARM_ARCH_6__)
\\
#elif defined(__ARM_ARCH_6__)
\\
|| defined(__ARM_ARCH_6J__)
\\
|| defined(__ARM_ARCH_6J__)
\\
...
@@ -44,11 +65,10 @@ set(archdetect_c_code "
...
@@ -44,11 +65,10 @@ set(archdetect_c_code "
|| defined(__ARM_ARCH_6Z__)
\\
|| defined(__ARM_ARCH_6Z__)
\\
|| defined(__ARM_ARCH_6K__)
\\
|| defined(__ARM_ARCH_6K__)
\\
|| defined(__ARM_ARCH_6ZK__)
\\
|| defined(__ARM_ARCH_6ZK__)
\\
|| defined(__ARM_ARCH_6M__)
\\
|| defined(__ARM_ARCH_6M__)
|| (defined(__TARGET_ARCH_ARM) && __TARGET_ARCH_ARM-0 >= 6)
#error cmake_ARCH armv6
#error cmake_ARCH armv6
#elif defined(__ARM_ARCH_5TEJ__)
\\
#elif defined(__ARM_ARCH_5TEJ__)
\\
||
(
defined(__
T
AR
GET
_ARCH_
ARM) && __TARGET_ARCH_ARM-0 >= 5
)
|| defined(__AR
M
_ARCH_
5TE__
)
#error cmake_ARCH armv5
#error cmake_ARCH armv5
#else
#else
#error cmake_ARCH arm
#error cmake_ARCH arm
...
...
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