Commit cc7fcbbb authored by chenych's avatar chenych
Browse files

Modify deepspeed multi nodes

parent ab643c4f
10.5.32.245 slots=8
10.5.32.246 slots=8
\ No newline at end of file
...@@ -2,8 +2,9 @@ ...@@ -2,8 +2,9 @@
export HSA_FORCE_FINE_GRAIN_PCIE=1 export HSA_FORCE_FINE_GRAIN_PCIE=1
MASTER_ADDR='' MASTER_ADDR=''
# 多机多卡+deepspeed # 多机多卡+deepspeed
deepspeed --hostfile=./hostfile \ deepspeed --hostfile=/path/of/hostfile \
--num_nodes 2 \ --num_nodes 2 \
--master_addr $MASTER_ADDR \ --master_addr $MASTER_ADDR \
--master_port 12345 \ --master_port 12345 \
...@@ -20,10 +21,10 @@ deepspeed --hostfile=./hostfile \ ...@@ -20,10 +21,10 @@ deepspeed --hostfile=./hostfile \
--overwrite_cache \ --overwrite_cache \
--overwrite_output_dir \ --overwrite_output_dir \
--cutoff_len 8192 \ --cutoff_len 8192 \
--preprocessing_num_workers 1 \ --preprocessing_num_workers 16 \
--per_device_train_batch_size 1 \ --per_device_train_batch_size 1 \
--per_device_eval_batch_size 1 \ --per_device_eval_batch_size 1 \
--gradient_accumulation_steps 1 \ --gradient_accumulation_steps 8 \
--lr_scheduler_type cosine \ --lr_scheduler_type cosine \
--logging_steps 10 \ --logging_steps 10 \
--warmup_steps 20 \ --warmup_steps 20 \
......
NCCL_SOCKET_IFNAME=ens38f0
NCCL_IB_DISABLE=1
HSA_FORCE_FINE_GRAIN_PCIE=1
MIOPEN_COMPILE_PARALLEL_LEVEL=1
NCCL_PATH=/opt/dtk/rccl
NCCL_DEBUG=DEBUG
10.5.32.245 slots=8
10.5.32.246 slots=8
\ No newline at end of file
...@@ -6,7 +6,7 @@ export HSA_FORCE_FINE_GRAIN_PCIE=1 ...@@ -6,7 +6,7 @@ export HSA_FORCE_FINE_GRAIN_PCIE=1
MASTER_ADDR='' MASTER_ADDR=''
# LoRA + 多机多卡 + deepspeed # LoRA + 多机多卡 + deepspeed
deepspeed --hostfile=./hostfile \ deepspeed --hostfile=/path/of/hostfile \
--num_nodes 2 \ --num_nodes 2 \
--master_addr $MASTER_ADDR \ --master_addr $MASTER_ADDR \
--master_port 12345 \ --master_port 12345 \
......
node1 slots=8
node2 slots=8
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