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Unverified Commit a1404f06 authored by Vineeth's avatar Vineeth Committed by GitHub
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fix: sp, req order (#3303)

parent 8616a284
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lm_eval/models/vllm_causallms.py
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...@@ -419,7 +419,7 @@ class VLLM(TemplateLM): ...@@ -419,7 +419,7 @@ class VLLM(TemplateLM):
procs, resq = [], Queue() procs, resq = [], Queue()
# We use Process as it is non-daemonic # We use Process as it is non-daemonic
try: try:
for rank, (sp, req) in enumerate(zip(requests, sampling_params)): for rank, (req, sp) in enumerate(zip(requests, sampling_params)):
proc = Process( proc = Process(
target=_vllm_mp_worker, target=_vllm_mp_worker,
args=( args=(
......
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