fix: sp, req order (#3303)

a1404f06 · Vineeth · GitHub · 8616a284 · a1404f06
Unverified Commit a1404f06 authored Oct 02, 2025 by Vineeth Committed by GitHub Oct 02, 2025
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lm_eval/models/vllm_causallms.py lm_eval/models/vllm_causallms.py +1 -1

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--- a/lm_eval/models/vllm_causallms.py
+++ b/lm_eval/models/vllm_causallms.py
@@ -419,7 +419,7 @@ class VLLM(TemplateLM):
            procs, resq = [], Queue()
            # We use Process as it is non-daemonic
            try:
-                for rank, (sp, req) in enumerate(zip(requests, sampling_params)):
+                for rank, (req, sp) in enumerate(zip(requests, sampling_params)):
                    proc = Process(
                        target=_vllm_mp_worker,
                        args=(