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gaoqiong
composable_kernel_ROCM
Commits
2463a221
"git@developer.sourcefind.cn:gaoqiong/composable_kernel.git" did not exist on "2ec3f4c3f675c3a67229b0fc88ab5e0d4455f195"
Commit
2463a221
authored
Sep 21, 2024
by
danyao12
Browse files
code revert
parent
78f33529
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-7
example/ck_tile/01_fmha/codegen/ops/fmha_bwd.py
example/ck_tile/01_fmha/codegen/ops/fmha_bwd.py
+7
-7
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example/ck_tile/01_fmha/codegen/ops/fmha_bwd.py
View file @
2463a221
...
@@ -788,14 +788,14 @@ class FmhaBwdDQDKDVKernel:
...
@@ -788,14 +788,14 @@ class FmhaBwdDQDKDVKernel:
def
get_fmha_bwd_dq_dk_dv_tile_ppl_dict_from_dtype
(
dtype
:
str
)
->
Optional
[
dict
]:
def
get_fmha_bwd_dq_dk_dv_tile_ppl_dict_from_dtype
(
dtype
:
str
)
->
Optional
[
dict
]:
if
dtype
==
'fp16'
or
dtype
==
'bf16'
:
if
dtype
==
'fp16'
or
dtype
==
'bf16'
:
return
{
return
{
#
'32' : [FmhaBwdDQDKDVTileSize( 32, 128, 32, 32, 32, 32, 64, 32, 32, 1, 4, 1, 4, 1, 1, 2, 2, 1, 16, 16, 32, 16, 16, 16, 1),
'32'
:
[
FmhaBwdDQDKDVTileSize
(
32
,
128
,
32
,
32
,
32
,
32
,
64
,
32
,
32
,
1
,
4
,
1
,
4
,
1
,
1
,
2
,
2
,
1
,
16
,
16
,
32
,
16
,
16
,
16
,
1
),
#
"kr_ktr_vr_iglp", "kr_ktr_vr"],
"kr_ktr_vr_iglp"
,
"kr_ktr_vr"
],
#
'64' : [FmhaBwdDQDKDVTileSize( 32, 128, 64, 32, 64, 32, 32, 64, 64, 1, 4, 1, 4, 1, 1, 1, 4, 1, 16, 16, 32, 16, 16, 16, 1),
'64'
:
[
FmhaBwdDQDKDVTileSize
(
32
,
128
,
64
,
32
,
64
,
32
,
32
,
64
,
64
,
1
,
4
,
1
,
4
,
1
,
1
,
1
,
4
,
1
,
16
,
16
,
32
,
16
,
16
,
16
,
1
),
#
"kr_ktr_vr_iglp", "kr_ktr_vr"],
"kr_ktr_vr_iglp"
,
"kr_ktr_vr"
],
'128'
:
[
FmhaBwdDQDKDVTileSize
(
16
,
128
,
128
,
16
,
128
,
16
,
32
,
128
,
128
,
1
,
4
,
1
,
4
,
1
,
1
,
1
,
4
,
1
,
16
,
16
,
32
,
16
,
16
,
16
,
1
),
'128'
:
[
FmhaBwdDQDKDVTileSize
(
16
,
128
,
128
,
16
,
128
,
16
,
32
,
128
,
128
,
1
,
4
,
1
,
4
,
1
,
1
,
1
,
4
,
1
,
16
,
16
,
32
,
16
,
16
,
16
,
1
),
"kr_ktr_vr_iglp"
,
"kr_ktr_vr"
],
"kr_ktr_vr_iglp"
,
"kr_ktr_vr"
],
#
'256' : [FmhaBwdDQDKDVTileSize( 16, 64, 256, 16, 256, 16, 32, 256, 256, 1, 4, 1, 4, 1, 1, 1, 4, 1, 16, 16, 32, 16, 16, 16, 1),
'256'
:
[
FmhaBwdDQDKDVTileSize
(
16
,
64
,
256
,
16
,
256
,
16
,
32
,
256
,
256
,
1
,
4
,
1
,
4
,
1
,
1
,
1
,
4
,
1
,
16
,
16
,
32
,
16
,
16
,
16
,
1
),
#
"kr_ktr_vr_iglp", "kr_ktr_vr"]
"kr_ktr_vr_iglp"
,
"kr_ktr_vr"
]
}
}
else
:
else
:
return
None
return
None
...
@@ -838,7 +838,7 @@ def get_bwd_dq_dk_dv_blobs(kernel_filter : Optional[str], receipt, mask_impl) ->
...
@@ -838,7 +838,7 @@ def get_bwd_dq_dk_dv_blobs(kernel_filter : Optional[str], receipt, mask_impl) ->
continue
continue
if
receipt
==
3
:
if
receipt
==
3
:
cond
=
dtype
in
[
'fp16'
,
'bf16'
]
cond
=
dtype
in
[
'fp16'
,
'bf16'
]
cond
&=
bias
in
[
'no'
]
cond
&=
bias
in
[
'no'
,
'alibi'
]
cond
&=
dpad
==
dvpad
cond
&=
dpad
==
dvpad
cond
&=
deterministic
==
"f"
cond
&=
deterministic
==
"f"
if
not
cond
:
if
not
cond
:
...
...
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