fixed segm fault caused by a typo in creating a/b_grid_desc

include/ck/tensor_operation/gpu/device/device_gemm_xdl_splitk_c_shuffle.hpp

@@ -586,8 +586,8 @@ struct DeviceGemmXdlSplitKCShuffle
             const auto AKSplitted = AKPad / k_batch;
             const auto BKSplitted = BKPad / k_batch;
 
-            a_grid_desc_ak0_m_ak1_ = DeviceOp::MakeAGridDescriptor_AK0_M_AK1(MRaw, AKPad, StrideA);
-            b_grid_desc_bk0_n_bk1_ = DeviceOp::MakeBGridDescriptor_BK0_N_BK1(BKPad, NRaw, StrideB);
+            a_grid_desc_ak0_m_ak1_ = DeviceOp::MakeAGridDescriptor_AK0_M_AK1(MRaw, AKSplitted, StrideA);
+            b_grid_desc_bk0_n_bk1_ = DeviceOp::MakeBGridDescriptor_BK0_N_BK1(BKSplitted, NRaw, StrideB);
             c_grid_desc_m_n_       = DeviceOp::MakeCGridDescriptor_M_N(MRaw, NRaw, StrideC);
 
             if(GridwiseGemm::CheckValidity(
@@ -626,6 +626,19 @@ struct DeviceGemmXdlSplitKCShuffle
 
                 block_2_ctile_map_ = MakeBlock2CTileMap(BatchCount_, c_grid_desc_m_n_, 1, 1);
             }
+
+
+            for(int batch=0; batch<BatchCount_; ++batch)
+            {
+                printf("batch = %d, ptr_offset = [%ld, %ld, %ld]\n", batch, compute_ptr_offset_of_batch_.GetAPtrOffset(batch), compute_ptr_offset_of_batch_.GetBPtrOffset(batch), compute_ptr_offset_of_batch_.GetCPtrOffset(batch));
+            }
+            const index_t grid_size =
+                GridwiseGemm::CalculateGridSize(c_grid_desc_m_n_) * BatchCount_;
+            for (int blk=0; blk<grid_size; ++blk)
+            {
+                const auto ctile_idx = block_2_ctile_map_.CalculateBottomIndex(make_multi_index(blk));
+                printf("blk= %d, ctile_idx = [%d, %d]\n", blk, ctile_idx[I0], ctile_idx[I1]);
+            }
         }
 
         //  private:

test/CMakeLists.txt

@@ -45,4 +45,3 @@ add_subdirectory(grouped_gemm)
 add_subdirectory(convnd_fwd)
 add_subdirectory(reduce)
 add_subdirectory(conv2d_bwd_weight)
-add_subdirectory(fp16_transfer_bf16)
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