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ycai
simbricks
Commits
f7218669
Commit
f7218669
authored
Jun 24, 2024
by
Hejing Li
Committed by
Jonas Kaufmann
Aug 20, 2024
Browse files
impl.py: add base host class
parent
1d352026
Changes
1
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1 changed file
with
35 additions
and
20 deletions
+35
-20
experiments/simbricks/splitsim/impl.py
experiments/simbricks/splitsim/impl.py
+35
-20
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experiments/simbricks/splitsim/impl.py
View file @
f7218669
...
@@ -146,39 +146,24 @@ class I40eNicSim(NICSim):
...
@@ -146,39 +146,24 @@ class I40eNicSim(NICSim):
return
self
.
basic_run_cmd
(
env
,
'/i40e_bm/i40e_bm'
)
return
self
.
basic_run_cmd
(
env
,
'/i40e_bm/i40e_bm'
)
class
Gem5
Sim
(
Simulator
):
class
Host
Sim
(
Simulator
):
def
__init__
(
self
,
e
:
exp
.
Experiment
):
def
__init__
(
self
,
e
:
exp
.
Experiment
):
super
().
__init__
(
e
)
super
().
__init__
(
e
)
self
.
experiment
=
e
self
.
experiment
=
e
self
.
hosts
:
tp
.
List
[
spec
.
Host
]
=
[]
self
.
hosts
:
tp
.
List
[
spec
.
Host
]
=
[]
self
.
nics
:
tp
.
List
[
spec
.
NIC
]
=
[]
# need to change type of list to PCI dev
self
.
pcidevs
:
tp
.
List
[
spec
.
NIC
]
=
[]
# move it to add
self
.
sync_period
=
500
self
.
sync_period
=
500
"""Period in nanoseconds of sending synchronization messages from this
"""Period in nanoseconds of sending synchronization messages from this
device to connected components."""
device to connected components."""
self
.
pci_latency
=
500
self
.
pci_latency
=
500
self
.
name
=
''
self
.
cpu_type_cp
=
'X86KvmCPU'
self
.
cpu_type
=
'TimingSimpleCPU'
self
.
extra_main_args
=
[]
self
.
extra_config_args
=
[]
self
.
variant
=
'fast'
self
.
modify_checkpoint_tick
=
True
self
.
wait
=
True
self
.
wait
=
True
def
full_name
(
self
)
->
str
:
def
full_name
(
self
)
->
str
:
return
'host.'
+
self
.
name
return
'host.'
+
self
.
name
def
resreq_cores
(
self
)
->
int
:
return
1
def
resreq_mem
(
self
)
->
int
:
return
4096
def
dependencies
(
self
)
->
tp
.
List
[
Simulator
]:
def
dependencies
(
self
)
->
tp
.
List
[
Simulator
]:
deps
=
[]
deps
=
[]
for
h
in
self
.
hosts
:
for
h
in
self
.
hosts
:
...
@@ -188,12 +173,42 @@ class Gem5Sim(Simulator):
...
@@ -188,12 +173,42 @@ class Gem5Sim(Simulator):
def
add
(
self
,
host
:
spec
.
Host
):
def
add
(
self
,
host
:
spec
.
Host
):
self
.
hosts
.
append
(
host
)
self
.
hosts
.
append
(
host
)
self
.
nic
s
=
host
.
nics
self
.
pcidev
s
=
host
.
nics
host
.
sim
=
self
host
.
sim
=
self
self
.
name
=
f
'
{
self
.
hosts
[
0
].
id
}
'
self
.
name
=
f
'
{
self
.
hosts
[
0
].
id
}
'
self
.
sync_period
=
host
.
sync_period
self
.
pci_latency
=
host
.
pci_channel
.
latency
self
.
experiment
.
add_host
(
self
)
self
.
experiment
.
add_host
(
self
)
def
wait_terminate
(
self
)
->
bool
:
return
self
.
wait
class
Gem5Sim
(
HostSim
):
def
__init__
(
self
,
e
:
exp
.
Experiment
):
super
().
__init__
(
e
)
self
.
experiment
=
e
self
.
name
=
''
self
.
cpu_type_cp
=
'X86KvmCPU'
self
.
cpu_type
=
'TimingSimpleCPU'
self
.
extra_main_args
=
[]
self
.
extra_config_args
=
[]
self
.
variant
=
'fast'
self
.
modify_checkpoint_tick
=
True
self
.
wait
=
True
def
full_name
(
self
)
->
str
:
return
'host.'
+
self
.
name
def
resreq_cores
(
self
)
->
int
:
return
1
def
resreq_mem
(
self
)
->
int
:
return
4096
def
prep_cmds
(
self
,
env
:
ExpEnv
)
->
tp
.
List
[
str
]:
def
prep_cmds
(
self
,
env
:
ExpEnv
)
->
tp
.
List
[
str
]:
cmds
=
[
f
'mkdir -p
{
env
.
gem5_cpdir
(
self
)
}
'
]
cmds
=
[
f
'mkdir -p
{
env
.
gem5_cpdir
(
self
)
}
'
]
...
@@ -228,7 +243,7 @@ class Gem5Sim(Simulator):
...
@@ -228,7 +243,7 @@ class Gem5Sim(Simulator):
)
)
for
dev
in
self
.
nic
s
:
for
dev
in
self
.
pcidev
s
:
cmd
+=
(
cmd
+=
(
f
'--simbricks-pci=connect:
{
env
.
dev_pci_path
(
dev
.
sim
)
}
'
f
'--simbricks-pci=connect:
{
env
.
dev_pci_path
(
dev
.
sim
)
}
'
f
':latency=
{
self
.
pci_latency
}
ns'
f
':latency=
{
self
.
pci_latency
}
ns'
...
...
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