paper_data: add netperf data

results/paper_data/netperf/netperf-gem5-ns3-cd_bm-1.json

+{"exp_name": "netperf-gem5-ns3-cd_bm", "start_time": 1606839840.8573704, "end_time": 1606882079.3425865, "sims": {"nic.server.0.": {"class": "CorundumBMNIC", "cmd": ["/home/hejingli/endhostsim-code/corundum_bm/corundum_bm", "/local/var/tmp/hejing-work/netperf-gem5-ns3-cd_bm/1/nic.pci.server.0.", "/local/var/tmp/hejing-work/netperf-gem5-ns3-cd_bm/1/nic.eth.server.0.", "/local/var/tmp/hejing-work/netperf-gem5-ns3-cd_bm/1/nic.shm.server.0.", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["26b17ad3984", "sync_pci=1 sync_eth=1", "exit main_time: 22520627825000"]}, "nic.client.0.": {"class": "CorundumBMNIC", "cmd": ["/home/hejingli/endhostsim-code/corundum_bm/corundum_bm", "/local/var/tmp/hejing-work/netperf-gem5-ns3-cd_bm/1/nic.pci.client.0.", "/local/var/tmp/hejing-work/netperf-gem5-ns3-cd_bm/1/nic.eth.client.0.", "/local/var/tmp/hejing-work/netperf-gem5-ns3-cd_bm/1/nic.shm.client.0.", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["4044a94b4e58", "sync_pci=1 sync_eth=1", "exit main_time: 22520627017909"]}, "net.": {"class": "NS3BridgeNet", "cmd": ["/home/hejingli/endhostsim-code/ns-3/cosim-run.sh", "cosim", "cosim-bridge-example", "--CosimPort=/local/var/tmp/hejing-work/netperf-gem5-ns3-cd_bm/1/nic.eth.server.0.", "--CosimPort=/local/var/tmp/hejing-work/netperf-gem5-ns3-cd_bm/1/nic.eth.client.0."], "stdout": [], "stderr": []}, "host.server.0": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejing-work/netperf-gem5-ns3-cd_bm/1/gem5-out.server.0", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=3GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/netperf-gem5-ns3-cd_bm/0/gem5-cp.server.0", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejing-work/netperf-gem5-ns3-cd_bm/1/cfg.server.0.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejing-work/netperf-gem5-ns3-cd_bm/1/nic.pci.server.0.", "--cosim-shm=/local/var/tmp/hejing-work/netperf-gem5-ns3-cd_bm/1/nic.shm.server.0.", "--cosim-sync", "--cosim-pci-lat=500", "--cosim-sync-int=500"], "stdout": ["gem5 Simulator System.  http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Nov 28 2020 07:22:44", "gem5 started Dec  1 2020 17:24:01", "gem5 executing on spyder01, pid 45494", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejing-work/netperf-gem5-ns3-cd_bm/1/gem5-out.server.0 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=3GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/netperf-gem5-ns3-cd_bm/0/gem5-cp.server.0 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejing-work/netperf-gem5-ns3-cd_bm/1/cfg.server.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejing-work/netperf-gem5-ns3-cd_bm/1/nic.pci.server.0. --cosim-shm=/local/var/tmp/hejing-work/netperf-gem5-ns3-cd_bm/1/nic.shm.server.0. --cosim-sync --cosim-pci-lat=500 --cosim-sync-int=500", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", "      0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan  1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 1838425342735", "switching cpus", "**** REAL SIMULATION ****", "+ insmod /tmp/guest/mqnic.ko\r", "[    0.845921] mqnic: loading out-of-tree module taints kernel.\r", "[    0.846921] mqnic 0000:00:02.0: mqnic probe\r", "[    0.846921] mqnic 0000:00:02.0: enabling device (0000 -> 0002)\r", "[    0.847921] mqnic 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[    0.847921] mqnic 0000:00:02.0: FW ID: 0x00000020\r", "[    0.847921] mqnic 0000:00:02.0: FW version: 0.1\r", "[    0.847921] mqnic 0000:00:02.0: Board ID: 0x43215678\r", "[    0.847921] mqnic 0000:00:02.0: Board version: 0.1\r", "[    0.847921] mqnic 0000:00:02.0: PHC count: 1\r", "[    0.847921] mqnic 0000:00:02.0: PHC offset: 0x00000200\r", "[    0.847921] mqnic 0000:00:02.0: IF count: 1\r", "[    0.847921] mqnic 0000:00:02.0: IF stride: 0x00080000\r", "[    0.847921] mqnic 0000:00:02.0: IF CSR offset: 0x00080000\r", "[    0.847921] mqnic 0000:00:02.0: Failed to read MAC from EEPROM; no EEPROM I2C client registered\r", "[    0.847921] mqnic 0000:00:02.0: registered PHC (index 0)\r", "[    0.847921] mqnic 0000:00:02.0: Creating interface 0\r", "[    0.852920] mqnic 0000:00:02.0: IF ID: 0x00000000\r", "[    0.852920] mqnic 0000:00:02.0: IF features: 0x00000000\r", "[    0.852920] mqnic 0000:00:02.0: Event queue count: 1\r", "[    0.852920] mqnic 0000:00:02.0: Event queue offset: 0x00100000\r", "[    0.852920] mqnic 0000:00:02.0: TX queue count: 1\r", "[    0.852920] mqnic 0000:00:02.0: TX queue offset: 0x00200000\r", "[    0.852920] mqnic 0000:00:02.0: TX completion queue count: 1\r", "[    0.852920] mqnic 0000:00:02.0: TX completion queue offset: 0x00400000\r", "[    0.852920] mqnic 0000:00:02.0: RX queue count: 1\r", "[    0.852920] mqnic 0000:00:02.0: RX queue offset: 0x00600000\r", "[    0.852920] mqnic 0000:00:02.0: RX completion queue count: 1\r", "[    0.852920] mqnic 0000:00:02.0: RX completion queue offset: 0x00700000\r", "[    0.852920] mqnic 0000:00:02.0: Port count: 1\r", "[    0.852920] mqnic 0000:00:02.0: Port offset: 0x00800000\r", "[    0.852920] mqnic 0000:00:02.0: Port stride: 0x00200000\r", "[    0.852920] mqnic 0000:00:02.0: Bad MAC in EEPROM; using random MAC\r", "[    0.852920] mqnic 0000:00:02.0: Max desc block size: 1\r", "[    0.853920] mqnic 0000:00:02.0: Port ID: 0x00000000\r", "[    0.853920] mqnic 0000:00:02.0: Port features: 0x00000000\r", "[    0.853920] mqnic 0000:00:02.0: Port MTU: 2048\r", "[    0.853920] mqnic 0000:00:02.0: Scheduler count: 1\r", "[    0.853920] mqnic 0000:00:02.0: Scheduler offset: 0x00100000\r", "[    0.853920] mqnic 0000:00:02.0: Scheduler stride: 0x00100000\r", "[    0.853920] mqnic 0000:00:02.0: Scheduler type: 0x00000000\r", "+ ip link set dev eth0 up\r", "[    0.865918] mqnic 0000:00:02.0: mqnic_open on port 0\r", "+ ip addr add 10.0.0.1/24 dev eth0\r", "+ netserver\r", "Starting netserver with host 'IN(6)ADDR_ANY' port '12865' and family AF_UNSPEC\r", "+ sleep infinity\r", "[    1.826772] random: crng init done\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB.  Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000  pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 1838425332735.  Starting simulation...", "info: Entering event queue @ 1838425342735.  Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 1838425343058.  Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: Tried to clear PCI interrupt 14", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!"]}, "host.client.0": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejing-work/netperf-gem5-ns3-cd_bm/1/gem5-out.client.0", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=3GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/netperf-gem5-ns3-cd_bm/0/gem5-cp.client.0", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejing-work/netperf-gem5-ns3-cd_bm/1/cfg.client.0.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejing-work/netperf-gem5-ns3-cd_bm/1/nic.pci.client.0.", "--cosim-shm=/local/var/tmp/hejing-work/netperf-gem5-ns3-cd_bm/1/nic.shm.client.0.", "--cosim-sync", "--cosim-pci-lat=500", "--cosim-sync-int=500"], "stdout": ["gem5 Simulator System.  http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Nov 28 2020 07:22:44", "gem5 started Dec  1 2020 17:24:01", "gem5 executing on spyder01, pid 45498", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejing-work/netperf-gem5-ns3-cd_bm/1/gem5-out.client.0 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=3GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/netperf-gem5-ns3-cd_bm/0/gem5-cp.client.0 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejing-work/netperf-gem5-ns3-cd_bm/1/cfg.client.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejing-work/netperf-gem5-ns3-cd_bm/1/nic.pci.client.0. --cosim-shm=/local/var/tmp/hejing-work/netperf-gem5-ns3-cd_bm/1/nic.shm.client.0. --cosim-sync --cosim-pci-lat=500 --cosim-sync-int=500", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", "      0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan  1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 1873092273436", "switching cpus", "**** REAL SIMULATION ****", "+ insmod /tmp/guest/mqnic.ko\r", "[    0.859920] mqnic: loading out-of-tree module taints kernel.\r", "[    0.860920] mqnic 0000:00:02.0: mqnic probe\r", "[    0.860920] mqnic 0000:00:02.0: enabling device (0000 -> 0002)\r", "[    0.860920] mqnic 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[    0.860920] mqnic 0000:00:02.0: FW ID: 0x00000020\r", "[    0.861920] mqnic 0000:00:02.0: FW version: 0.1\r", "[    0.861920] mqnic 0000:00:02.0: Board ID: 0x43215678\r", "[    0.861920] mqnic 0000:00:02.0: Board version: 0.1\r", "[    0.861920] mqnic 0000:00:02.0: PHC count: 1\r", "[    0.861920] mqnic 0000:00:02.0: PHC offset: 0x00000200\r", "[    0.861920] mqnic 0000:00:02.0: IF count: 1\r", "[    0.861920] mqnic 0000:00:02.0: IF stride: 0x00080000\r", "[    0.861920] mqnic 0000:00:02.0: IF CSR offset: 0x00080000\r", "[    0.861920] mqnic 0000:00:02.0: Failed to read MAC from EEPROM; no EEPROM I2C client registered\r", "[    0.861920] mqnic 0000:00:02.0: registered PHC (index 0)\r", "[    0.861920] mqnic 0000:00:02.0: Creating interface 0\r", "[    0.866919] mqnic 0000:00:02.0: IF ID: 0x00000000\r", "[    0.866919] mqnic 0000:00:02.0: IF features: 0x00000000\r", "[    0.866919] mqnic 0000:00:02.0: Event queue count: 1\r", "[    0.866919] mqnic 0000:00:02.0: Event queue offset: 0x00100000\r", "[    0.866919] mqnic 0000:00:02.0: TX queue count: 1\r", "[    0.866919] mqnic 0000:00:02.0: TX queue offset: 0x00200000\r", "[    0.866919] mqnic 0000:00:02.0: TX completion queue count: 1\r", "[    0.866919] mqnic 0000:00:02.0: TX completion queue offset: 0x00400000\r", "[    0.866919] mqnic 0000:00:02.0: RX queue count: 1\r", "[    0.866919] mqnic 0000:00:02.0: RX queue offset: 0x00600000\r", "[    0.866919] mqnic 0000:00:02.0: RX completion queue count: 1\r", "[    0.866919] mqnic 0000:00:02.0: RX completion queue offset: 0x00700000\r", "[    0.866919] mqnic 0000:00:02.0: Port count: 1\r", "[    0.866919] mqnic 0000:00:02.0: Port offset: 0x00800000\r", "[    0.866919] mqnic 0000:00:02.0: Port stride: 0x00200000\r", "[    0.866919] mqnic 0000:00:02.0: Bad MAC in EEPROM; using random MAC\r", "[    0.866919] mqnic 0000:00:02.0: Max desc block size: 1\r", "[    0.867919] mqnic 0000:00:02.0: Port ID: 0x00000000\r", "[    0.867919] mqnic 0000:00:02.0: Port features: 0x00000000\r", "[    0.867919] mqnic 0000:00:02.0: Port MTU: 2048\r", "[    0.867919] mqnic 0000:00:02.0: Scheduler count: 1\r", "[    0.867919] mqnic 0000:00:02.0: Scheduler offset: 0x00100000\r", "[    0.867919] mqnic 0000:00:02.0: Scheduler stride: 0x00100000\r", "[    0.867919] mqnic 0000:00:02.0: Scheduler type: 0x00000000\r", "+ ip link set dev eth0 up\r", "[    0.879917] mqnic 0000:00:02.0: mqnic_open on port 0\r", "+ ip addr add 10.0.0.2/24 dev eth0\r", "+ netserver\r", "Starting netserver with host 'IN(6)ADDR_ANY' port '12865' and family AF_UNSPEC\r", "+ netperf -H 10.0.0.1\r", "[    1.493824] random: netperf: uninitialized urandom read (4096 bytes read)\r", "MIGRATED TCP STREAM TEST from 0.0.0.0 (0.0.0.0) port 0 AF_INET to 10.0.0.1 () port 0 AF_INET : demo\r", "[    1.813775] random: crng init done\r", "Recv   Send    Send                          \r", "Socket Socket  Message  Elapsed              \r", "Size   Size    Size     Time     Throughput  \r", "bytes  bytes   bytes    secs.    10^6bits/sec  \r", "\r", "131072  16384  16384    10.00     947.64   \r", "+ netperf -H 10.0.0.1 -t TCP_RR -- -o mean_latency,p50_latency,p90_latency,p99_latency\r", "MIGRATED TCP REQUEST/RESPONSE TEST from 0.0.0.0 (0.0.0.0) port 0 AF_INET to 10.0.0.1 () port 0 AF_INET : demo : first burst 0\r", "Mean Latency Microseconds,50th Percentile Latency Microseconds,90th Percentile Latency Microseconds,99th Percentile Latency Microseconds\r", "68.64,-2147483648,-2147483648,1082\r", "+ m5 exit\r", "Exiting @ tick 22520626541622 because m5_exit instruction encountered"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB.  Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000  pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 1873092263436.  Starting simulation...", "info: Entering event queue @ 1873092273436.  Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 1873092273759.  Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: Tried to clear PCI interrupt 14", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!"]}}, "success": true}
\ No newline at end of file

results/paper_data/netperf/netperf-gem5-switch-cd_bm-1.json

+{"exp_name": "netperf-gem5-switch-cd_bm", "start_time": 1606839840.8590667, "end_time": 1606882151.4843123, "sims": {"nic.server.0.": {"class": "CorundumBMNIC", "cmd": ["/home/hejingli/endhostsim-code/corundum_bm/corundum_bm", "/local/var/tmp/hejing-work/netperf-gem5-switch-cd_bm/1/nic.pci.server.0.", "/local/var/tmp/hejing-work/netperf-gem5-switch-cd_bm/1/nic.eth.server.0.", "/local/var/tmp/hejing-work/netperf-gem5-switch-cd_bm/1/nic.shm.server.0.", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["50ce7fc14924", "sync_pci=1 sync_eth=1", "warn: nicsim_sync failed (t=39092510000)", "warn: nicsim_sync failed (t=930615010000)", "warn: nicsim_sync failed (t=1821361510000)", "exit main_time: 22778268920842"]}, "nic.client.0.": {"class": "CorundumBMNIC", "cmd": ["/home/hejingli/endhostsim-code/corundum_bm/corundum_bm", "/local/var/tmp/hejing-work/netperf-gem5-switch-cd_bm/1/nic.pci.client.0.", "/local/var/tmp/hejing-work/netperf-gem5-switch-cd_bm/1/nic.eth.client.0.", "/local/var/tmp/hejing-work/netperf-gem5-switch-cd_bm/1/nic.shm.client.0.", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["ea8245f5df4", "sync_pci=1 sync_eth=1", "exit main_time: 22778268220842"]}, "net.": {"class": "SwitchNet", "cmd": ["/home/hejingli/endhostsim-code/net_switch/net_switch", "-S", "500", "-E", "500", "-s", "/local/var/tmp/hejing-work/netperf-gem5-switch-cd_bm/1/nic.eth.server.0.", "-s", "/local/var/tmp/hejing-work/netperf-gem5-switch-cd_bm/1/nic.eth.client.0."], "stdout": ["start polling"], "stderr": []}, "host.server.0": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejing-work/netperf-gem5-switch-cd_bm/1/gem5-out.server.0", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=3GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/netperf-gem5-switch-cd_bm/0/gem5-cp.server.0", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejing-work/netperf-gem5-switch-cd_bm/1/cfg.server.0.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejing-work/netperf-gem5-switch-cd_bm/1/nic.pci.server.0.", "--cosim-shm=/local/var/tmp/hejing-work/netperf-gem5-switch-cd_bm/1/nic.shm.server.0.", "--cosim-sync", "--cosim-pci-lat=500", "--cosim-sync-int=500"], "stdout": ["gem5 Simulator System.  http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Nov 28 2020 07:22:44", "gem5 started Dec  1 2020 17:24:01", "gem5 executing on spyder01, pid 45496", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejing-work/netperf-gem5-switch-cd_bm/1/gem5-out.server.0 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=3GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/netperf-gem5-switch-cd_bm/0/gem5-cp.server.0 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejing-work/netperf-gem5-switch-cd_bm/1/cfg.server.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejing-work/netperf-gem5-switch-cd_bm/1/nic.pci.server.0. --cosim-shm=/local/var/tmp/hejing-work/netperf-gem5-switch-cd_bm/1/nic.shm.server.0. --cosim-sync --cosim-pci-lat=500 --cosim-sync-int=500", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", "      0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan  1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 1901413226134", "switching cpus", "**** REAL SIMULATION ****", "+ insmod /tmp/guest/mqnic.ko\r", "[    0.864919] mqnic: loading out-of-tree module taints kernel.\r", "[    0.865919] mqnic 0000:00:02.0: mqnic probe\r", "[    0.865919] mqnic 0000:00:02.0: enabling device (0000 -> 0002)\r", "[    0.865919] mqnic 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[    0.865919] mqnic 0000:00:02.0: FW ID: 0x00000020\r", "[    0.865919] mqnic 0000:00:02.0: FW version: 0.1\r", "[    0.865919] mqnic 0000:00:02.0: Board ID: 0x43215678\r", "[    0.865919] mqnic 0000:00:02.0: Board version: 0.1\r", "[    0.865919] mqnic 0000:00:02.0: PHC count: 1\r", "[    0.866919] mqnic 0000:00:02.0: PHC offset: 0x00000200\r", "[    0.866919] mqnic 0000:00:02.0: IF count: 1\r", "[    0.866919] mqnic 0000:00:02.0: IF stride: 0x00080000\r", "[    0.866919] mqnic 0000:00:02.0: IF CSR offset: 0x00080000\r", "[    0.866919] mqnic 0000:00:02.0: Failed to read MAC from EEPROM; no EEPROM I2C client registered\r", "[    0.866919] mqnic 0000:00:02.0: registered PHC (index 0)\r", "[    0.866919] mqnic 0000:00:02.0: Creating interface 0\r", "[    0.870918] mqnic 0000:00:02.0: IF ID: 0x00000000\r", "[    0.870918] mqnic 0000:00:02.0: IF features: 0x00000000\r", "[    0.870918] mqnic 0000:00:02.0: Event queue count: 1\r", "[    0.870918] mqnic 0000:00:02.0: Event queue offset: 0x00100000\r", "[    0.871918] mqnic 0000:00:02.0: TX queue count: 1\r", "[    0.871918] mqnic 0000:00:02.0: TX queue offset: 0x00200000\r", "[    0.871918] mqnic 0000:00:02.0: TX completion queue count: 1\r", "[    0.871918] mqnic 0000:00:02.0: TX completion queue offset: 0x00400000\r", "[    0.871918] mqnic 0000:00:02.0: RX queue count: 1\r", "[    0.871918] mqnic 0000:00:02.0: RX queue offset: 0x00600000\r", "[    0.871918] mqnic 0000:00:02.0: RX completion queue count: 1\r", "[    0.871918] mqnic 0000:00:02.0: RX completion queue offset: 0x00700000\r", "[    0.871918] mqnic 0000:00:02.0: Port count: 1\r", "[    0.871918] mqnic 0000:00:02.0: Port offset: 0x00800000\r", "[    0.871918] mqnic 0000:00:02.0: Port stride: 0x00200000\r", "[    0.871918] mqnic 0000:00:02.0: Bad MAC in EEPROM; using random MAC\r", "[    0.871918] mqnic 0000:00:02.0: Max desc block size: 1\r", "[    0.872918] mqnic 0000:00:02.0: Port ID: 0x00000000\r", "[    0.872918] mqnic 0000:00:02.0: Port features: 0x00000000\r", "[    0.872918] mqnic 0000:00:02.0: Port MTU: 2048\r", "[    0.872918] mqnic 0000:00:02.0: Scheduler count: 1\r", "[    0.872918] mqnic 0000:00:02.0: Scheduler offset: 0x00100000\r", "[    0.872918] mqnic 0000:00:02.0: Scheduler stride: 0x00100000\r", "[    0.872918] mqnic 0000:00:02.0: Scheduler type: 0x00000000\r", "+ ip link set dev eth0 up\r", "[    0.883916] mqnic 0000:00:02.0: mqnic_open on port 0\r", "+ ip addr add 10.0.0.1/24 dev eth0\r", "+ netserver\r", "Starting netserver with host 'IN(6)ADDR_ANY' port '12865' and family AF_UNSPEC\r", "+ sleep infinity\r", "[    1.840771] random: crng init done\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB.  Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000  pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 1901413216134.  Starting simulation...", "info: Entering event queue @ 1901413226134.  Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 1901413226457.  Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: Tried to clear PCI interrupt 14", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!"]}, "host.client.0": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejing-work/netperf-gem5-switch-cd_bm/1/gem5-out.client.0", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=3GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/netperf-gem5-switch-cd_bm/0/gem5-cp.client.0", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejing-work/netperf-gem5-switch-cd_bm/1/cfg.client.0.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejing-work/netperf-gem5-switch-cd_bm/1/nic.pci.client.0.", "--cosim-shm=/local/var/tmp/hejing-work/netperf-gem5-switch-cd_bm/1/nic.shm.client.0.", "--cosim-sync", "--cosim-pci-lat=500", "--cosim-sync-int=500"], "stdout": ["gem5 Simulator System.  http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Nov 28 2020 07:22:44", "gem5 started Dec  1 2020 17:24:01", "gem5 executing on spyder01, pid 45501", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejing-work/netperf-gem5-switch-cd_bm/1/gem5-out.client.0 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=3GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/netperf-gem5-switch-cd_bm/0/gem5-cp.client.0 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejing-work/netperf-gem5-switch-cd_bm/1/cfg.client.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejing-work/netperf-gem5-switch-cd_bm/1/nic.pci.client.0. --cosim-shm=/local/var/tmp/hejing-work/netperf-gem5-switch-cd_bm/1/nic.shm.client.0. --cosim-sync --cosim-pci-lat=500 --cosim-sync-int=500", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", "      0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan  1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 1930350043351", "switching cpus", "**** REAL SIMULATION ****", "+ insmod /tmp/guest/mqnic.ko\r", "[    0.862919] mqnic: loading out-of-tree module taints kernel.\r", "[    0.863919] mqnic 0000:00:02.0: mqnic probe\r", "[    0.863919] mqnic 0000:00:02.0: enabling device (0000 -> 0002)\r", "[    0.863919] mqnic 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[    0.863919] mqnic 0000:00:02.0: FW ID: 0x00000020\r", "[    0.863919] mqnic 0000:00:02.0: FW version: 0.1\r", "[    0.863919] mqnic 0000:00:02.0: Board ID: 0x43215678\r", "[    0.863919] mqnic 0000:00:02.0: Board version: 0.1\r", "[    0.863919] mqnic 0000:00:02.0: PHC count: 1\r", "[    0.863919] mqnic 0000:00:02.0: PHC offset: 0x00000200\r", "[    0.864918] mqnic 0000:00:02.0: IF count: 1\r", "[    0.864918] mqnic 0000:00:02.0: IF stride: 0x00080000\r", "[    0.864918] mqnic 0000:00:02.0: IF CSR offset: 0x00080000\r", "[    0.864918] mqnic 0000:00:02.0: Failed to read MAC from EEPROM; no EEPROM I2C client registered\r", "[    0.864918] mqnic 0000:00:02.0: registered PHC (index 0)\r", "[    0.864918] mqnic 0000:00:02.0: Creating interface 0\r", "[    0.868918] mqnic 0000:00:02.0: IF ID: 0x00000000\r", "[    0.868918] mqnic 0000:00:02.0: IF features: 0x00000000\r", "[    0.868918] mqnic 0000:00:02.0: Event queue count: 1\r", "[    0.868918] mqnic 0000:00:02.0: Event queue offset: 0x00100000\r", "[    0.868918] mqnic 0000:00:02.0: TX queue count: 1\r", "[    0.869918] mqnic 0000:00:02.0: TX queue offset: 0x00200000\r", "[    0.869918] mqnic 0000:00:02.0: TX completion queue count: 1\r", "[    0.869918] mqnic 0000:00:02.0: TX completion queue offset: 0x00400000\r", "[    0.869918] mqnic 0000:00:02.0: RX queue count: 1\r", "[    0.869918] mqnic 0000:00:02.0: RX queue offset: 0x00600000\r", "[    0.869918] mqnic 0000:00:02.0: RX completion queue count: 1\r", "[    0.869918] mqnic 0000:00:02.0: RX completion queue offset: 0x00700000\r", "[    0.869918] mqnic 0000:00:02.0: Port count: 1\r", "[    0.869918] mqnic 0000:00:02.0: Port offset: 0x00800000\r", "[    0.869918] mqnic 0000:00:02.0: Port stride: 0x00200000\r", "[    0.869918] mqnic 0000:00:02.0: Bad MAC in EEPROM; using random MAC\r", "[    0.869918] mqnic 0000:00:02.0: Max desc block size: 1\r", "[    0.870918] mqnic 0000:00:02.0: Port ID: 0x00000000\r", "[    0.870918] mqnic 0000:00:02.0: Port features: 0x00000000\r", "[    0.870918] mqnic 0000:00:02.0: Port MTU: 2048\r", "[    0.870918] mqnic 0000:00:02.0: Scheduler count: 1\r", "[    0.870918] mqnic 0000:00:02.0: Scheduler offset: 0x00100000\r", "[    0.870918] mqnic 0000:00:02.0: Scheduler stride: 0x00100000\r", "[    0.870918] mqnic 0000:00:02.0: Scheduler type: 0x00000000\r", "+ ip link set dev eth0 up\r", "[    0.881916] mqnic 0000:00:02.0: mqnic_open on port 0\r", "+ ip addr add 10.0.0.2/24 dev eth0\r", "+ netserver\r", "Starting netserver with host 'IN(6)ADDR_ANY' port '12865' and family AF_UNSPEC\r", "+ netperf -H 10.0.0.1\r", "[    1.495823] random: netperf: uninitialized urandom read (4096 bytes read)\r", "MIGRATED TCP STREAM TEST from 0.0.0.0 (0.0.0.0) port 0 AF_INET to 10.0.0.1 () port 0 AF_INET : demo\r", "[    1.801776] random: crng init done\r", "Recv   Send    Send                          \r", "Socket Socket  Message  Elapsed              \r", "Size   Size    Size     Time     Throughput  \r", "bytes  bytes   bytes    secs.    10^6bits/sec  \r", "\r", "131072  16384  16384    10.00     919.23   \r", "+ netperf -H 10.0.0.1 -t TCP_RR -- -o mean_latency,p50_latency,p90_latency,p99_latency\r", "MIGRATED TCP REQUEST/RESPONSE TEST from 0.0.0.0 (0.0.0.0) port 0 AF_INET to 10.0.0.1 () port 0 AF_INET : demo : first burst 0\r", "Mean Latency Microseconds,50th Percentile Latency Microseconds,90th Percentile Latency Microseconds,99th Percentile Latency Microseconds\r", "67.94,-2147483648,-2147483648,1082\r", "+ m5 exit\r", "Exiting @ tick 22778267831433 because m5_exit instruction encountered"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB.  Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000  pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 1930350033351.  Starting simulation...", "info: Entering event queue @ 1930350043351.  Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 1930350043674.  Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: Tried to clear PCI interrupt 14", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!"]}}, "success": true}
\ No newline at end of file