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ycai
simbricks
Commits
d8a9599a
Unverified
Commit
d8a9599a
authored
Sep 25, 2024
by
Jakob Görgen
Browse files
started fixing of gem5 run_cmds method
parent
5facec96
Changes
4
Hide whitespace changes
Inline
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Showing
4 changed files
with
103 additions
and
41 deletions
+103
-41
experiments/simbricks/orchestration/instantiation/base.py
experiments/simbricks/orchestration/instantiation/base.py
+13
-5
experiments/simbricks/orchestration/simulation/base.py
experiments/simbricks/orchestration/simulation/base.py
+4
-4
experiments/simbricks/orchestration/simulation/host.py
experiments/simbricks/orchestration/simulation/host.py
+84
-30
experiments/simbricks/orchestration/simulation/net/net_base.py
...iments/simbricks/orchestration/simulation/net/net_base.py
+2
-2
No files found.
experiments/simbricks/orchestration/instantiation/base.py
View file @
d8a9599a
...
@@ -145,9 +145,6 @@ class Instantiation(util_base.IdObj):
...
@@ -145,9 +145,6 @@ class Instantiation(util_base.IdObj):
def
executor
(
self
,
executor
:
command_executor
.
Executor
):
def
executor
(
self
,
executor
:
command_executor
.
Executor
):
self
.
_executor
=
executor
self
.
_executor
=
executor
def
restore_cp
(
self
)
->
bool
:
return
self
.
_env
.
_restore_cp
def
qemu_img_path
(
self
)
->
str
:
def
qemu_img_path
(
self
)
->
str
:
return
self
.
_env
.
_qemu_img_path
return
self
.
_env
.
_qemu_img_path
...
@@ -238,6 +235,10 @@ class Instantiation(util_base.IdObj):
...
@@ -238,6 +235,10 @@ class Instantiation(util_base.IdObj):
interface
:
sys_base
.
Interface
,
interface
:
sys_base
.
Interface
,
supported_sock_types
:
set
[
SockType
]
=
set
(),
supported_sock_types
:
set
[
SockType
]
=
set
(),
)
->
Socket
:
)
->
Socket
:
if
self
.
_opposing_interface_within_same_sim
(
interface
=
interface
):
raise
Exception
(
"interface does not need a socket"
)
# check if already a socket is associated with this interface
# check if already a socket is associated with this interface
socket
=
self
.
_get_socket_by_interface
(
interface
=
interface
)
socket
=
self
.
_get_socket_by_interface
(
interface
=
interface
)
if
socket
is
not
None
:
if
socket
is
not
None
:
...
@@ -254,7 +255,7 @@ class Instantiation(util_base.IdObj):
...
@@ -254,7 +255,7 @@ class Instantiation(util_base.IdObj):
# neither connecting nor listening side already created a socket, thus we
# neither connecting nor listening side already created a socket, thus we
# create a completely new 'CONNECT' socket
# create a completely new 'CONNECT' socket
if
len
(
supported_sock_types
)
>
1
or
(
if
len
(
supported_sock_types
)
<
1
or
(
SockType
.
LISTEN
not
in
supported_sock_types
SockType
.
LISTEN
not
in
supported_sock_types
and
SockType
.
CONNECT
not
in
supported_sock_types
and
SockType
.
CONNECT
not
in
supported_sock_types
):
):
...
@@ -359,6 +360,9 @@ class Instantiation(util_base.IdObj):
...
@@ -359,6 +360,9 @@ class Instantiation(util_base.IdObj):
def
create_cp
(
self
)
->
bool
:
def
create_cp
(
self
)
->
bool
:
return
self
.
_env
.
_create_cp
return
self
.
_env
.
_create_cp
def
restore_cp
(
self
)
->
bool
:
return
self
.
_env
.
_restore_cp
def
cpdir
(
self
)
->
str
:
def
cpdir
(
self
)
->
str
:
return
pathlib
.
Path
(
self
.
_env
.
_cpdir
).
absolute
()
return
pathlib
.
Path
(
self
.
_env
.
_cpdir
).
absolute
()
...
@@ -453,11 +457,15 @@ class Instantiation(util_base.IdObj):
...
@@ -453,11 +457,15 @@ class Instantiation(util_base.IdObj):
)
)
def
cpdir_subdir
(
self
,
sim
:
sim_base
.
Simulator
)
->
str
:
def
cpdir_subdir
(
self
,
sim
:
sim_base
.
Simulator
)
->
str
:
dir_path
=
f
"checkpoint.
{
sim
.
name
}
-
{
sim
.
_id
}
"
dir_path
=
f
"checkpoint.
{
sim
.
full_
name
()
}
-
{
sim
.
_id
}
"
return
self
.
_join_paths
(
return
self
.
_join_paths
(
base
=
self
.
cpdir
(),
relative_path
=
dir_path
,
enforce_existence
=
False
base
=
self
.
cpdir
(),
relative_path
=
dir_path
,
enforce_existence
=
False
)
)
def
get_simmulator_output_dir
(
self
,
sim
:
sim_base
.
Simulator
)
->
str
:
dir_path
=
f
"output.
{
sim
.
full_name
()
}
-
{
sim
.
_id
}
"
return
self
.
_join_paths
(
base
=
self
.
_env
.
_output_base
,
relative_path
=
dir_path
)
def
get_simulation_output_path
(
self
,
run_number
:
int
)
->
str
:
def
get_simulation_output_path
(
self
,
run_number
:
int
)
->
str
:
return
self
.
_join_paths
(
return
self
.
_join_paths
(
base
=
self
.
_env
.
_output_base
,
base
=
self
.
_env
.
_output_base
,
...
...
experiments/simbricks/orchestration/simulation/base.py
View file @
d8a9599a
...
@@ -87,16 +87,16 @@ class Simulator(utils_base.IdObj):
...
@@ -87,16 +87,16 @@ class Simulator(utils_base.IdObj):
def
get_unique_latency_period_sync
(
def
get_unique_latency_period_sync
(
channels
:
list
[
sim_chan
.
Channel
],
channels
:
list
[
sim_chan
.
Channel
],
)
->
tuple
[
int
,
int
,
bool
]:
)
->
tuple
[
int
,
int
,
bool
]:
eth_
latency
=
None
latency
=
None
sync_period
=
None
sync_period
=
None
run_sync
=
False
run_sync
=
False
for
channel
in
channels
:
for
channel
in
channels
:
sync_period
=
min
(
sync_period
,
channel
.
sync_period
)
sync_period
=
min
(
sync_period
,
channel
.
sync_period
)
run_sync
=
run_sync
or
channel
.
_synchronized
run_sync
=
run_sync
or
channel
.
_synchronized
eth_
latency
=
max
(
eth_
latency
,
channel
.
sys_channel
.
eth_
latency
)
latency
=
max
(
latency
,
channel
.
sys_channel
.
latency
)
if
eth_
latency
is
None
or
sync_period
is
None
:
if
latency
is
None
or
sync_period
is
None
:
raise
Exception
(
"could not determine eth_latency and sync_period"
)
raise
Exception
(
"could not determine eth_latency and sync_period"
)
return
eth_
latency
,
sync_period
,
run_sync
return
latency
,
sync_period
,
run_sync
def
filter_components_by_type
(
self
,
ty
)
->
list
[
sys_conf
.
Component
]:
def
filter_components_by_type
(
self
,
ty
)
->
list
[
sys_conf
.
Component
]:
return
list
(
filter
(
lambda
comp
:
isinstance
(
comp
,
ty
),
self
.
_components
))
return
list
(
filter
(
lambda
comp
:
isinstance
(
comp
,
ty
),
self
.
_components
))
...
...
experiments/simbricks/orchestration/simulation/host.py
View file @
d8a9599a
...
@@ -33,11 +33,11 @@ from simbricks.orchestration.experiment.experiment_environment_new import ExpEnv
...
@@ -33,11 +33,11 @@ from simbricks.orchestration.experiment.experiment_environment_new import ExpEnv
if
tp
.
TYPE_CHECKING
:
if
tp
.
TYPE_CHECKING
:
from
simbricks.orchestration.system
import
host
as
sys_host
from
simbricks.orchestration.system
import
host
as
sys_host
class
HostSim
(
sim_base
.
Simulator
):
class
HostSim
(
sim_base
.
Simulator
):
def
__init__
(
self
,
e
:
sim_base
.
Simulation
):
def
__init__
(
self
,
simulation
:
sim_base
.
Simulation
,
name
=
""
):
super
().
__init__
(
e
)
super
().
__init__
(
simulation
=
simulation
,
name
=
name
)
self
.
name
=
f
"
{
self
.
_id
}
"
def
full_name
(
self
)
->
str
:
def
full_name
(
self
)
->
str
:
return
"host."
+
self
.
name
return
"host."
+
self
.
name
...
@@ -50,22 +50,20 @@ class HostSim(sim_base.Simulator):
...
@@ -50,22 +50,20 @@ class HostSim(sim_base.Simulator):
def
supported_image_formats
(
self
)
->
list
[
str
]:
def
supported_image_formats
(
self
)
->
list
[
str
]:
raise
Exception
(
"implement me"
)
raise
Exception
(
"implement me"
)
def
supported_socket_types
(
self
)
->
set
[
inst_base
.
SockType
]:
def
supported_socket_types
(
self
)
->
set
[
inst_base
.
SockType
]:
return
[
inst_base
.
SockType
.
CONNECT
]
return
[
inst_base
.
SockType
.
CONNECT
]
class
Gem5Sim
(
HostSim
):
class
Gem5Sim
(
HostSim
):
def
__init__
(
self
,
e
:
sim_base
.
Simulation
):
def
__init__
(
self
,
simulation
:
sim_base
.
Simulation
):
super
().
__init__
(
e
)
super
().
__init__
(
simulation
=
simulation
,
name
=
f
"Gem5Sim-
{
self
.
_id
}
"
)
self
.
name
=
super
().
full_name
()
self
.
cpu_type_cp
=
"X86KvmCPU"
self
.
cpu_type_cp
=
"X86KvmCPU"
self
.
cpu_type
=
"TimingSimpleCPU"
self
.
cpu_type
=
"TimingSimpleCPU"
self
.
extra_main_args
:
list
[
str
]
=
[]
self
.
extra_main_args
:
list
[
str
]
=
[]
self
.
extra_config_args
:
list
[
str
]
=
[]
self
.
extra_config_args
:
list
[
str
]
=
[]
self
.
variant
=
"fast"
self
.
variant
=
"fast"
self
.
modify_checkpoint_tick
=
True
self
.
wait
=
True
self
.
wait
=
True
def
resreq_cores
(
self
)
->
int
:
def
resreq_cores
(
self
)
->
int
:
...
@@ -73,43 +71,100 @@ class Gem5Sim(HostSim):
...
@@ -73,43 +71,100 @@ class Gem5Sim(HostSim):
def
resreq_mem
(
self
)
->
int
:
def
resreq_mem
(
self
)
->
int
:
return
4096
return
4096
def
supported_image_formats
(
self
)
->
list
[
str
]:
def
supported_image_formats
(
self
)
->
list
[
str
]:
return
[
"raw"
]
return
[
"raw"
]
async
def
prepare
(
self
,
inst
:
inst_base
.
Instantiation
)
->
None
:
async
def
prepare
(
self
,
inst
:
inst_base
.
Instantiation
)
->
None
:
await
super
().
prepare
(
inst
=
inst
)
await
super
().
prepare
(
inst
=
inst
)
prep_cmds
=
[
f
'
mkdir -p
{
inst
.
cpdir_subdir
(
sim
=
self
)
}
'
]
prep_cmds
=
[
f
"
mkdir -p
{
inst
.
cpdir_subdir
(
sim
=
self
)
}
"
]
task
=
asyncio
.
create_task
(
task
=
asyncio
.
create_task
(
inst
.
executor
.
run_cmdlist
(
label
=
"prepare"
,
cmds
=
prep_cmds
,
verbose
=
True
)
inst
.
executor
.
run_cmdlist
(
label
=
"prepare"
,
cmds
=
prep_cmds
,
verbose
=
True
)
)
)
await
task
await
task
def
run_cmd
(
self
,
inst
:
inst_base
.
Instantiation
)
->
str
:
def
run_cmd
(
self
,
inst
:
inst_base
.
Instantiation
)
->
str
:
cpu_type
=
self
.
cpu_type
cpu_type
=
self
.
cpu_type
if
env
.
create_cp
:
if
inst
.
create_cp
()
:
cpu_type
=
self
.
cpu_type_cp
cpu_type
=
self
.
cpu_type_cp
# TODO
full_sys_hosts
=
tp
.
cast
(
list
[
sys_host
.
FullSystemHost
],
self
.
filter_components_by_type
(
ty
=
sys_host
.
FullSystemHost
))
cmd
=
f
"
{
env
.
gem5_path
(
self
.
variant
)
}
--outdir=
{
env
.
gem5_outdir
(
self
)
}
"
if
len
(
full_sys_hosts
)
!=
1
:
raise
Exception
(
"Gem5Sim only supports simulating 1 FullSystemHost"
)
cmd
=
f
"
{
inst
.
join_repo_base
(
f
"sims/external/gem5/build/X86/gem5.
{
self
.
variant
}
")
}
--outdir=
{
inst
.
get_simmulator_output_dir
(
sim
=
self
)
}
"
cmd
+=
" "
.
join
(
self
.
extra_main_args
)
cmd
+=
" "
.
join
(
self
.
extra_main_args
)
cmd
+=
(
cmd
+=
(
f
"
{
env
.
gem5_py_path
}
--caches --l2cache "
f
"
{
inst
.
join_repo_base
(
"sims/external/gem5/configs/simbricks/simbricks.py"
)
}
--caches --l2cache "
"--l1d_size=32kB --l1i_size=32kB --l2_size=32MB "
"--l1d_size=32kB --l1i_size=32kB --l2_size=32MB "
"--l1d_assoc=8 --l1i_assoc=8 --l2_assoc=16 "
"--l1d_assoc=8 --l1i_assoc=8 --l2_assoc=16 "
f
"--cacheline_size=64 --cpu-clock=
{
self
.
hosts
[
0
].
cpu_freq
}
"
f
"--cacheline_size=64 --cpu-clock=
{
full_sys_hosts
[
0
].
cpu_freq
}
"
f
" --sys-clock=
{
self
.
hosts
[
0
].
sys_clock
}
"
f
" --sys-clock=
{
full_sys_hosts
[
0
].
sys_clock
}
"
# TODO:FIXME
f
"--checkpoint-dir=
{
env
.
gem5_cpdir
(
self
)
}
"
f
"--checkpoint-dir=
{
inst
.
cpdir_subdir
(
sim
=
self
)
}
"
f
"--kernel=
{
env
.
gem5_kernel_path
}
"
f
"--kernel=
{
inst
.
join_repo_base
(
"images/vmlinux"
)
}
"
f
"--disk-image=
{
env
.
hd_raw_path
(
self
.
hosts
[
0
].
disk_image
)
}
"
)
f
"--disk-image=
{
env
.
cfgtar_path
(
self
)
}
"
for
disk
in
full_sys_hosts
[
0
].
disks
:
f
"--cpu-type=
{
cpu_type
}
--mem-size=
{
self
.
hosts
[
0
].
memory
}
MB "
cmd
+=
f
"--disk-image=
{
disk
.
path
(
inst
=
inst
,
format
=
"raw"
)
}
"
f
"--num-cpus=
{
self
.
hosts
[
0
].
cores
}
"
cmd
+=
(
f
"--cpu-type=
{
cpu_type
}
--mem-size=
{
full_sys_hosts
[
0
].
memory
}
MB "
f
"--num-cpus=
{
full_sys_hosts
[
0
].
cores
}
"
"--mem-type=DDR4_2400_16x4 "
"--mem-type=DDR4_2400_16x4 "
)
)
for
dev
in
self
.
hosts
[
0
].
ifs
:
# TODO
# TODO
# if self.node_config.kcmd_append:
# cmd += f'--command-line-append="{self.node_config.kcmd_append}" '
if
inst
.
create_cp
():
cmd
+=
'--max-checkpoints=1 '
if
inst
.
restore_cp
():
cmd
+=
'-r 1 '
sockets
=
self
.
_get_sockets
(
inst
=
inst
)
# TODO: FIXME lost info whether this was from a pci device, a mem device or whatever
latency
,
sync_period
,
run_sync
=
sim_base
.
Simulator
.
get_unique_latency_period_sync
(
channels
=
self
.
get_channels
())
pci_devices
=
self
.
filter_components_by_type
(
ty
=
)
# TODO: FIXME get socket by interface!
for
dev
in
self
.
pcidevs
:
cmd
+=
(
f
'--simbricks-pci=connect:
{
env
.
dev_pci_path
(
dev
)
}
'
f
':latency=
{
self
.
pci_latency
}
ns'
f
':sync_interval=
{
self
.
sync_period
}
ns'
)
if
cpu_type
==
'TimingSimpleCPU'
:
cmd
+=
':sync'
cmd
+=
' '
# TODO: FIXME get socket by interface!
for
dev
in
self
.
memdevs
:
cmd
+=
(
f
'--simbricks-mem=
{
dev
.
size
}
@
{
dev
.
addr
}
@
{
dev
.
as_id
}
@'
f
'connect:
{
env
.
dev_mem_path
(
dev
)
}
'
f
':latency=
{
self
.
mem_latency
}
ns'
f
':sync_interval=
{
self
.
sync_period
}
ns'
)
if
cpu_type
==
'TimingSimpleCPU'
:
cmd
+=
':sync'
cmd
+=
' '
# for net in self.net_directs:
# cmd += (
# '--simbricks-eth-e1000=listen'
# f':{env.net2host_eth_path(net, self)}'
# f':{env.net2host_shm_path(net, self)}'
# f':latency={net.eth_latency}ns'
# f':sync_interval={net.sync_period}ns'
# )
# if cpu_type == 'TimingSimpleCPU':
# cmd += ':sync'
# cmd += ' '
cmd
+=
' '
.
join
(
self
.
extra_config_args
)
return
cmd
for
dev
in
full_sys_hosts
[
0
].
ifs
:
# TODO
if
dev
==
dev
.
channel
.
a
:
if
dev
==
dev
.
channel
.
a
:
peer_if
=
dev
.
channel
.
b
peer_if
=
dev
.
channel
.
b
else
:
else
:
...
@@ -128,7 +183,6 @@ class Gem5Sim(HostSim):
...
@@ -128,7 +183,6 @@ class Gem5Sim(HostSim):
return
cmd
return
cmd
def
checkpoint_commands
(
self
)
->
list
[
str
]:
def
checkpoint_commands
(
self
)
->
list
[
str
]:
return
[
"m5 checkpoint"
]
return
[
"m5 checkpoint"
]
...
@@ -165,14 +219,14 @@ class QemuSim(HostSim):
...
@@ -165,14 +219,14 @@ class QemuSim(HostSim):
disks
=
tp
.
cast
(
list
[
system
.
DiskImage
],
fsh
.
disks
)
disks
=
tp
.
cast
(
list
[
system
.
DiskImage
],
fsh
.
disks
)
for
disk
in
disks
:
for
disk
in
disks
:
prep_cmds
.
append
(
prep_cmds
.
append
(
f
'
{
inst
.
qemu_img_path
()
}
create -f qcow2 -o
'
f
"
{
inst
.
qemu_img_path
()
}
create -f qcow2 -o
"
f
'backing_file="
{
disk
.
path
(
inst
=
inst
,
format
=
"qcow2"
)
}
" '
f
'backing_file="
{
disk
.
path
(
inst
=
inst
,
format
=
"qcow2"
)
}
" '
f
'
{
inst
.
hdcopy_path
(
img
=
disk
,
format
=
"qcow2"
)
}
'
f
'
{
inst
.
hdcopy_path
(
img
=
disk
,
format
=
"qcow2"
)
}
'
)
)
task
=
asyncio
.
create_task
(
task
=
asyncio
.
create_task
(
inst
.
executor
.
run_cmdlist
(
label
=
"prepare"
,
cmds
=
prep_cmds
,
verbose
=
True
)
inst
.
executor
.
run_cmdlist
(
label
=
"prepare"
,
cmds
=
prep_cmds
,
verbose
=
True
)
)
)
await
task
await
task
def
run_cmd
(
self
,
env
:
ExpEnv
)
->
str
:
def
run_cmd
(
self
,
env
:
ExpEnv
)
->
str
:
...
...
experiments/simbricks/orchestration/simulation/net/net_base.py
View file @
d8a9599a
...
@@ -66,7 +66,7 @@ class WireNet(NetSim):
...
@@ -66,7 +66,7 @@ class WireNet(NetSim):
super
().
add
(
wire
)
super
().
add
(
wire
)
def
run_cmd
(
self
,
inst
:
inst_base
.
Instantiation
)
->
str
:
def
run_cmd
(
self
,
inst
:
inst_base
.
Instantiation
)
->
str
:
channels
=
self
.
_
get_channels
(
inst
=
inst
)
channels
=
self
.
get_channels
()
eth_latency
,
sync_period
,
sync
=
(
eth_latency
,
sync_period
,
sync
=
(
sim_base
.
Simulator
.
get_unique_latency_period_sync
(
channels
=
channels
)
sim_base
.
Simulator
.
get_unique_latency_period_sync
(
channels
=
channels
)
)
)
...
@@ -105,7 +105,7 @@ class SwitchNet(NetSim):
...
@@ -105,7 +105,7 @@ class SwitchNet(NetSim):
super
().
add
(
switch_spec
)
super
().
add
(
switch_spec
)
def
run_cmd
(
self
,
inst
:
inst_base
.
Instantiation
)
->
str
:
def
run_cmd
(
self
,
inst
:
inst_base
.
Instantiation
)
->
str
:
channels
=
self
.
_
get_channels
(
inst
=
inst
)
channels
=
self
.
get_channels
()
eth_latency
,
sync_period
,
run_sync
=
(
eth_latency
,
sync_period
,
run_sync
=
(
sim_base
.
Simulator
.
get_unique_latency_period_sync
(
channels
=
channels
)
sim_base
.
Simulator
.
get_unique_latency_period_sync
(
channels
=
channels
)
)
)
...
...
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