Unverified Commit a3a041bc authored by Jakob Görgen's avatar Jakob Görgen
Browse files

disk image + fixed socket path

parent 5eac59d3
...@@ -214,7 +214,7 @@ class Instantiation(util_base.IdObj): ...@@ -214,7 +214,7 @@ class Instantiation(util_base.IdObj):
print(f"_interface_to_sock_path: self._env._shm_base={self.shm_base_dir()}") print(f"_interface_to_sock_path: self._env._shm_base={self.shm_base_dir()}")
return self._join_paths( return self._join_paths(
base=self.shm_base_dir(), base=self.shm_base_dir(),
relative_path=f"{queue_type}/{queue_ident}", relative_path=f"{queue_type}-{queue_ident}",
enforce_existence=False, enforce_existence=False,
) )
......
...@@ -29,11 +29,11 @@ import simbricks.orchestration.simulation.base as sim_base ...@@ -29,11 +29,11 @@ import simbricks.orchestration.simulation.base as sim_base
import simbricks.orchestration.system as system import simbricks.orchestration.system as system
from simbricks.orchestration.instantiation import base as inst_base from simbricks.orchestration.instantiation import base as inst_base
from simbricks.orchestration.experiment.experiment_environment_new import ExpEnv from simbricks.orchestration.experiment.experiment_environment_new import ExpEnv
from simbricks.orchestration.system import host as sys_host
from simbricks.orchestration.system import pcie as sys_pcie
from simbricks.orchestration.system import mem as sys_mem
if tp.TYPE_CHECKING: # if tp.TYPE_CHECKING:
from simbricks.orchestration.system import host as sys_host
from simbricks.orchestration.system import mem as sys_mem
from simbricks.orchestration.system import pcie as sys_pcie
class HostSim(sim_base.Simulator): class HostSim(sim_base.Simulator):
......
...@@ -138,6 +138,7 @@ class SwitchNet(NetSim): ...@@ -138,6 +138,7 @@ class SwitchNet(NetSim):
for sock in listen: for sock in listen:
cmd += " -h " + sock._path cmd += " -h " + sock._path
print(f"SWITCH NET CMD!!! ===== {cmd}")
return cmd return cmd
......
...@@ -70,13 +70,13 @@ class NICSim(PCIDevSim): ...@@ -70,13 +70,13 @@ class NICSim(PCIDevSim):
pci_devices = self.filter_components_by_type(ty=sys_eth.EthSimpleNIC) pci_devices = self.filter_components_by_type(ty=sys_eth.EthSimpleNIC)
assert len(pci_devices) == 1 assert len(pci_devices) == 1
socket = self._get_socket(inst=inst, interface=pci_devices[0]._eth_if) socket = self._get_socket(inst=inst, interface=pci_devices[0]._eth_if)
assert socket is not None assert socket is not None and socket._type == inst_base.SockType.LISTEN
cmd += f"{socket._path} " cmd += f"{socket._path} "
eth_devices = self.filter_components_by_type(ty=sys_pcie.PCIeSimpleDevice) eth_devices = self.filter_components_by_type(ty=sys_pcie.PCIeSimpleDevice)
assert len(eth_devices) == 1 assert len(eth_devices) == 1
socket = self._get_socket(inst=inst, interface=eth_devices[0]._pci_if) socket = self._get_socket(inst=inst, interface=eth_devices[0]._pci_if)
assert socket is not None assert socket is not None and socket._type == inst_base.SockType.LISTEN
cmd += f"{socket._path} " cmd += f"{socket._path} "
cmd += ( cmd += (
......
...@@ -24,7 +24,7 @@ from __future__ import annotations ...@@ -24,7 +24,7 @@ from __future__ import annotations
import abc import abc
import io import io
import os.path import pathlib
import tarfile import tarfile
import typing as tp import typing as tp
from simbricks.orchestration.utils import base as utils_base from simbricks.orchestration.utils import base as utils_base
...@@ -45,7 +45,12 @@ class DiskImage(utils_base.IdObj): ...@@ -45,7 +45,12 @@ class DiskImage(utils_base.IdObj):
@abc.abstractmethod @abc.abstractmethod
def path(self, inst: inst_base.Instantiation, format: str) -> str: def path(self, inst: inst_base.Instantiation, format: str) -> str:
return raise Exception("must be overwritten")
@staticmethod
def assert_is_file(path: str) -> str:
if not pathlib.Path(path).is_file():
raise Exception(f"path={path} must be a file")
async def _prepare_format(self, inst: inst_base.Instantiation, format: str) -> None: async def _prepare_format(self, inst: inst_base.Instantiation, format: str) -> None:
pass pass
...@@ -70,15 +75,15 @@ class DiskImage(utils_base.IdObj): ...@@ -70,15 +75,15 @@ class DiskImage(utils_base.IdObj):
class ExternalDiskImage(DiskImage): class ExternalDiskImage(DiskImage):
def __init__(self, h: sys_host.FullSystemHost, path: str) -> None: def __init__(self, h: sys_host.FullSystemHost, path: str) -> None:
super().__init__(h) super().__init__(h)
self.path = path self._path = path
self.formats = ["raw", "qcow2"] self.formats = ["raw", "qcow2"]
def available_formats(self) -> list[str]: def available_formats(self) -> list[str]:
return self.formats return self.formats
def path(self, inst: inst_base.Instantiation, format: str) -> str: def path(self, inst: inst_base.Instantiation, format: str) -> str:
assert os.path.isfile(self.path) DiskImage.assert_is_file(self._path)
return self.path return self._path
# Disk images shipped with simbricks # Disk images shipped with simbricks
...@@ -99,8 +104,8 @@ class DistroDiskImage(DiskImage): ...@@ -99,8 +104,8 @@ class DistroDiskImage(DiskImage):
pass pass
else: else:
raise RuntimeError("Unsupported disk format") raise RuntimeError("Unsupported disk format")
assert os.path.isfile(self.path) DiskImage.assert_is_file(path)
return self.path return path
# Abstract base class for dynamically generated images # Abstract base class for dynamically generated images
class DynamicDiskImage(DiskImage): class DynamicDiskImage(DiskImage):
......
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