condrum: checkpoint

corundum/corundum_verilator.cpp

@@ -410,10 +410,12 @@ static void h2d_readcomp(volatile struct cosim_pcie_proto_h2d_readcomp *rc)
 
     memcpy(op->data, (void *) rc->data, op->len);
 
+#if 0
     std::cerr << "dma read comp: ";
     for (size_t i = 0; i < op->len; i++)
         std::cerr << (unsigned) op->data[i] << " ";
     std::cerr << std::endl;
+#endif
 
 
     op->engine->pci_op_complete(op);
@@ -549,11 +551,22 @@ static void poll_h2d(MMIOInterface &mmio)
 class EthernetTx {
     protected:
         Vinterface &top;
+        uint8_t packet_buf[2048];
+        size_t packet_len;
 
     public:
         EthernetTx(Vinterface &top_)
-            : top(top_)
+            : top(top_), packet_len(0)
+        {
+        }
+
+        void packet_done()
         {
+            std::cerr << "packet len=" << std::hex << packet_len << " ";
+            for (size_t i = 0; i < packet_len; i++) {
+                std::cerr << (unsigned) packet_buf[i] << " ";
+            }
+            std::cerr << std::endl;
         }
 
         void step()
@@ -561,10 +574,21 @@ class EthernetTx {
             top.tx_axis_tready = 1;
 
             if (top.tx_axis_tvalid) {
-                std::cerr << "valid data: keep=" << (uintptr_t) top.tx_axis_tkeep <<
-                    " last=" << (bool) top.tx_axis_tlast << "  " << top.tx_axis_tdata << std::endl;
+                /* iterate over all 8 bytes */
+                for (size_t i = 0; i < 8; i++) {
+                    if ((top.tx_axis_tkeep & (1 << i)) != 0) {
+                        assert(packet_len < 2048);
+                        packet_buf[packet_len++] = (top.tx_axis_tdata >> (i * 8));
+                    }
+                }
+
+                if (top.tx_axis_tlast) {
+                    packet_done();
+                    packet_len = 0;
+                }
             }
         }
+
 };
 
 

corundum/dma.cpp

@@ -17,9 +17,9 @@ void DMAReader::step()
         op->tag = p.dma_tag;
         op->write = false;
         pending.insert(op);
-        std::cout << "dma[" << label << "] op " << op->dma_addr << " -> " <<
+        /*std::cout << "dma[" << label << "] op " << op->dma_addr << " -> " <<
             op->ram_sel << ":" << op->ram_addr <<
-            "   len=" << op->len << "   tag=" << (int) op->tag << std::endl;
+            "   len=" << op->len << "   tag=" << (int) op->tag << std::endl;*/
 
         pci_dma_issue(op);
     }
@@ -29,7 +29,7 @@ void DMAReader::step()
         DMAOp *op = completed.front();
         completed.pop_front();
 
-        std::cout << "dma[" << label << "] status complete " << op->dma_addr << std::endl;
+        //std::cout << "dma[" << label << "] status complete " << op->dma_addr << std::endl;
 
         p.dma_status_valid = 1;
         p.dma_status_tag = op->tag;
@@ -46,5 +46,5 @@ void DMAReader::pci_op_complete(DMAOp *op)
 void DMAReader::mem_op_complete(DMAOp *op)
 {
     completed.push_back(op);
-    std::cout << "dma[" << label << "] mem complete " << op->dma_addr << std::endl;
+    //std::cout << "dma[" << label << "] mem complete " << op->dma_addr << std::endl;
 }

corundum/mem.cpp

@@ -18,7 +18,7 @@
 void MemWriter::step()
 {
     if (cur && p.mem_ready) {
-        std::cerr << "completed write to: " << cur->ram_addr << std::endl;
+        //std::cerr << "completed write to: " << cur->ram_addr << std::endl;
         p.mem_valid = 0;
         p.mem_be[0] = p.mem_be[1] = p.mem_be[2] = p.mem_be[3] = 0;
 
@@ -30,10 +30,11 @@ void MemWriter::step()
         cur = pending.front();
         pending.pop_front();
 
-        std::cerr << "issuing write to " << cur->ram_addr << std::endl;
+        //std::cerr << "issuing write to " << cur->ram_addr << std::endl;
 
         size_t data_byte_width = DATA_WIDTH / 8;
         size_t data_offset = cur->ram_addr % data_byte_width;
+
         if (cur->len > data_byte_width - data_offset) {
             std::cerr << "MemWriter::step: cannot be written in one cycle TODO" << std::endl;
             throw "unsupported";
@@ -75,6 +76,6 @@ void MemWriter::step()
 
 void MemWriter::op_issue(DMAOp *op)
 {
-    std::cerr << "enqueued write to " << op->ram_addr << std::endl;
+    //std::cerr << "enqueued write to " << op->ram_addr << std::endl;
     pending.push_back(op);
 }