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ycai
simbricks
Commits
8f883147
Unverified
Commit
8f883147
authored
Jan 08, 2025
by
Jakob Görgen
Browse files
symphony/orchestration/simbricks/orchestration/simulation/host: fixed sock type import
parent
abcda5cd
Changes
1
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1 changed file
with
5 additions
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5 deletions
+5
-5
symphony/orchestration/simbricks/orchestration/simulation/host.py
.../orchestration/simbricks/orchestration/simulation/host.py
+5
-5
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symphony/orchestration/simbricks/orchestration/simulation/host.py
View file @
8f883147
...
@@ -60,8 +60,8 @@ class HostSim(sim_base.Simulator):
...
@@ -60,8 +60,8 @@ class HostSim(sim_base.Simulator):
def
supported_socket_types
(
def
supported_socket_types
(
self
,
interface
:
system
.
Interface
self
,
interface
:
system
.
Interface
)
->
set
[
inst_
base
.
SockType
]:
)
->
set
[
inst_
socket
.
SockType
]:
return
{
inst_
base
.
SockType
.
CONNECT
}
return
{
inst_
socket
.
SockType
.
CONNECT
}
class
Gem5Sim
(
HostSim
):
class
Gem5Sim
(
HostSim
):
...
@@ -183,7 +183,7 @@ class Gem5Sim(HostSim):
...
@@ -183,7 +183,7 @@ class Gem5Sim(HostSim):
socket
=
inst
.
get_socket
(
interface
=
inf
)
socket
=
inst
.
get_socket
(
interface
=
inf
)
if
socket
is
None
:
if
socket
is
None
:
continue
continue
assert
socket
.
_type
==
inst_
base
.
SockType
.
CONNECT
assert
socket
.
_type
==
inst_
socket
.
SockType
.
CONNECT
cmd
+=
(
cmd
+=
(
f
"--simbricks-pci=connect:
{
socket
.
_path
}
"
f
"--simbricks-pci=connect:
{
socket
.
_path
}
"
f
":latency=
{
latency
}
ns"
f
":latency=
{
latency
}
ns"
...
@@ -200,7 +200,7 @@ class Gem5Sim(HostSim):
...
@@ -200,7 +200,7 @@ class Gem5Sim(HostSim):
socket
=
inst
.
get_socket
(
interface
=
inf
)
socket
=
inst
.
get_socket
(
interface
=
inf
)
if
socket
is
None
:
if
socket
is
None
:
continue
continue
assert
socket
.
_type
==
inst_
base
.
SockType
.
CONNECT
assert
socket
.
_type
==
inst_
socket
.
SockType
.
CONNECT
utils_base
.
has_expected_type
(
inf
.
component
,
sys_mem
.
MemSimpleDevice
)
utils_base
.
has_expected_type
(
inf
.
component
,
sys_mem
.
MemSimpleDevice
)
dev
:
sys_mem
.
MemSimpleDevice
=
inf
.
component
dev
:
sys_mem
.
MemSimpleDevice
=
inf
.
component
cmd
+=
(
cmd
+=
(
...
@@ -338,7 +338,7 @@ class QemuSim(HostSim):
...
@@ -338,7 +338,7 @@ class QemuSim(HostSim):
socket
=
inst
.
get_socket
(
interface
=
inf
)
socket
=
inst
.
get_socket
(
interface
=
inf
)
if
socket
is
None
:
if
socket
is
None
:
continue
continue
assert
socket
.
_type
is
inst_
base
.
SockType
.
CONNECT
assert
socket
.
_type
is
inst_
socket
.
SockType
.
CONNECT
cmd
+=
f
"-device simbricks-pci,socket=
{
socket
.
_path
}
"
cmd
+=
f
"-device simbricks-pci,socket=
{
socket
.
_path
}
"
if
sync
:
if
sync
:
cmd
+=
",sync=on"
cmd
+=
",sync=on"
...
...
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