Commit 6b97ce18 authored by Antoine Kaufmann's avatar Antoine Kaufmann
Browse files

i40e: add icr0 register

parent bdf29016
...@@ -212,6 +212,12 @@ uint32_t i40e_bm::reg_mem_read32(uint64_t addr) ...@@ -212,6 +212,12 @@ uint32_t i40e_bm::reg_mem_read32(uint64_t addr)
val = regs.pfint_icr0_ena; val = regs.pfint_icr0_ena;
break; break;
case I40E_PFINT_ICR0:
val = regs.pfint_icr0;
// read clears
regs.pfint_icr0 = 0;
break;
case I40E_GLPCI_CNF2: case I40E_GLPCI_CNF2:
val = ((NUM_PFINTS - 2) << I40E_GLPCI_CNF2_MSI_X_PF_N_SHIFT) | val = ((NUM_PFINTS - 2) << I40E_GLPCI_CNF2_MSI_X_PF_N_SHIFT) |
(2 << I40E_GLPCI_CNF2_MSI_X_VF_N_SHIFT); /* that is ugly, (2 << I40E_GLPCI_CNF2_MSI_X_VF_N_SHIFT); /* that is ugly,
...@@ -439,6 +445,9 @@ void i40e_bm::reg_mem_write32(uint64_t addr, uint32_t val) ...@@ -439,6 +445,9 @@ void i40e_bm::reg_mem_write32(uint64_t addr, uint32_t val)
case I40E_PFINT_ICR0_ENA: case I40E_PFINT_ICR0_ENA:
regs.pfint_icr0_ena = val; regs.pfint_icr0_ena = val;
break; break;
case I40E_PFINT_ICR0:
regs.pfint_icr0 = val;
break;
case I40E_PFHMC_SDCMD: case I40E_PFHMC_SDCMD:
regs.pfhmc_sdcmd = val; regs.pfhmc_sdcmd = val;
......
...@@ -265,6 +265,7 @@ protected: ...@@ -265,6 +265,7 @@ protected:
uint32_t gllan_rctl_0; uint32_t gllan_rctl_0;
uint32_t pfint_lnklst0; uint32_t pfint_lnklst0;
uint32_t pfint_icr0_ena; uint32_t pfint_icr0_ena;
uint32_t pfint_icr0;
uint32_t pfint_dyn_ctln[NUM_PFINTS - 1]; uint32_t pfint_dyn_ctln[NUM_PFINTS - 1];
uint32_t pfint_lnklstn[NUM_PFINTS - 1]; uint32_t pfint_lnklstn[NUM_PFINTS - 1];
......
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