Commit 414f8b28 authored by Hejing Li's avatar Hejing Li
Browse files

add dctcp gem5 data

parent 0c0732b4
{"exp_name": "gt-ib-dumbbell-DCTCPm74880-4000", "start_time": 1607019298.401945, "end_time": 1607056069.9488306, "sims": {"nic.server.0.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm74880-4000/1/nic.pci.server.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm74880-4000/1/nic.eth.server.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm74880-4000/1/nic.shm.server.0.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["4ca90aa4789c", "sync_pci=1 sync_eth=1", "exit main_time: 15643564026000"]}, "nic.server.1.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm74880-4000/1/nic.pci.server.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm74880-4000/1/nic.eth.server.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm74880-4000/1/nic.shm.server.1.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["5796c72cdfc0", "sync_pci=1 sync_eth=1", "exit main_time: 15643564118000"]}, "nic.client.0.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm74880-4000/1/nic.pci.client.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm74880-4000/1/nic.eth.client.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm74880-4000/1/nic.shm.client.0.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["15707ac6f494", "sync_pci=1 sync_eth=1", "exit main_time: 15643564121000"]}, "nic.client.1.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm74880-4000/1/nic.pci.client.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm74880-4000/1/nic.eth.client.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm74880-4000/1/nic.shm.client.1.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["7010fc8628a0", "sync_pci=1 sync_eth=1", "exit main_time: 15643563157400"]}, "net.": {"class": "NS3DumbbellNet", "cmd": ["/home/hejingli/endhostsim-code/ns-3/cosim-run.sh", "cosim", "cosim-dumbbell-example", "--CosimPortLeft=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm74880-4000/1/nic.eth.server.0.", "--CosimPortLeft=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm74880-4000/1/nic.eth.server.1.", "--CosimPortRight=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm74880-4000/1/nic.eth.client.0.", "--CosimPortRight=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm74880-4000/1/nic.eth.client.1.", "--LinkRate=10Gb/s", "--LinkLatency=500ns", "--EcnTh=74880"], "stdout": [], "stderr": []}, "host.server.0": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm74880-4000/1/gem5-out.server.0", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm74880-4000/0/gem5-cp.server.0", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm74880-4000/1/cfg.server.0.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm74880-4000/1/nic.pci.server.0.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm74880-4000/1/nic.shm.server.0.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:15:00", "gem5 executing on spyder11, pid 51307", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm74880-4000/1/gem5-out.server.0 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm74880-4000/0/gem5-cp.server.0 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm74880-4000/1/cfg.server.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm74880-4000/1/nic.pci.server.0. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm74880-4000/1/nic.shm.server.0. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2205734727400", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.048892] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.048892] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.048892] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.048892] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.056891] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.056891] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.174873] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.175872] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.175872] i40e 0000:00:02.0: MAC address: 9c:78:a4:0a:a9:4c\r", "[ 1.175872] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.177872] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.255860] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.255860] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.255860] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.255860] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.351846] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 4000 up\r", "[ 1.359844] i40e 0000:00:02.0 eth0: changing MTU from 1500 to 4000\r", "[ 1.365844] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.1/24 dev eth0\r", "+ iperf -s -w 1M -Z dctcp\r", "------------------------------------------------------------\r", "Server listening on TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 5] local 192.168.64.1 port 5001 connected with 192.168.64.3 port 39566\r", "[ 2.340695] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 5] 0.0-10.0 sec 4.92 GBytes 4.22 Gbits/sec\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2205734717400. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2205734727400. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.server.1": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm74880-4000/1/gem5-out.server.1", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm74880-4000/0/gem5-cp.server.1", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm74880-4000/1/cfg.server.1.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm74880-4000/1/nic.pci.server.1.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm74880-4000/1/nic.shm.server.1.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:15:00", "gem5 executing on spyder11, pid 51321", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm74880-4000/1/gem5-out.server.1 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm74880-4000/0/gem5-cp.server.1 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm74880-4000/1/cfg.server.1.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm74880-4000/1/nic.pci.server.1. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm74880-4000/1/nic.shm.server.1. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2185190045800", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.046892] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.046892] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.046892] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.046892] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.054891] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.054891] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.172873] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.173873] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.173873] i40e 0000:00:02.0: MAC address: c0:df:2c:c7:96:57\r", "[ 1.173873] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.175873] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.255861] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.255861] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.255861] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.255861] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.351846] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 4000 up\r", "[ 1.359845] i40e 0000:00:02.0 eth0: changing MTU from 1500 to 4000\r", "[ 1.365844] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.2/24 dev eth0\r", "+ iperf -s -w 1M -Z dctcp\r", "------------------------------------------------------------\r", "Server listening on TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 5] local 192.168.64.2 port 5001 connected with 192.168.64.4 port 48174\r", "[ 2.500671] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 5] 0.0-10.0 sec 4.92 GBytes 4.22 Gbits/sec\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2185190035800. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2185190045800. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.client.0": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm74880-4000/1/gem5-out.client.0", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm74880-4000/0/gem5-cp.client.0", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm74880-4000/1/cfg.client.0.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm74880-4000/1/nic.pci.client.0.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm74880-4000/1/nic.shm.client.0.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:15:00", "gem5 executing on spyder11, pid 51326", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm74880-4000/1/gem5-out.client.0 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm74880-4000/0/gem5-cp.client.0 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm74880-4000/1/cfg.client.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm74880-4000/1/nic.pci.client.0. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm74880-4000/1/nic.shm.client.0. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2139039509400", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.037892] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.037892] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.037892] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.037892] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.045891] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.045891] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.163873] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.164873] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.164873] i40e 0000:00:02.0: MAC address: 94:f4:c6:7a:70:15\r", "[ 1.164873] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.167872] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.247860] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.247860] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.247860] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.247860] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.343846] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 4000 up\r", "[ 1.351844] i40e 0000:00:02.0 eth0: changing MTU from 1500 to 4000\r", "[ 1.357844] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.3/24 dev eth0\r", "+ sleep 1\r", "+ iperf -w 1M -c 192.168.64.1 -Z dctcp -i 1\r", "------------------------------------------------------------\r", "Client connecting to 192.168.64.1, TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 4] local 192.168.64.3 port 39566 connected with 192.168.64.1 port 5001\r", "[ 2.509668] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 4] 0.0- 1.0 sec 528 MBytes 4.42 Gbits/sec\r", "[ 4] 1.0- 2.0 sec 502 MBytes 4.21 Gbits/sec\r", "[ 4] 2.0- 3.0 sec 509 MBytes 4.27 Gbits/sec\r", "[ 4] 3.0- 4.0 sec 496 MBytes 4.16 Gbits/sec\r", "[ 4] 4.0- 5.0 sec 494 MBytes 4.15 Gbits/sec\r", "[ 4] 5.0- 6.0 sec 499 MBytes 4.19 Gbits/sec\r", "[ 4] 6.0- 7.0 sec 491 MBytes 4.12 Gbits/sec\r", "[ 4] 7.0- 8.0 sec 502 MBytes 4.21 Gbits/sec\r", "[ 4] 8.0- 9.0 sec 513 MBytes 4.31 Gbits/sec\r", "[ 4] 9.0-10.0 sec 499 MBytes 4.19 Gbits/sec\r", "[ 4] 0.0-10.0 sec 4.92 GBytes 4.22 Gbits/sec\r", "+ sleep 20\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2139039499400. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2139039509400. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14", "warn: PowerState: More than one power state change request encountered within the same simulation tick"]}, "host.client.1": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm74880-4000/1/gem5-out.client.1", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm74880-4000/0/gem5-cp.client.1", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm74880-4000/1/cfg.client.1.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm74880-4000/1/nic.pci.client.1.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm74880-4000/1/nic.shm.client.1.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:15:00", "gem5 executing on spyder11, pid 51335", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm74880-4000/1/gem5-out.client.1 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm74880-4000/0/gem5-cp.client.1 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm74880-4000/1/cfg.client.1.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm74880-4000/1/nic.pci.client.1. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm74880-4000/1/nic.shm.client.1. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2280399753400", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.080887] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.080887] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.080887] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.080887] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.088885] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.088885] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.206867] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.207867] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.207867] i40e 0000:00:02.0: MAC address: a0:28:86:fc:10:70\r", "[ 1.207867] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.209867] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.287855] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.287855] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.287855] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.287855] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.383841] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 4000 up\r", "[ 1.391839] i40e 0000:00:02.0 eth0: changing MTU from 1500 to 4000\r", "[ 1.397839] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.4/24 dev eth0\r", "+ sleep 1\r", "+ iperf -w 1M -c 192.168.64.2 -Z dctcp -i 1\r", "------------------------------------------------------------\r", "Client connecting to 192.168.64.2, TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 4] local 192.168.64.4 port 48174 connected with 192.168.64.2 port 5001\r", "[ 2.521668] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 4] 0.0- 1.0 sec 487 MBytes 4.08 Gbits/sec\r", "[ 4] 1.0- 2.0 sec 503 MBytes 4.22 Gbits/sec\r", "[ 4] 2.0- 3.0 sec 503 MBytes 4.22 Gbits/sec\r", "[ 4] 3.0- 4.0 sec 504 MBytes 4.23 Gbits/sec\r", "[ 4] 4.0- 5.0 sec 506 MBytes 4.25 Gbits/sec\r", "[ 4] 5.0- 6.0 sec 505 MBytes 4.24 Gbits/sec\r", "[ 4] 6.0- 7.0 sec 519 MBytes 4.36 Gbits/sec\r", "[ 4] 7.0- 8.0 sec 499 MBytes 4.19 Gbits/sec\r", "[ 4] 8.0- 9.0 sec 490 MBytes 4.11 Gbits/sec\r", "[ 4] 9.0-10.0 sec 518 MBytes 4.35 Gbits/sec\r", "[ 4] 0.0-10.0 sec 4.92 GBytes 4.22 Gbits/sec\r", "+ sleep 2\r", "+ m5 exit\r", "Exiting @ tick 15643562843600 because m5_exit instruction encountered"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2280399743400. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2280399753400. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14", "warn: PowerState: More than one power state change request encountered within the same simulation tick"]}}, "success": true}
\ No newline at end of file
{"exp_name": "gt-ib-dumbbell-DCTCPm8320-1500", "start_time": 1607019295.1291687, "end_time": 1607062943.8278768, "sims": {"nic.server.0.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm8320-1500/1/nic.pci.server.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm8320-1500/1/nic.eth.server.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm8320-1500/1/nic.shm.server.0.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["1a69173c6f7c", "sync_pci=1 sync_eth=1", "exit main_time: 15693162346000"]}, "nic.server.1.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm8320-1500/1/nic.pci.server.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm8320-1500/1/nic.eth.server.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm8320-1500/1/nic.shm.server.1.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["3b7c6df16514", "sync_pci=1 sync_eth=1", "exit main_time: 15693162337000"]}, "nic.client.0.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm8320-1500/1/nic.pci.client.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm8320-1500/1/nic.eth.client.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm8320-1500/1/nic.shm.client.0.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["5c8f6b265aa8", "sync_pci=1 sync_eth=1", "exit main_time: 15693162283000"]}, "nic.client.1.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm8320-1500/1/nic.pci.client.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm8320-1500/1/nic.eth.client.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm8320-1500/1/nic.shm.client.1.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["e2be0f24b0c", "sync_pci=1 sync_eth=1", "exit main_time: 15693161816400"]}, "net.": {"class": "NS3DumbbellNet", "cmd": ["/home/hejingli/endhostsim-code/ns-3/cosim-run.sh", "cosim", "cosim-dumbbell-example", "--CosimPortLeft=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm8320-1500/1/nic.eth.server.0.", "--CosimPortLeft=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm8320-1500/1/nic.eth.server.1.", "--CosimPortRight=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm8320-1500/1/nic.eth.client.0.", "--CosimPortRight=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm8320-1500/1/nic.eth.client.1.", "--LinkRate=10Gb/s", "--LinkLatency=500ns", "--EcnTh=8320"], "stdout": [], "stderr": []}, "host.server.0": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm8320-1500/1/gem5-out.server.0", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm8320-1500/0/gem5-cp.server.0", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm8320-1500/1/cfg.server.0.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm8320-1500/1/nic.pci.server.0.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm8320-1500/1/nic.shm.server.0.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:57", "gem5 executing on spyder07, pid 46993", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm8320-1500/1/gem5-out.server.0 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm8320-1500/0/gem5-cp.server.0 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm8320-1500/1/cfg.server.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm8320-1500/1/nic.pci.server.0. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm8320-1500/1/nic.shm.server.0. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2349753023600", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.096886] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.096886] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.096886] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.096886] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.103885] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.103885] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.222867] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.223866] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.223866] i40e 0000:00:02.0: MAC address: 7c:6f:3c:17:69:1a\r", "[ 1.223866] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.225866] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.303854] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.303854] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.303854] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.303854] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.399840] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 1500 up\r", "[ 1.413838] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.1/24 dev eth0\r", "+ iperf -s -w 1M -Z dctcp\r", "------------------------------------------------------------\r", "Server listening on TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 5] local 192.168.64.1 port 5001 connected with 192.168.64.3 port 56828\r", "[ 2.367692] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 5] 0.0-10.0 sec 2.52 GBytes 2.17 Gbits/sec\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2349753013600. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2349753023600. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.server.1": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm8320-1500/1/gem5-out.server.1", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm8320-1500/0/gem5-cp.server.1", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm8320-1500/1/cfg.server.1.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm8320-1500/1/nic.pci.server.1.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm8320-1500/1/nic.shm.server.1.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:57", "gem5 executing on spyder07, pid 47002", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm8320-1500/1/gem5-out.server.1 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm8320-1500/0/gem5-cp.server.1 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm8320-1500/1/cfg.server.1.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm8320-1500/1/nic.pci.server.1. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm8320-1500/1/nic.shm.server.1. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2302014322600", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.073887] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.073887] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.073887] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.073887] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.080886] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.081886] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.199868] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.200868] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.200868] i40e 0000:00:02.0: MAC address: 14:65:f1:6d:7c:3b\r", "[ 1.200868] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.202868] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.287855] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.287855] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.287855] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.287855] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.383840] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 1500 up\r", "[ 1.396838] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.2/24 dev eth0\r", "+ iperf -s -w 1M -Z dctcp\r", "------------------------------------------------------------\r", "Server listening on TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 5] local 192.168.64.2 port 5001 connected with 192.168.64.4 port 54646\r", "[ 2.469675] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 5] 0.0-10.0 sec 2.52 GBytes 2.16 Gbits/sec\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2302014312600. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2302014322600. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14", "warn: PowerState: More than one power state change request encountered within the same simulation tick"]}, "host.client.0": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm8320-1500/1/gem5-out.client.0", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm8320-1500/0/gem5-cp.client.0", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm8320-1500/1/cfg.client.0.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm8320-1500/1/nic.pci.client.0.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm8320-1500/1/nic.shm.client.0.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:57", "gem5 executing on spyder07, pid 47012", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm8320-1500/1/gem5-out.client.0 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm8320-1500/0/gem5-cp.client.0 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm8320-1500/1/cfg.client.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm8320-1500/1/nic.pci.client.0. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm8320-1500/1/nic.shm.client.0. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2255177645200", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.062889] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.062889] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.062889] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.062889] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.069888] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.069888] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.187870] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.188870] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.189870] i40e 0000:00:02.0: MAC address: a8:5a:26:6b:8f:5c\r", "[ 1.189870] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.191869] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.271857] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.271857] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.271857] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.271857] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.367842] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 1500 up\r", "[ 1.381841] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.3/24 dev eth0\r", "+ sleep 1\r", "+ iperf -w 1M -c 192.168.64.1 -Z dctcp -i 1\r", "------------------------------------------------------------\r", "Client connecting to 192.168.64.1, TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 4] local 192.168.64.3 port 56828 connected with 192.168.64.1 port 5001\r", "[ 2.462676] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 4] 0.0- 1.0 sec 260 MBytes 2.18 Gbits/sec\r", "[ 4] 1.0- 2.0 sec 258 MBytes 2.16 Gbits/sec\r", "[ 4] 2.0- 3.0 sec 258 MBytes 2.16 Gbits/sec\r", "[ 4] 3.0- 4.0 sec 258 MBytes 2.17 Gbits/sec\r", "[ 4] 4.0- 5.0 sec 258 MBytes 2.16 Gbits/sec\r", "[ 4] 5.0- 6.0 sec 258 MBytes 2.17 Gbits/sec\r", "[ 4] 6.0- 7.0 sec 259 MBytes 2.18 Gbits/sec\r", "[ 4] 7.0- 8.0 sec 258 MBytes 2.17 Gbits/sec\r", "[ 4] 8.0- 9.0 sec 257 MBytes 2.15 Gbits/sec\r", "[ 4] 9.0-10.0 sec 259 MBytes 2.17 Gbits/sec\r", "[ 4] 0.0-10.0 sec 2.52 GBytes 2.17 Gbits/sec\r", "+ sleep 20\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2255177635200. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2255177645200. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14", "warn: PowerState: More than one power state change request encountered within the same simulation tick", "warn: PowerState: More than one power state change request encountered within the same simulation tick"]}, "host.client.1": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm8320-1500/1/gem5-out.client.1", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm8320-1500/0/gem5-cp.client.1", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm8320-1500/1/cfg.client.1.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm8320-1500/1/nic.pci.client.1.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm8320-1500/1/nic.shm.client.1.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:57", "gem5 executing on spyder07, pid 47020", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm8320-1500/1/gem5-out.client.1 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm8320-1500/0/gem5-cp.client.1 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm8320-1500/1/cfg.client.1.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm8320-1500/1/nic.pci.client.1. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm8320-1500/1/nic.shm.client.1. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2331428188000", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.079887] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.079887] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.079887] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.079887] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.086886] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.086886] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.204868] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.205868] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.206868] i40e 0000:00:02.0: MAC address: 0c:4b:f2:e0:2b:0e\r", "[ 1.206868] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.208867] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.287855] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.287855] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.287855] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.287855] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.383841] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 1500 up\r", "[ 1.397839] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.4/24 dev eth0\r", "+ sleep 1\r", "+ iperf -w 1M -c 192.168.64.2 -Z dctcp -i 1\r", "------------------------------------------------------------\r", "Client connecting to 192.168.64.2, TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 4] local 192.168.64.4 port 54646 connected with 192.168.64.2 port 5001\r", "[ 2.473675] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 4] 0.0- 1.0 sec 257 MBytes 2.16 Gbits/sec\r", "[ 4] 1.0- 2.0 sec 257 MBytes 2.15 Gbits/sec\r", "[ 4] 2.0- 3.0 sec 258 MBytes 2.16 Gbits/sec\r", "[ 4] 3.0- 4.0 sec 256 MBytes 2.15 Gbits/sec\r", "[ 4] 4.0- 5.0 sec 256 MBytes 2.15 Gbits/sec\r", "[ 4] 5.0- 6.0 sec 258 MBytes 2.16 Gbits/sec\r", "[ 4] 6.0- 7.0 sec 258 MBytes 2.16 Gbits/sec\r", "[ 4] 7.0- 8.0 sec 258 MBytes 2.17 Gbits/sec\r", "[ 4] 8.0- 9.0 sec 258 MBytes 2.16 Gbits/sec\r", "[ 4] 9.0-10.0 sec 260 MBytes 2.18 Gbits/sec\r", "[ 4] 0.0-10.0 sec 2.52 GBytes 2.16 Gbits/sec\r", "+ sleep 2\r", "+ m5 exit\r", "Exiting @ tick 15693161421400 because m5_exit instruction encountered"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2331428178000. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2331428188000. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}}, "success": true}
\ No newline at end of file
{"exp_name": "gt-ib-dumbbell-DCTCPm8320-4000", "start_time": 1607019296.2342272, "end_time": 1607054748.08811, "sims": {"nic.server.0.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm8320-4000/1/nic.pci.server.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm8320-4000/1/nic.eth.server.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm8320-4000/1/nic.shm.server.0.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["492f6f10ecfc", "sync_pci=1 sync_eth=1", "exit main_time: 15656712404000"]}, "nic.server.1.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm8320-4000/1/nic.pci.server.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm8320-4000/1/nic.eth.server.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm8320-4000/1/nic.shm.server.1.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["1792a805fc9c", "sync_pci=1 sync_eth=1", "exit main_time: 15656712409000"]}, "nic.client.0.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm8320-4000/1/nic.pci.client.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm8320-4000/1/nic.eth.client.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm8320-4000/1/nic.shm.client.0.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["65f5bfea0c38", "sync_pci=1 sync_eth=1", "exit main_time: 15656712363000"]}, "nic.client.1.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm8320-4000/1/nic.pci.client.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm8320-4000/1/nic.eth.client.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm8320-4000/1/nic.shm.client.1.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["23cfe950210c", "sync_pci=1 sync_eth=1", "exit main_time: 15656711686400"]}, "net.": {"class": "NS3DumbbellNet", "cmd": ["/home/hejingli/endhostsim-code/ns-3/cosim-run.sh", "cosim", "cosim-dumbbell-example", "--CosimPortLeft=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm8320-4000/1/nic.eth.server.0.", "--CosimPortLeft=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm8320-4000/1/nic.eth.server.1.", "--CosimPortRight=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm8320-4000/1/nic.eth.client.0.", "--CosimPortRight=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm8320-4000/1/nic.eth.client.1.", "--LinkRate=10Gb/s", "--LinkLatency=500ns", "--EcnTh=8320"], "stdout": [], "stderr": []}, "host.server.0": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm8320-4000/1/gem5-out.server.0", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm8320-4000/0/gem5-cp.server.0", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm8320-4000/1/cfg.server.0.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm8320-4000/1/nic.pci.server.0.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm8320-4000/1/nic.shm.server.0.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:58", "gem5 executing on spyder10, pid 56863", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm8320-4000/1/gem5-out.server.0 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm8320-4000/0/gem5-cp.server.0 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm8320-4000/1/cfg.server.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm8320-4000/1/nic.pci.server.0. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm8320-4000/1/nic.shm.server.0. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2281734334600", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.066889] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.066889] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.066889] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.066889] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.073888] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.073888] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.192870] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.193870] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.193870] i40e 0000:00:02.0: MAC address: fc:ec:10:6f:2f:49\r", "[ 1.193870] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.195869] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.279856] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.279856] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.279856] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.279856] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.375842] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 4000 up\r", "[ 1.383841] i40e 0000:00:02.0 eth0: changing MTU from 1500 to 4000\r", "[ 1.389840] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.1/24 dev eth0\r", "+ iperf -s -w 1M -Z dctcp\r", "------------------------------------------------------------\r", "Server listening on TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 5] local 192.168.64.1 port 5001 connected with 192.168.64.3 port 38598\r", "[ 2.437680] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 5] 0.0-10.0 sec 3.61 GBytes 3.10 Gbits/sec\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2281734324600. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2281734334600. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.server.1": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm8320-4000/1/gem5-out.server.1", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm8320-4000/0/gem5-cp.server.1", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm8320-4000/1/cfg.server.1.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm8320-4000/1/nic.pci.server.1.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm8320-4000/1/nic.shm.server.1.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:58", "gem5 executing on spyder10, pid 56873", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm8320-4000/1/gem5-out.server.1 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm8320-4000/0/gem5-cp.server.1 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm8320-4000/1/cfg.server.1.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm8320-4000/1/nic.pci.server.1. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm8320-4000/1/nic.shm.server.1. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2303941683000", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.074888] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.074888] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.074888] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.074888] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.081887] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.082887] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.200869] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.201868] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.201868] i40e 0000:00:02.0: MAC address: 9c:fc:05:a8:92:17\r", "[ 1.201868] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.203868] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.287855] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.287855] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.287855] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.287855] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.383841] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 4000 up\r", "[ 1.391840] i40e 0000:00:02.0 eth0: changing MTU from 1500 to 4000\r", "[ 1.397839] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.2/24 dev eth0\r", "+ iperf -s -w 1M -Z dctcp\r", "------------------------------------------------------------\r", "Server listening on TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 5] local 192.168.64.2 port 5001 connected with 192.168.64.4 port 43914\r", "[ 2.428682] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 5] 0.0-10.0 sec 3.60 GBytes 3.09 Gbits/sec\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2303941673000. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2303941683000. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.client.0": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm8320-4000/1/gem5-out.client.0", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm8320-4000/0/gem5-cp.client.0", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm8320-4000/1/cfg.client.0.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm8320-4000/1/nic.pci.client.0.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm8320-4000/1/nic.shm.client.0.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:58", "gem5 executing on spyder10, pid 56877", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm8320-4000/1/gem5-out.client.0 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm8320-4000/0/gem5-cp.client.0 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm8320-4000/1/cfg.client.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm8320-4000/1/nic.pci.client.0. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm8320-4000/1/nic.shm.client.0. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2285511393200", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.069889] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.069889] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.069889] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.069889] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.077888] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.077888] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.195870] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.196870] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.196870] i40e 0000:00:02.0: MAC address: 38:0c:ea:bf:f5:65\r", "[ 1.196870] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.199869] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.279857] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.279857] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.279857] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.279857] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.375843] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 4000 up\r", "[ 1.383841] i40e 0000:00:02.0 eth0: changing MTU from 1500 to 4000\r", "[ 1.389841] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.3/24 dev eth0\r", "+ sleep 1\r", "+ iperf -w 1M -c 192.168.64.1 -Z dctcp -i 1\r", "------------------------------------------------------------\r", "Client connecting to 192.168.64.1, TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 4] local 192.168.64.3 port 38598 connected with 192.168.64.1 port 5001\r", "[ 2.472676] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 4] 0.0- 1.0 sec 371 MBytes 3.11 Gbits/sec\r", "[ 4] 1.0- 2.0 sec 370 MBytes 3.10 Gbits/sec\r", "[ 4] 2.0- 3.0 sec 370 MBytes 3.11 Gbits/sec\r", "[ 4] 3.0- 4.0 sec 368 MBytes 3.09 Gbits/sec\r", "[ 4] 4.0- 5.0 sec 370 MBytes 3.10 Gbits/sec\r", "[ 4] 5.0- 6.0 sec 370 MBytes 3.10 Gbits/sec\r", "[ 4] 6.0- 7.0 sec 371 MBytes 3.11 Gbits/sec\r", "[ 4] 7.0- 8.0 sec 370 MBytes 3.11 Gbits/sec\r", "[ 4] 8.0- 9.0 sec 369 MBytes 3.10 Gbits/sec\r", "[ 4] 9.0-10.0 sec 370 MBytes 3.10 Gbits/sec\r", "[ 4] 0.0-10.0 sec 3.61 GBytes 3.10 Gbits/sec\r", "+ sleep 20\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2285511383200. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2285511393200. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14", "warn: PowerState: More than one power state change request encountered within the same simulation tick", "warn: PowerState: More than one power state change request encountered within the same simulation tick"]}, "host.client.1": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm8320-4000/1/gem5-out.client.1", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm8320-4000/0/gem5-cp.client.1", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm8320-4000/1/cfg.client.1.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm8320-4000/1/nic.pci.client.1.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm8320-4000/1/nic.shm.client.1.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:58", "gem5 executing on spyder10, pid 56884", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm8320-4000/1/gem5-out.client.1 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm8320-4000/0/gem5-cp.client.1 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm8320-4000/1/cfg.client.1.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm8320-4000/1/nic.pci.client.1. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm8320-4000/1/nic.shm.client.1. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2293026803800", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.063889] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.064888] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.064888] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.064888] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.071887] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.071887] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.189869] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.190869] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.190869] i40e 0000:00:02.0: MAC address: 0c:21:50:e9:cf:23\r", "[ 1.190869] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.193869] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.271857] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.271857] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.271857] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.271857] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.367842] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 4000 up\r", "[ 1.375841] i40e 0000:00:02.0 eth0: changing MTU from 1500 to 4000\r", "[ 1.381840] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.4/24 dev eth0\r", "+ sleep 1\r", "+ iperf -w 1M -c 192.168.64.2 -Z dctcp -i 1\r", "------------------------------------------------------------\r", "Client connecting to 192.168.64.2, TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 4] local 192.168.64.4 port 43914 connected with 192.168.64.2 port 5001\r", "[ 2.464676] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 4] 0.0- 1.0 sec 368 MBytes 3.09 Gbits/sec\r", "[ 4] 1.0- 2.0 sec 370 MBytes 3.10 Gbits/sec\r", "[ 4] 2.0- 3.0 sec 368 MBytes 3.09 Gbits/sec\r", "[ 4] 3.0- 4.0 sec 368 MBytes 3.09 Gbits/sec\r", "[ 4] 4.0- 5.0 sec 369 MBytes 3.09 Gbits/sec\r", "[ 4] 5.0- 6.0 sec 369 MBytes 3.09 Gbits/sec\r", "[ 4] 6.0- 7.0 sec 371 MBytes 3.11 Gbits/sec\r", "[ 4] 7.0- 8.0 sec 370 MBytes 3.10 Gbits/sec\r", "[ 4] 8.0- 9.0 sec 370 MBytes 3.10 Gbits/sec\r", "[ 4] 9.0-10.0 sec 370 MBytes 3.10 Gbits/sec\r", "[ 4] 0.0-10.0 sec 3.60 GBytes 3.10 Gbits/sec\r", "+ sleep 2\r", "+ m5 exit\r", "Exiting @ tick 15656711548400 because m5_exit instruction encountered"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2293026793800. Starting simulation...", "info: Entering event queue @ 2293026803800. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2293026804800. Starting simulation...", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14", "warn: PowerState: More than one power state change request encountered within the same simulation tick", "warn: PowerState: More than one power state change request encountered within the same simulation tick", "warn: PowerState: More than one power state change request encountered within the same simulation tick", "warn: PowerState: More than one power state change request encountered within the same simulation tick"]}}, "success": true}
\ No newline at end of file
{"exp_name": "gt-ib-dumbbell-DCTCPm83200-1500", "start_time": 1607019296.1678925, "end_time": 1607058641.8253317, "sims": {"nic.server.0.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-1500/1/nic.pci.server.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-1500/1/nic.eth.server.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-1500/1/nic.shm.server.0.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["70d45318ac50", "sync_pci=1 sync_eth=1", "exit main_time: 15588657379000"]}, "nic.server.1.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-1500/1/nic.pci.server.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-1500/1/nic.eth.server.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-1500/1/nic.shm.server.1.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["2eae1d62c120", "sync_pci=1 sync_eth=1", "exit main_time: 15588657412000"]}, "nic.client.0.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-1500/1/nic.pci.client.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-1500/1/nic.eth.client.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-1500/1/nic.shm.client.0.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["d9b3d3fcb8c", "sync_pci=1 sync_eth=1", "exit main_time: 15588657454000"]}, "nic.client.1.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-1500/1/nic.pci.client.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-1500/1/nic.eth.client.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-1500/1/nic.shm.client.1.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["7e61b3ac8e08", "sync_pci=1 sync_eth=1", "exit main_time: 15588656954400"]}, "net.": {"class": "NS3DumbbellNet", "cmd": ["/home/hejingli/endhostsim-code/ns-3/cosim-run.sh", "cosim", "cosim-dumbbell-example", "--CosimPortLeft=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-1500/1/nic.eth.server.0.", "--CosimPortLeft=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-1500/1/nic.eth.server.1.", "--CosimPortRight=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-1500/1/nic.eth.client.0.", "--CosimPortRight=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-1500/1/nic.eth.client.1.", "--LinkRate=10Gb/s", "--LinkLatency=500ns", "--EcnTh=83200"], "stdout": [], "stderr": []}, "host.server.0": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-1500/1/gem5-out.server.0", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm83200-1500/0/gem5-cp.server.0", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-1500/1/cfg.server.0.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-1500/1/nic.pci.server.0.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-1500/1/nic.shm.server.0.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:57", "gem5 executing on spyder08, pid 63221", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-1500/1/gem5-out.server.0 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm83200-1500/0/gem5-cp.server.0 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-1500/1/cfg.server.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-1500/1/nic.pci.server.0. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-1500/1/nic.shm.server.0. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2316847331800", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.077888] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.077888] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.077888] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.077888] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.084887] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.084887] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.203868] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.204868] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.204868] i40e 0000:00:02.0: MAC address: 50:ac:18:53:d4:70\r", "[ 1.204868] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.206868] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.287856] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.287856] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.287856] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.287856] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.383841] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 1500 up\r", "[ 1.397839] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.1/24 dev eth0\r", "+ iperf -s -w 1M -Z dctcp\r", "------------------------------------------------------------\r", "Server listening on TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 5] local 192.168.64.1 port 5001 connected with 192.168.64.3 port 38594\r", "[ 2.439681] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 5] 0.0-10.0 sec 3.78 GBytes 3.24 Gbits/sec\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2316847321800. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2316847331800. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.server.1": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-1500/1/gem5-out.server.1", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm83200-1500/0/gem5-cp.server.1", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-1500/1/cfg.server.1.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-1500/1/nic.pci.server.1.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-1500/1/nic.shm.server.1.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:57", "gem5 executing on spyder08, pid 63225", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-1500/1/gem5-out.server.1 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm83200-1500/0/gem5-cp.server.1 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-1500/1/cfg.server.1.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-1500/1/nic.pci.server.1. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-1500/1/nic.shm.server.1. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2274002321400", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.070889] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.070889] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.071889] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.071889] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.078887] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.078887] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.196870] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.197869] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.197869] i40e 0000:00:02.0: MAC address: 20:c1:62:1d:ae:2e\r", "[ 1.197869] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.200869] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.279857] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.279857] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.279857] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.279857] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.375842] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 1500 up\r", "[ 1.389840] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.2/24 dev eth0\r", "+ iperf -s -w 1M -Z dctcp\r", "------------------------------------------------------------\r", "Server listening on TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 5] local 192.168.64.2 port 5001 connected with 192.168.64.4 port 50814\r", "[ 2.383689] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 5] 0.0-10.0 sec 3.78 GBytes 3.25 Gbits/sec\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2274002311400. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2274002321400. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.client.0": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-1500/1/gem5-out.client.0", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm83200-1500/0/gem5-cp.client.0", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-1500/1/cfg.client.0.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-1500/1/nic.pci.client.0.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-1500/1/nic.shm.client.0.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:57", "gem5 executing on spyder08, pid 63227", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-1500/1/gem5-out.client.0 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm83200-1500/0/gem5-cp.client.0 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-1500/1/cfg.client.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-1500/1/nic.pci.client.0. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-1500/1/nic.shm.client.0. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2314875190600", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.061890] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.061890] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.061890] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.061890] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.068889] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.068889] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.187871] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.188871] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.188871] i40e 0000:00:02.0: MAC address: 8c:cb:3f:3d:9b:0d\r", "[ 1.188871] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.190870] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.271858] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.271858] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.271858] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.271858] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.367843] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 1500 up\r", "[ 1.381841] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.3/24 dev eth0\r", "+ sleep 1\r", "+ iperf -w 1M -c 192.168.64.1 -Z dctcp -i 1\r", "------------------------------------------------------------\r", "Client connecting to 192.168.64.1, TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 4] local 192.168.64.3 port 38594 connected with 192.168.64.1 port 5001\r", "[ 2.556663] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 4] 0.0- 1.0 sec 383 MBytes 3.22 Gbits/sec\r", "[ 4] 1.0- 2.0 sec 386 MBytes 3.23 Gbits/sec\r", "[ 4] 2.0- 3.0 sec 384 MBytes 3.22 Gbits/sec\r", "[ 4] 3.0- 4.0 sec 386 MBytes 3.24 Gbits/sec\r", "[ 4] 4.0- 5.0 sec 384 MBytes 3.22 Gbits/sec\r", "[ 4] 5.0- 6.0 sec 385 MBytes 3.23 Gbits/sec\r", "[ 4] 6.0- 7.0 sec 386 MBytes 3.24 Gbits/sec\r", "[ 4] 7.0- 8.0 sec 392 MBytes 3.29 Gbits/sec\r", "[ 4] 8.0- 9.0 sec 388 MBytes 3.25 Gbits/sec\r", "[ 4] 9.0-10.0 sec 392 MBytes 3.29 Gbits/sec\r", "[ 4] 0.0-10.0 sec 3.78 GBytes 3.24 Gbits/sec\r", "+ sleep 20\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2314875180600. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2314875190600. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.client.1": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-1500/1/gem5-out.client.1", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm83200-1500/0/gem5-cp.client.1", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-1500/1/cfg.client.1.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-1500/1/nic.pci.client.1.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-1500/1/nic.shm.client.1.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:57", "gem5 executing on spyder08, pid 63230", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-1500/1/gem5-out.client.1 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm83200-1500/0/gem5-cp.client.1 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-1500/1/cfg.client.1.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-1500/1/nic.pci.client.1. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-1500/1/nic.shm.client.1. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2219459675800", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.042893] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.042893] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.042893] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.042893] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.050892] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.050892] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.168874] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.169873] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.169873] i40e 0000:00:02.0: MAC address: 08:8e:ac:b3:61:7e\r", "[ 1.169873] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.171873] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.255860] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.255860] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.255860] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.255860] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.351846] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 1500 up\r", "[ 1.365844] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.4/24 dev eth0\r", "+ sleep 1\r", "+ iperf -w 1M -c 192.168.64.2 -Z dctcp -i 1\r", "------------------------------------------------------------\r", "Client connecting to 192.168.64.2, TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 4] local 192.168.64.4 port 50814 connected with 192.168.64.2 port 5001\r", "[ 2.616654] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 4] 0.0- 1.0 sec 391 MBytes 3.28 Gbits/sec\r", "[ 4] 1.0- 2.0 sec 388 MBytes 3.25 Gbits/sec\r", "[ 4] 2.0- 3.0 sec 389 MBytes 3.26 Gbits/sec\r", "[ 4] 3.0- 4.0 sec 386 MBytes 3.24 Gbits/sec\r", "[ 4] 4.0- 5.0 sec 380 MBytes 3.19 Gbits/sec\r", "[ 4] 5.0- 6.0 sec 386 MBytes 3.24 Gbits/sec\r", "[ 4] 6.0- 7.0 sec 392 MBytes 3.29 Gbits/sec\r", "[ 4] 7.0- 8.0 sec 384 MBytes 3.22 Gbits/sec\r", "[ 4] 8.0- 9.0 sec 384 MBytes 3.22 Gbits/sec\r", "[ 4] 9.0-10.0 sec 391 MBytes 3.28 Gbits/sec\r", "[ 4] 0.0-10.0 sec 3.78 GBytes 3.25 Gbits/sec\r", "+ sleep 2\r", "+ m5 exit\r", "Exiting @ tick 15588656572200 because m5_exit instruction encountered"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2219459665800. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2219459675800. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}}, "success": true}
\ No newline at end of file
{"exp_name": "gt-ib-dumbbell-DCTCPm83200-4000", "start_time": 1607019298.4283316, "end_time": 1607061356.0198317, "sims": {"nic.server.0.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-4000/1/nic.pci.server.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-4000/1/nic.eth.server.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-4000/1/nic.shm.server.0.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["1d6161e642a8", "sync_pci=1 sync_eth=1", "exit main_time: 15572289773000"]}, "nic.server.1.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-4000/1/nic.pci.server.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-4000/1/nic.eth.server.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-4000/1/nic.shm.server.1.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["299e50346714", "sync_pci=1 sync_eth=1", "exit main_time: 15572289752000"]}, "nic.client.0.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-4000/1/nic.pci.client.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-4000/1/nic.eth.client.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-4000/1/nic.shm.client.0.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["3a27c94f61e0", "sync_pci=1 sync_eth=1", "exit main_time: 15572289755000"]}, "nic.client.1.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-4000/1/nic.pci.client.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-4000/1/nic.eth.client.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-4000/1/nic.shm.client.1.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["79518cd533fc", "sync_pci=1 sync_eth=1", "exit main_time: 15572289143400"]}, "net.": {"class": "NS3DumbbellNet", "cmd": ["/home/hejingli/endhostsim-code/ns-3/cosim-run.sh", "cosim", "cosim-dumbbell-example", "--CosimPortLeft=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-4000/1/nic.eth.server.0.", "--CosimPortLeft=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-4000/1/nic.eth.server.1.", "--CosimPortRight=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-4000/1/nic.eth.client.0.", "--CosimPortRight=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-4000/1/nic.eth.client.1.", "--LinkRate=10Gb/s", "--LinkLatency=500ns", "--EcnTh=83200"], "stdout": [], "stderr": []}, "host.server.0": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-4000/1/gem5-out.server.0", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm83200-4000/0/gem5-cp.server.0", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-4000/1/cfg.server.0.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-4000/1/nic.pci.server.0.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-4000/1/nic.shm.server.0.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:15:00", "gem5 executing on spyder11, pid 51343", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-4000/1/gem5-out.server.0 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm83200-4000/0/gem5-cp.server.0 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-4000/1/cfg.server.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-4000/1/nic.pci.server.0. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-4000/1/nic.shm.server.0. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2220667972000", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.040894] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.040894] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.041894] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.041894] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.048893] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.048893] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.166875] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.167875] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.167875] i40e 0000:00:02.0: MAC address: a8:42:e6:61:61:1d\r", "[ 1.168875] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.170874] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.247863] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.247863] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.247863] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.247863] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.343848] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 4000 up\r", "[ 1.351847] i40e 0000:00:02.0 eth0: changing MTU from 1500 to 4000\r", "[ 1.357846] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.1/24 dev eth0\r", "+ iperf -s -w 1M -Z dctcp\r", "------------------------------------------------------------\r", "Server listening on TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 5] local 192.168.64.1 port 5001 connected with 192.168.64.3 port 33010\r", "[ 2.415685] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 5] 0.0-10.0 sec 5.00 GBytes 4.29 Gbits/sec\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2220667962000. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2220667972000. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.server.1": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-4000/1/gem5-out.server.1", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm83200-4000/0/gem5-cp.server.1", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-4000/1/cfg.server.1.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-4000/1/nic.pci.server.1.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-4000/1/nic.shm.server.1.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:15:00", "gem5 executing on spyder11, pid 51345", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-4000/1/gem5-out.server.1 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm83200-4000/0/gem5-cp.server.1 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-4000/1/cfg.server.1.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-4000/1/nic.pci.server.1. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-4000/1/nic.shm.server.1. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2177535334200", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.048892] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.048892] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.048892] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.048892] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.056891] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.056891] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.174873] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.175873] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.175873] i40e 0000:00:02.0: MAC address: 14:67:34:50:9e:29\r", "[ 1.175873] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.178873] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.255861] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.255861] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.255861] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.255861] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.351846] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 4000 up\r", "[ 1.359845] i40e 0000:00:02.0 eth0: changing MTU from 1500 to 4000\r", "[ 1.365844] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.2/24 dev eth0\r", "+ iperf -s -w 1M -Z dctcp\r", "------------------------------------------------------------\r", "Server listening on TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 5] local 192.168.64.2 port 5001 connected with 192.168.64.4 port 34224\r", "[ 2.436681] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 5] 0.0-10.0 sec 4.94 GBytes 4.24 Gbits/sec\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2177535324200. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2177535334200. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14", "warn: PowerState: More than one power state change request encountered within the same simulation tick"]}, "host.client.0": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-4000/1/gem5-out.client.0", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm83200-4000/0/gem5-cp.client.0", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-4000/1/cfg.client.0.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-4000/1/nic.pci.client.0.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-4000/1/nic.shm.client.0.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:15:00", "gem5 executing on spyder11, pid 51349", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-4000/1/gem5-out.client.0 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm83200-4000/0/gem5-cp.client.0 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-4000/1/cfg.client.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-4000/1/nic.pci.client.0. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-4000/1/nic.shm.client.0. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2226685663200", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.033892] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.033892] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.033892] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.033892] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.041891] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.041891] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.159873] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.160873] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.160873] i40e 0000:00:02.0: MAC address: e0:61:4f:c9:27:3a\r", "[ 1.160873] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.162873] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.247860] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.247860] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.247860] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.247860] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.343845] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 4000 up\r", "[ 1.351844] i40e 0000:00:02.0 eth0: changing MTU from 1500 to 4000\r", "[ 1.357843] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.3/24 dev eth0\r", "+ sleep 1\r", "+ iperf -w 1M -c 192.168.64.1 -Z dctcp -i 1\r", "------------------------------------------------------------\r", "Client connecting to 192.168.64.1, TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 4] local 192.168.64.3 port 33010 connected with 192.168.64.1 port 5001\r", "[ 2.487671] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 4] 0.0- 1.0 sec 505 MBytes 4.23 Gbits/sec\r", "[ 4] 1.0- 2.0 sec 509 MBytes 4.27 Gbits/sec\r", "[ 4] 2.0- 3.0 sec 500 MBytes 4.19 Gbits/sec\r", "[ 4] 3.0- 4.0 sec 522 MBytes 4.38 Gbits/sec\r", "[ 4] 4.0- 5.0 sec 503 MBytes 4.22 Gbits/sec\r", "[ 4] 5.0- 6.0 sec 518 MBytes 4.35 Gbits/sec\r", "[ 4] 6.0- 7.0 sec 524 MBytes 4.39 Gbits/sec\r", "[ 4] 7.0- 8.0 sec 516 MBytes 4.33 Gbits/sec\r", "[ 4] 8.0- 9.0 sec 513 MBytes 4.30 Gbits/sec\r", "[ 4] 9.0-10.0 sec 507 MBytes 4.25 Gbits/sec\r", "[ 4] 0.0-10.0 sec 5.00 GBytes 4.29 Gbits/sec\r", "+ sleep 20\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2226685653200. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2226685663200. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14", "warn: PowerState: More than one power state change request encountered within the same simulation tick", "warn: PowerState: More than one power state change request encountered within the same simulation tick", "warn: PowerState: More than one power state change request encountered within the same simulation tick"]}, "host.client.1": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-4000/1/gem5-out.client.1", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm83200-4000/0/gem5-cp.client.1", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-4000/1/cfg.client.1.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-4000/1/nic.pci.client.1.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-4000/1/nic.shm.client.1.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:15:00", "gem5 executing on spyder11, pid 51351", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-4000/1/gem5-out.client.1 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm83200-4000/0/gem5-cp.client.1 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-4000/1/cfg.client.1.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-4000/1/nic.pci.client.1. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-4000/1/nic.shm.client.1. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2204201775400", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.059889] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.059889] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.059889] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.059889] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.067888] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.067888] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.185870] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.186870] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.186870] i40e 0000:00:02.0: MAC address: fc:33:d5:8c:51:79\r", "[ 1.186870] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.188869] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.271857] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.271857] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.271857] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.271857] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.367842] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 4000 up\r", "[ 1.375841] i40e 0000:00:02.0 eth0: changing MTU from 1500 to 4000\r", "[ 1.381840] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.4/24 dev eth0\r", "+ sleep 1\r", "+ iperf -w 1M -c 192.168.64.2 -Z dctcp -i 1\r", "------------------------------------------------------------\r", "Client connecting to 192.168.64.2, TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 4] local 192.168.64.4 port 34224 connected with 192.168.64.2 port 5001\r", "[ 2.525666] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 4] 0.0- 1.0 sec 513 MBytes 4.30 Gbits/sec\r", "[ 4] 1.0- 2.0 sec 507 MBytes 4.25 Gbits/sec\r", "[ 4] 2.0- 3.0 sec 517 MBytes 4.33 Gbits/sec\r", "[ 4] 3.0- 4.0 sec 494 MBytes 4.14 Gbits/sec\r", "[ 4] 4.0- 5.0 sec 516 MBytes 4.33 Gbits/sec\r", "[ 4] 5.0- 6.0 sec 504 MBytes 4.23 Gbits/sec\r", "[ 4] 6.0- 7.0 sec 496 MBytes 4.16 Gbits/sec\r", "[ 4] 7.0- 8.0 sec 498 MBytes 4.18 Gbits/sec\r", "[ 4] 8.0- 9.0 sec 502 MBytes 4.21 Gbits/sec\r", "[ 4] 9.0-10.0 sec 512 MBytes 4.29 Gbits/sec\r", "[ 4] 0.0-10.0 sec 4.94 GBytes 4.24 Gbits/sec\r", "+ sleep 2\r", "+ m5 exit\r", "Exiting @ tick 15572288755400 because m5_exit instruction encountered"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2204201765400. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2204201775400. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14", "warn: PowerState: More than one power state change request encountered within the same simulation tick", "warn: PowerState: More than one power state change request encountered within the same simulation tick"]}}, "success": true}
\ No newline at end of file
{"exp_name": "gt-ib-dumbbell-DCTCPm91520-1500", "start_time": 1607019296.1473944, "end_time": 1607057842.1201994, "sims": {"nic.server.0.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm91520-1500/1/nic.pci.server.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm91520-1500/1/nic.eth.server.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm91520-1500/1/nic.shm.server.0.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["3b935e864434", "sync_pci=1 sync_eth=1", "exit main_time: 15699150070000"]}, "nic.server.1.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm91520-1500/1/nic.pci.server.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm91520-1500/1/nic.eth.server.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm91520-1500/1/nic.shm.server.1.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["374683ca6dd8", "sync_pci=1 sync_eth=1", "exit main_time: 15699150126000"]}, "nic.client.0.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm91520-1500/1/nic.pci.client.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm91520-1500/1/nic.eth.client.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm91520-1500/1/nic.shm.client.0.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["7520f95482ac", "sync_pci=1 sync_eth=1", "exit main_time: 15699150118000"]}, "nic.client.1.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm91520-1500/1/nic.pci.client.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm91520-1500/1/nic.eth.client.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm91520-1500/1/nic.shm.client.1.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["438456189248", "sync_pci=1 sync_eth=1", "exit main_time: 15699149253400"]}, "net.": {"class": "NS3DumbbellNet", "cmd": ["/home/hejingli/endhostsim-code/ns-3/cosim-run.sh", "cosim", "cosim-dumbbell-example", "--CosimPortLeft=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm91520-1500/1/nic.eth.server.0.", "--CosimPortLeft=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm91520-1500/1/nic.eth.server.1.", "--CosimPortRight=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm91520-1500/1/nic.eth.client.0.", "--CosimPortRight=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm91520-1500/1/nic.eth.client.1.", "--LinkRate=10Gb/s", "--LinkLatency=500ns", "--EcnTh=91520"], "stdout": [], "stderr": []}, "host.server.0": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm91520-1500/1/gem5-out.server.0", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm91520-1500/0/gem5-cp.server.0", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm91520-1500/1/cfg.server.0.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm91520-1500/1/nic.pci.server.0.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm91520-1500/1/nic.shm.server.0.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:57", "gem5 executing on spyder08, pid 63228", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm91520-1500/1/gem5-out.server.0 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm91520-1500/0/gem5-cp.server.0 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm91520-1500/1/cfg.server.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm91520-1500/1/nic.pci.server.0. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm91520-1500/1/nic.shm.server.0. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2351663968600", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.062890] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.062890] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.062890] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.062890] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.070888] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.070888] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.188870] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.189870] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.189870] i40e 0000:00:02.0: MAC address: 34:44:86:5e:93:3b\r", "[ 1.189870] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.192870] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.271858] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.271858] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.271858] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.271858] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.367843] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 1500 up\r", "[ 1.381841] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.1/24 dev eth0\r", "+ iperf -s -w 1M -Z dctcp\r", "------------------------------------------------------------\r", "Server listening on TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 5] local 192.168.64.1 port 5001 connected with 192.168.64.3 port 50482\r", "[ 2.358693] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 5] 0.0-10.0 sec 3.85 GBytes 3.30 Gbits/sec\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2351663958600. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2351663968600. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.server.1": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm91520-1500/1/gem5-out.server.1", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm91520-1500/0/gem5-cp.server.1", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm91520-1500/1/cfg.server.1.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm91520-1500/1/nic.pci.server.1.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm91520-1500/1/nic.shm.server.1.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:57", "gem5 executing on spyder08, pid 63234", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm91520-1500/1/gem5-out.server.1 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm91520-1500/0/gem5-cp.server.1 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm91520-1500/1/cfg.server.1.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm91520-1500/1/nic.pci.server.1. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm91520-1500/1/nic.shm.server.1. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2311283947200", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.071889] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.071889] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.071889] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.071889] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.078888] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.078888] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.197870] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.197870] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.198870] i40e 0000:00:02.0: MAC address: d8:6d:ca:83:46:37\r", "[ 1.198870] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.200869] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.279857] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.279857] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.279857] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.279857] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.375843] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 1500 up\r", "[ 1.389841] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.2/24 dev eth0\r", "+ iperf -s -w 1M -Z dctcp\r", "------------------------------------------------------------\r", "Server listening on TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 5] local 192.168.64.2 port 5001 connected with 192.168.64.4 port 51662\r", "[ 2.455679] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 5] 0.0-10.0 sec 3.89 GBytes 3.34 Gbits/sec\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2311283937200. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2311283947200. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14", "warn: PowerState: More than one power state change request encountered within the same simulation tick"]}, "host.client.0": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm91520-1500/1/gem5-out.client.0", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm91520-1500/0/gem5-cp.client.0", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm91520-1500/1/cfg.client.0.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm91520-1500/1/nic.pci.client.0.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm91520-1500/1/nic.shm.client.0.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:57", "gem5 executing on spyder08, pid 63239", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm91520-1500/1/gem5-out.client.0 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm91520-1500/0/gem5-cp.client.0 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm91520-1500/1/cfg.client.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm91520-1500/1/nic.pci.client.0. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm91520-1500/1/nic.shm.client.0. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2285817045600", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.055891] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.055891] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.056891] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.056891] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.063890] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.063890] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.181872] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.182872] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.182872] i40e 0000:00:02.0: MAC address: ac:82:54:f9:20:75\r", "[ 1.182872] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.185871] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.263859] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.263859] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.263859] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.263859] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.359845] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 1500 up\r", "[ 1.373843] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.3/24 dev eth0\r", "+ sleep 1\r", "+ iperf -w 1M -c 192.168.64.1 -Z dctcp -i 1\r", "------------------------------------------------------------\r", "Client connecting to 192.168.64.1, TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 4] local 192.168.64.3 port 50482 connected with 192.168.64.1 port 5001\r", "[ 2.610654] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 4] 0.0- 1.0 sec 395 MBytes 3.31 Gbits/sec\r", "[ 4] 1.0- 2.0 sec 393 MBytes 3.30 Gbits/sec\r", "[ 4] 2.0- 3.0 sec 386 MBytes 3.24 Gbits/sec\r", "[ 4] 3.0- 4.0 sec 397 MBytes 3.33 Gbits/sec\r", "[ 4] 4.0- 5.0 sec 400 MBytes 3.35 Gbits/sec\r", "[ 4] 5.0- 6.0 sec 394 MBytes 3.31 Gbits/sec\r", "[ 4] 6.0- 7.0 sec 399 MBytes 3.35 Gbits/sec\r", "[ 4] 7.0- 8.0 sec 392 MBytes 3.28 Gbits/sec\r", "[ 4] 8.0- 9.0 sec 392 MBytes 3.29 Gbits/sec\r", "[ 4] 9.0-10.0 sec 396 MBytes 3.32 Gbits/sec\r", "[ 4] 0.0-10.0 sec 3.85 GBytes 3.31 Gbits/sec\r", "+ sleep 20\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2285817035600. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2285817045600. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.client.1": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm91520-1500/1/gem5-out.client.1", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm91520-1500/0/gem5-cp.client.1", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm91520-1500/1/cfg.client.1.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm91520-1500/1/nic.pci.client.1.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm91520-1500/1/nic.shm.client.1.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:57", "gem5 executing on spyder08, pid 63243", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm91520-1500/1/gem5-out.client.1 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm91520-1500/0/gem5-cp.client.1 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm91520-1500/1/cfg.client.1.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm91520-1500/1/nic.pci.client.1. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm91520-1500/1/nic.shm.client.1. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2334934277400", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.055891] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.055891] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.055891] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.055891] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.062890] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.063890] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.181872] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.182872] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.182872] i40e 0000:00:02.0: MAC address: 48:92:18:56:84:43\r", "[ 1.182872] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.184871] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.263859] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.263859] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.263859] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.263859] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.359845] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 1500 up\r", "[ 1.373843] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.4/24 dev eth0\r", "+ sleep 1\r", "+ iperf -w 1M -c 192.168.64.2 -Z dctcp -i 1\r", "------------------------------------------------------------\r", "Client connecting to 192.168.64.2, TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 4] local 192.168.64.4 port 51662 connected with 192.168.64.2 port 5001\r", "[ 2.562662] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 4] 0.0- 1.0 sec 395 MBytes 3.32 Gbits/sec\r", "[ 4] 1.0- 2.0 sec 399 MBytes 3.34 Gbits/sec\r", "[ 4] 2.0- 3.0 sec 401 MBytes 3.36 Gbits/sec\r", "[ 4] 3.0- 4.0 sec 398 MBytes 3.34 Gbits/sec\r", "[ 4] 4.0- 5.0 sec 402 MBytes 3.37 Gbits/sec\r", "[ 4] 5.0- 6.0 sec 399 MBytes 3.35 Gbits/sec\r", "[ 4] 6.0- 7.0 sec 392 MBytes 3.29 Gbits/sec\r", "[ 4] 7.0- 8.0 sec 405 MBytes 3.40 Gbits/sec\r", "[ 4] 8.0- 9.0 sec 396 MBytes 3.32 Gbits/sec\r", "[ 4] 9.0-10.0 sec 395 MBytes 3.31 Gbits/sec\r", "[ 4] 0.0-10.0 sec 3.89 GBytes 3.34 Gbits/sec\r", "+ sleep 2\r", "+ m5 exit\r", "Exiting @ tick 15699149100800 because m5_exit instruction encountered"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2334934267400. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2334934277400. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}}, "success": true}
\ No newline at end of file
{"exp_name": "gt-ib-dumbbell-DCTCPm91520-4000", "start_time": 1607019298.733619, "end_time": 1607062811.9475331, "sims": {"nic.server.0.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm91520-4000/1/nic.pci.server.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm91520-4000/1/nic.eth.server.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm91520-4000/1/nic.shm.server.0.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["760983eace84", "sync_pci=1 sync_eth=1", "exit main_time: 15627442275000"]}, "nic.server.1.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm91520-4000/1/nic.pci.server.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm91520-4000/1/nic.eth.server.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm91520-4000/1/nic.shm.server.1.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["246cdd4f2f4", "sync_pci=1 sync_eth=1", "exit main_time: 15627442299000"]}, "nic.client.0.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm91520-4000/1/nic.pci.client.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm91520-4000/1/nic.eth.client.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm91520-4000/1/nic.shm.client.0.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["50aa05ee0290", "sync_pci=1 sync_eth=1", "exit main_time: 15627442246000"]}, "nic.client.1.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm91520-4000/1/nic.pci.client.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm91520-4000/1/nic.eth.client.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm91520-4000/1/nic.shm.client.1.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["1c0173501ac0", "sync_pci=1 sync_eth=1", "exit main_time: 15627441682400"]}, "net.": {"class": "NS3DumbbellNet", "cmd": ["/home/hejingli/endhostsim-code/ns-3/cosim-run.sh", "cosim", "cosim-dumbbell-example", "--CosimPortLeft=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm91520-4000/1/nic.eth.server.0.", "--CosimPortLeft=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm91520-4000/1/nic.eth.server.1.", "--CosimPortRight=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm91520-4000/1/nic.eth.client.0.", "--CosimPortRight=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm91520-4000/1/nic.eth.client.1.", "--LinkRate=10Gb/s", "--LinkLatency=500ns", "--EcnTh=91520"], "stdout": [], "stderr": []}, "host.server.0": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm91520-4000/1/gem5-out.server.0", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm91520-4000/0/gem5-cp.server.0", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm91520-4000/1/cfg.server.0.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm91520-4000/1/nic.pci.server.0.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm91520-4000/1/nic.shm.server.0.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:15:01", "gem5 executing on spyder12, pid 1827", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm91520-4000/1/gem5-out.server.0 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm91520-4000/0/gem5-cp.server.0 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm91520-4000/1/cfg.server.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm91520-4000/1/nic.pci.server.0. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm91520-4000/1/nic.shm.server.0. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2158783568600", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.030893] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.030893] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.030893] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.030893] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.037892] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.037892] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.156874] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.157874] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.157874] i40e 0000:00:02.0: MAC address: 84:ce:ea:83:09:76\r", "[ 1.157874] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.159874] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.239861] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.239861] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.239861] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.239861] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.335847] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 4000 up\r", "[ 1.343846] i40e 0000:00:02.0 eth0: changing MTU from 1500 to 4000\r", "[ 1.349845] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.1/24 dev eth0\r", "+ iperf -s -w 1M -Z dctcp\r", "------------------------------------------------------------\r", "Server listening on TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 5] local 192.168.64.1 port 5001 connected with 192.168.64.3 port 39564\r", "[ 2.436680] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 5] 0.0-10.0 sec 5.04 GBytes 4.33 Gbits/sec\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2158783558600. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2158783568600. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.server.1": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm91520-4000/1/gem5-out.server.1", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm91520-4000/0/gem5-cp.server.1", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm91520-4000/1/cfg.server.1.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm91520-4000/1/nic.pci.server.1.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm91520-4000/1/nic.shm.server.1.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:15:01", "gem5 executing on spyder12, pid 1833", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm91520-4000/1/gem5-out.server.1 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm91520-4000/0/gem5-cp.server.1 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm91520-4000/1/cfg.server.1.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm91520-4000/1/nic.pci.server.1. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm91520-4000/1/nic.shm.server.1. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2130081835200", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.024894] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.024894] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.025894] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.025894] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.032893] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.032893] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.150875] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.151875] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.151875] i40e 0000:00:02.0: MAC address: f4:f2:d4:cd:46:02\r", "[ 1.152875] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.154875] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.231863] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.231863] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.231863] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.231863] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.327848] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 4000 up\r", "[ 1.335847] i40e 0000:00:02.0 eth0: changing MTU from 1500 to 4000\r", "[ 1.341846] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.2/24 dev eth0\r", "+ iperf -s -w 1M -Z dctcp\r", "------------------------------------------------------------\r", "Server listening on TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 5] local 192.168.64.2 port 5001 connected with 192.168.64.4 port 42950\r", "[ 2.518667] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 5] 0.0-10.0 sec 4.99 GBytes 4.28 Gbits/sec\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2130081825200. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2130081835200. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.client.0": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm91520-4000/1/gem5-out.client.0", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm91520-4000/0/gem5-cp.client.0", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm91520-4000/1/cfg.client.0.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm91520-4000/1/nic.pci.client.0.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm91520-4000/1/nic.shm.client.0.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:15:01", "gem5 executing on spyder12, pid 1841", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm91520-4000/1/gem5-out.client.0 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm91520-4000/0/gem5-cp.client.0 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm91520-4000/1/cfg.client.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm91520-4000/1/nic.pci.client.0. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm91520-4000/1/nic.shm.client.0. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2207853842200", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.045892] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.045892] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.045892] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.045892] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.052891] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.052891] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.171873] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.172872] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.172872] i40e 0000:00:02.0: MAC address: 90:02:ee:05:aa:50\r", "[ 1.172872] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.174872] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.255860] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.255860] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.255860] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.255860] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.351845] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 4000 up\r", "[ 1.359844] i40e 0000:00:02.0 eth0: changing MTU from 1500 to 4000\r", "[ 1.365843] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.3/24 dev eth0\r", "+ sleep 1\r", "+ iperf -w 1M -c 192.168.64.1 -Z dctcp -i 1\r", "------------------------------------------------------------\r", "Client connecting to 192.168.64.1, TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 4] local 192.168.64.3 port 39564 connected with 192.168.64.1 port 5001\r", "[ 2.521667] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 4] 0.0- 1.0 sec 542 MBytes 4.55 Gbits/sec\r", "[ 4] 1.0- 2.0 sec 510 MBytes 4.28 Gbits/sec\r", "[ 4] 2.0- 3.0 sec 513 MBytes 4.30 Gbits/sec\r", "[ 4] 3.0- 4.0 sec 518 MBytes 4.35 Gbits/sec\r", "[ 4] 4.0- 5.0 sec 532 MBytes 4.46 Gbits/sec\r", "[ 4] 5.0- 6.0 sec 520 MBytes 4.36 Gbits/sec\r", "[ 4] 6.0- 7.0 sec 492 MBytes 4.13 Gbits/sec\r", "[ 4] 7.0- 8.0 sec 516 MBytes 4.33 Gbits/sec\r", "[ 4] 8.0- 9.0 sec 510 MBytes 4.28 Gbits/sec\r", "[ 4] 9.0-10.0 sec 511 MBytes 4.28 Gbits/sec\r", "[ 4] 0.0-10.0 sec 5.04 GBytes 4.33 Gbits/sec\r", "+ sleep 20\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2207853832200. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2207853842200. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14", "warn: PowerState: More than one power state change request encountered within the same simulation tick", "warn: PowerState: More than one power state change request encountered within the same simulation tick"]}, "host.client.1": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm91520-4000/1/gem5-out.client.1", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm91520-4000/0/gem5-cp.client.1", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm91520-4000/1/cfg.client.1.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm91520-4000/1/nic.pci.client.1.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm91520-4000/1/nic.shm.client.1.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:15:01", "gem5 executing on spyder12, pid 1845", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm91520-4000/1/gem5-out.client.1 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm91520-4000/0/gem5-cp.client.1 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm91520-4000/1/cfg.client.1.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm91520-4000/1/nic.pci.client.1. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm91520-4000/1/nic.shm.client.1. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2260567704400", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.061890] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.061890] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.062890] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.062890] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.069889] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.069889] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.187871] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.188871] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.188871] i40e 0000:00:02.0: MAC address: c0:1a:50:73:01:1c\r", "[ 1.189871] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.191870] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.271858] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.271858] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.271858] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.271858] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.367844] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 4000 up\r", "[ 1.375842] i40e 0000:00:02.0 eth0: changing MTU from 1500 to 4000\r", "[ 1.381842] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.4/24 dev eth0\r", "+ sleep 1\r", "+ iperf -w 1M -c 192.168.64.2 -Z dctcp -i 1\r", "------------------------------------------------------------\r", "Client connecting to 192.168.64.2, TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 4] local 192.168.64.4 port 42950 connected with 192.168.64.2 port 5001\r", "[ 2.512670] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 4] 0.0- 1.0 sec 487 MBytes 4.09 Gbits/sec\r", "[ 4] 1.0- 2.0 sec 517 MBytes 4.34 Gbits/sec\r", "[ 4] 2.0- 3.0 sec 513 MBytes 4.31 Gbits/sec\r", "[ 4] 3.0- 4.0 sec 511 MBytes 4.29 Gbits/sec\r", "[ 4] 4.0- 5.0 sec 493 MBytes 4.14 Gbits/sec\r", "[ 4] 5.0- 6.0 sec 511 MBytes 4.28 Gbits/sec\r", "[ 4] 6.0- 7.0 sec 529 MBytes 4.44 Gbits/sec\r", "[ 4] 7.0- 8.0 sec 513 MBytes 4.31 Gbits/sec\r", "[ 4] 8.0- 9.0 sec 516 MBytes 4.33 Gbits/sec\r", "[ 4] 9.0-10.0 sec 519 MBytes 4.35 Gbits/sec\r", "[ 4] 0.0-10.0 sec 4.99 GBytes 4.29 Gbits/sec\r", "+ sleep 2\r", "+ m5 exit\r", "Exiting @ tick 15627441412600 because m5_exit instruction encountered"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2260567694400. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2260567704400. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14", "warn: PowerState: More than one power state change request encountered within the same simulation tick"]}}, "success": true}
\ No newline at end of file
{"exp_name": "gt-ib-dumbbell-DCTCPm99840-1500", "start_time": 1607019296.138438, "end_time": 1607058496.1648893, "sims": {"nic.server.0.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm99840-1500/1/nic.pci.server.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm99840-1500/1/nic.eth.server.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm99840-1500/1/nic.shm.server.0.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["6242d3fccd70", "sync_pci=1 sync_eth=1", "exit main_time: 15729696037955"]}, "nic.server.1.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm99840-1500/1/nic.pci.server.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm99840-1500/1/nic.eth.server.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm99840-1500/1/nic.shm.server.1.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["7db9aabc2f64", "sync_pci=1 sync_eth=1", "exit main_time: 15729696072000"]}, "nic.client.0.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm99840-1500/1/nic.pci.client.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm99840-1500/1/nic.eth.client.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm99840-1500/1/nic.shm.client.0.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["2b09adbd4968", "sync_pci=1 sync_eth=1", "exit main_time: 15729696037000"]}, "nic.client.1.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm99840-1500/1/nic.pci.client.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm99840-1500/1/nic.eth.client.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm99840-1500/1/nic.shm.client.1.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["26bd6441730c", "sync_pci=1 sync_eth=1", "exit main_time: 15729695176400"]}, "net.": {"class": "NS3DumbbellNet", "cmd": ["/home/hejingli/endhostsim-code/ns-3/cosim-run.sh", "cosim", "cosim-dumbbell-example", "--CosimPortLeft=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm99840-1500/1/nic.eth.server.0.", "--CosimPortLeft=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm99840-1500/1/nic.eth.server.1.", "--CosimPortRight=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm99840-1500/1/nic.eth.client.0.", "--CosimPortRight=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm99840-1500/1/nic.eth.client.1.", "--LinkRate=10Gb/s", "--LinkLatency=500ns", "--EcnTh=99840"], "stdout": [], "stderr": []}, "host.server.0": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm99840-1500/1/gem5-out.server.0", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm99840-1500/0/gem5-cp.server.0", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm99840-1500/1/cfg.server.0.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm99840-1500/1/nic.pci.server.0.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm99840-1500/1/nic.shm.server.0.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:57", "gem5 executing on spyder08, pid 63213", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm99840-1500/1/gem5-out.server.0 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm99840-1500/0/gem5-cp.server.0 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm99840-1500/1/cfg.server.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm99840-1500/1/nic.pci.server.0. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm99840-1500/1/nic.shm.server.0. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2294395530200", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.066889] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.066889] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.066889] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.066889] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.073888] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.073888] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.192870] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.193870] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.193870] i40e 0000:00:02.0: MAC address: 70:cd:fc:d3:42:62\r", "[ 1.193870] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.195869] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.279857] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.279857] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.279857] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.279857] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.375842] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 1500 up\r", "[ 1.389840] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.1/24 dev eth0\r", "+ iperf -s -w 1M -Z dctcp\r", "------------------------------------------------------------\r", "Server listening on TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 5] local 192.168.64.1 port 5001 connected with 192.168.64.3 port 35770\r", "[ 2.425682] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 5] 0.0-10.0 sec 3.95 GBytes 3.39 Gbits/sec\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2294395520200. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2294395530200. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14", "warn: PowerState: More than one power state change request encountered within the same simulation tick"]}, "host.server.1": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm99840-1500/1/gem5-out.server.1", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm99840-1500/0/gem5-cp.server.1", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm99840-1500/1/cfg.server.1.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm99840-1500/1/nic.pci.server.1.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm99840-1500/1/nic.shm.server.1.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:57", "gem5 executing on spyder08, pid 63216", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm99840-1500/1/gem5-out.server.1 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm99840-1500/0/gem5-cp.server.1 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm99840-1500/1/cfg.server.1.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm99840-1500/1/nic.pci.server.1. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm99840-1500/1/nic.shm.server.1. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2311353870000", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.076889] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.076889] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.076889] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.076889] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.083888] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.083888] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.202870] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.203869] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.203869] i40e 0000:00:02.0: MAC address: 64:2f:bc:aa:b9:7d\r", "[ 1.203869] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.205869] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.287857] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.287857] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.287857] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.287857] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.383842] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 1500 up\r", "[ 1.397840] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.2/24 dev eth0\r", "+ iperf -s -w 1M -Z dctcp\r", "------------------------------------------------------------\r", "Server listening on TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 5] local 192.168.64.2 port 5001 connected with 192.168.64.4 port 57408\r", "[ 2.487674] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 5] 0.0-10.0 sec 3.97 GBytes 3.41 Gbits/sec\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2311353860000. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2311353870000. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.client.0": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm99840-1500/1/gem5-out.client.0", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm99840-1500/0/gem5-cp.client.0", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm99840-1500/1/cfg.client.0.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm99840-1500/1/nic.pci.client.0.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm99840-1500/1/nic.shm.client.0.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:57", "gem5 executing on spyder08, pid 63218", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm99840-1500/1/gem5-out.client.0 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm99840-1500/0/gem5-cp.client.0 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm99840-1500/1/cfg.client.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm99840-1500/1/nic.pci.client.0. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm99840-1500/1/nic.shm.client.0. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2287116432400", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.050891] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.050891] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.050891] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.050891] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.057890] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.057890] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.176872] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.176872] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.177872] i40e 0000:00:02.0: MAC address: 68:49:bd:ad:09:2b\r", "[ 1.177872] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.179872] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.263859] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.263859] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.263859] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.263859] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.359844] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 1500 up\r", "[ 1.373842] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.3/24 dev eth0\r", "+ sleep 1\r", "+ iperf -w 1M -c 192.168.64.1 -Z dctcp -i 1\r", "------------------------------------------------------------\r", "Client connecting to 192.168.64.1, TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 4] local 192.168.64.3 port 35770 connected with 192.168.64.1 port 5001\r", "[ 2.617653] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 4] 0.0- 1.0 sec 410 MBytes 3.44 Gbits/sec\r", "[ 4] 1.0- 2.0 sec 406 MBytes 3.40 Gbits/sec\r", "[ 4] 2.0- 3.0 sec 406 MBytes 3.41 Gbits/sec\r", "[ 4] 3.0- 4.0 sec 404 MBytes 3.38 Gbits/sec\r", "[ 4] 4.0- 5.0 sec 409 MBytes 3.43 Gbits/sec\r", "[ 4] 5.0- 6.0 sec 406 MBytes 3.40 Gbits/sec\r", "[ 4] 6.0- 7.0 sec 397 MBytes 3.33 Gbits/sec\r", "[ 4] 7.0- 8.0 sec 405 MBytes 3.40 Gbits/sec\r", "[ 4] 8.0- 9.0 sec 409 MBytes 3.43 Gbits/sec\r", "[ 4] 9.0-10.0 sec 398 MBytes 3.33 Gbits/sec\r", "[ 4] 0.0-10.0 sec 3.95 GBytes 3.40 Gbits/sec\r", "+ sleep 20\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2287116422400. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2287116432400. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.client.1": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm99840-1500/1/gem5-out.client.1", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm99840-1500/0/gem5-cp.client.1", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm99840-1500/1/cfg.client.1.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm99840-1500/1/nic.pci.client.1.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm99840-1500/1/nic.shm.client.1.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:57", "gem5 executing on spyder08, pid 63222", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm99840-1500/1/gem5-out.client.1 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm99840-1500/0/gem5-cp.client.1 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm99840-1500/1/cfg.client.1.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm99840-1500/1/nic.pci.client.1. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm99840-1500/1/nic.shm.client.1. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2358207772000", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.090887] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.090887] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.090887] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.090887] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.097886] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.097886] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.216868] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.216868] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.217868] i40e 0000:00:02.0: MAC address: 0c:73:41:64:bd:26\r", "[ 1.217868] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.219867] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.303854] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.303854] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.303854] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.303854] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.399840] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 1500 up\r", "[ 1.413838] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.4/24 dev eth0\r", "+ sleep 1\r", "+ iperf -w 1M -c 192.168.64.2 -Z dctcp -i 1\r", "------------------------------------------------------------\r", "Client connecting to 192.168.64.2, TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 4] local 192.168.64.4 port 57408 connected with 192.168.64.2 port 5001\r", "[ 2.617655] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 4] 0.0- 1.0 sec 402 MBytes 3.38 Gbits/sec\r", "[ 4] 1.0- 2.0 sec 403 MBytes 3.38 Gbits/sec\r", "[ 4] 2.0- 3.0 sec 405 MBytes 3.40 Gbits/sec\r", "[ 4] 3.0- 4.0 sec 408 MBytes 3.42 Gbits/sec\r", "[ 4] 4.0- 5.0 sec 398 MBytes 3.34 Gbits/sec\r", "[ 4] 5.0- 6.0 sec 416 MBytes 3.49 Gbits/sec\r", "[ 4] 6.0- 7.0 sec 412 MBytes 3.46 Gbits/sec\r", "[ 4] 7.0- 8.0 sec 407 MBytes 3.41 Gbits/sec\r", "[ 4] 8.0- 9.0 sec 402 MBytes 3.37 Gbits/sec\r", "[ 4] 9.0-10.0 sec 417 MBytes 3.49 Gbits/sec\r", "[ 4] 0.0-10.0 sec 3.97 GBytes 3.41 Gbits/sec\r", "+ sleep 2\r", "+ m5 exit\r", "Exiting @ tick 15729694801000 because m5_exit instruction encountered"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2358207762000. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2358207772000. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}}, "success": true}
\ No newline at end of file
{"exp_name": "gt-ib-dumbbell-DCTCPm99840-4000", "start_time": 1607019298.7341003, "end_time": 1607055724.9041698, "sims": {"nic.server.0.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm99840-4000/1/nic.pci.server.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm99840-4000/1/nic.eth.server.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm99840-4000/1/nic.shm.server.0.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["171cd6bfc41c", "sync_pci=1 sync_eth=1", "exit main_time: 15524555516000"]}, "nic.server.1.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm99840-4000/1/nic.pci.server.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm99840-4000/1/nic.eth.server.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm99840-4000/1/nic.shm.server.1.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["2f9750130cfc", "sync_pci=1 sync_eth=1", "exit main_time: 15524555547000"]}, "nic.client.0.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm99840-4000/1/nic.pci.client.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm99840-4000/1/nic.eth.client.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm99840-4000/1/nic.shm.client.0.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["7f3a3bbefb84", "sync_pci=1 sync_eth=1", "exit main_time: 15524555470000"]}, "nic.client.1.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm99840-4000/1/nic.pci.client.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm99840-4000/1/nic.eth.client.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm99840-4000/1/nic.shm.client.1.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["283e24023f2c", "sync_pci=1 sync_eth=1", "exit main_time: 15524554996400"]}, "net.": {"class": "NS3DumbbellNet", "cmd": ["/home/hejingli/endhostsim-code/ns-3/cosim-run.sh", "cosim", "cosim-dumbbell-example", "--CosimPortLeft=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm99840-4000/1/nic.eth.server.0.", "--CosimPortLeft=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm99840-4000/1/nic.eth.server.1.", "--CosimPortRight=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm99840-4000/1/nic.eth.client.0.", "--CosimPortRight=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm99840-4000/1/nic.eth.client.1.", "--LinkRate=10Gb/s", "--LinkLatency=500ns", "--EcnTh=99840"], "stdout": [], "stderr": []}, "host.server.0": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm99840-4000/1/gem5-out.server.0", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm99840-4000/0/gem5-cp.server.0", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm99840-4000/1/cfg.server.0.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm99840-4000/1/nic.pci.server.0.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm99840-4000/1/nic.shm.server.0.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:15:01", "gem5 executing on spyder12, pid 1824", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm99840-4000/1/gem5-out.server.0 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm99840-4000/0/gem5-cp.server.0 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm99840-4000/1/cfg.server.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm99840-4000/1/nic.pci.server.0. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm99840-4000/1/nic.shm.server.0. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2185099680000", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.038894] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.038894] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.038894] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.038894] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.046893] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.046893] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.164875] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.165875] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.165875] i40e 0000:00:02.0: MAC address: 1c:c4:bf:d6:1c:17\r", "[ 1.165875] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.168874] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.247862] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.247862] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.247862] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.247862] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.343848] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 4000 up\r", "[ 1.351846] i40e 0000:00:02.0 eth0: changing MTU from 1500 to 4000\r", "[ 1.357846] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.1/24 dev eth0\r", "+ iperf -s -w 1M -Z dctcp\r", "------------------------------------------------------------\r", "Server listening on TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 5] local 192.168.64.1 port 5001 connected with 192.168.64.3 port 60526\r", "[ 2.416684] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 5] 0.0-10.0 sec 5.07 GBytes 4.35 Gbits/sec\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2185099670000. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2185099680000. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.server.1": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm99840-4000/1/gem5-out.server.1", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm99840-4000/0/gem5-cp.server.1", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm99840-4000/1/cfg.server.1.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm99840-4000/1/nic.pci.server.1.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm99840-4000/1/nic.shm.server.1.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:15:01", "gem5 executing on spyder12, pid 1831", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm99840-4000/1/gem5-out.server.1 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm99840-4000/0/gem5-cp.server.1 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm99840-4000/1/cfg.server.1.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm99840-4000/1/nic.pci.server.1. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm99840-4000/1/nic.shm.server.1. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2165545044400", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.036893] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.036893] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.036893] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.036893] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.043892] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.043892] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.161874] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.162874] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.162874] i40e 0000:00:02.0: MAC address: fc:0c:13:50:97:2f\r", "[ 1.163873] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.165873] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.247861] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.247861] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.247861] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.247861] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.343846] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 4000 up\r", "[ 1.351845] i40e 0000:00:02.0 eth0: changing MTU from 1500 to 4000\r", "[ 1.357844] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.2/24 dev eth0\r", "+ iperf -s -w 1M -Z dctcp\r", "------------------------------------------------------------\r", "Server listening on TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 5] local 192.168.64.2 port 5001 connected with 192.168.64.4 port 35630\r", "[ 2.386688] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 5] 0.0-10.0 sec 5.05 GBytes 4.34 Gbits/sec\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2165545034400. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2165545044400. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.client.0": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm99840-4000/1/gem5-out.client.0", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm99840-4000/0/gem5-cp.client.0", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm99840-4000/1/cfg.client.0.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm99840-4000/1/nic.pci.client.0.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm99840-4000/1/nic.shm.client.0.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:15:01", "gem5 executing on spyder12, pid 1836", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm99840-4000/1/gem5-out.client.0 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm99840-4000/0/gem5-cp.client.0 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm99840-4000/1/cfg.client.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm99840-4000/1/nic.pci.client.0. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm99840-4000/1/nic.shm.client.0. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2202746109200", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.031894] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.031894] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.031894] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.031894] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.038893] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.038893] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.157875] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.158874] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.158874] i40e 0000:00:02.0: MAC address: 84:fb:be:3b:3a:7f\r", "[ 1.158874] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.160874] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.239862] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.239862] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.239862] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.239862] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.335848] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 4000 up\r", "[ 1.343846] i40e 0000:00:02.0 eth0: changing MTU from 1500 to 4000\r", "[ 1.349846] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.3/24 dev eth0\r", "+ sleep 1\r", "+ iperf -w 1M -c 192.168.64.1 -Z dctcp -i 1\r", "------------------------------------------------------------\r", "Client connecting to 192.168.64.1, TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 4] local 192.168.64.3 port 60526 connected with 192.168.64.1 port 5001\r", "[ 2.484673] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 4] 0.0- 1.0 sec 523 MBytes 4.39 Gbits/sec\r", "[ 4] 1.0- 2.0 sec 509 MBytes 4.27 Gbits/sec\r", "[ 4] 2.0- 3.0 sec 499 MBytes 4.19 Gbits/sec\r", "[ 4] 3.0- 4.0 sec 532 MBytes 4.47 Gbits/sec\r", "[ 4] 4.0- 5.0 sec 524 MBytes 4.40 Gbits/sec\r", "[ 4] 5.0- 6.0 sec 524 MBytes 4.40 Gbits/sec\r", "[ 4] 6.0- 7.0 sec 514 MBytes 4.31 Gbits/sec\r", "[ 4] 7.0- 8.0 sec 516 MBytes 4.33 Gbits/sec\r", "[ 4] 8.0- 9.0 sec 514 MBytes 4.32 Gbits/sec\r", "[ 4] 9.0-10.0 sec 534 MBytes 4.48 Gbits/sec\r", "[ 4] 0.0-10.0 sec 5.07 GBytes 4.35 Gbits/sec\r", "+ sleep 20\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2202746099200. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2202746109200. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.client.1": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm99840-4000/1/gem5-out.client.1", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm99840-4000/0/gem5-cp.client.1", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm99840-4000/1/cfg.client.1.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm99840-4000/1/nic.pci.client.1.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm99840-4000/1/nic.shm.client.1.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:15:01", "gem5 executing on spyder12, pid 1839", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm99840-4000/1/gem5-out.client.1 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm99840-4000/0/gem5-cp.client.1 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm99840-4000/1/cfg.client.1.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm99840-4000/1/nic.pci.client.1. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm99840-4000/1/nic.shm.client.1. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2156812925400", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.027894] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.028894] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.028894] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.028894] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.035893] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.035893] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.153875] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.154875] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.155875] i40e 0000:00:02.0: MAC address: 2c:3f:02:24:3e:28\r", "[ 1.155875] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.157874] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.239862] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.239862] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.239862] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.239862] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.335847] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 4000 up\r", "[ 1.343846] i40e 0000:00:02.0 eth0: changing MTU from 1500 to 4000\r", "[ 1.349845] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.4/24 dev eth0\r", "+ sleep 1\r", "+ iperf -w 1M -c 192.168.64.2 -Z dctcp -i 1\r", "------------------------------------------------------------\r", "Client connecting to 192.168.64.2, TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 4] local 192.168.64.4 port 35630 connected with 192.168.64.2 port 5001\r", "[ 2.513668] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 4] 0.0- 1.0 sec 513 MBytes 4.31 Gbits/sec\r", "[ 4] 1.0- 2.0 sec 530 MBytes 4.45 Gbits/sec\r", "[ 4] 2.0- 3.0 sec 540 MBytes 4.53 Gbits/sec\r", "[ 4] 3.0- 4.0 sec 504 MBytes 4.22 Gbits/sec\r", "[ 4] 4.0- 5.0 sec 505 MBytes 4.24 Gbits/sec\r", "[ 4] 5.0- 6.0 sec 510 MBytes 4.28 Gbits/sec\r", "[ 4] 6.0- 7.0 sec 526 MBytes 4.41 Gbits/sec\r", "[ 4] 7.0- 8.0 sec 526 MBytes 4.41 Gbits/sec\r", "[ 4] 8.0- 9.0 sec 514 MBytes 4.31 Gbits/sec\r", "[ 4] 9.0-10.0 sec 506 MBytes 4.25 Gbits/sec\r", "[ 4] 0.0-10.0 sec 5.05 GBytes 4.34 Gbits/sec\r", "+ sleep 2\r", "+ m5 exit\r", "Exiting @ tick 15524554665200 because m5_exit instruction encountered"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2156812915400. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2156812925400. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}}, "success": true}
\ No newline at end of file
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