Commit 414f8b28 authored by Hejing Li's avatar Hejing Li
Browse files

add dctcp gem5 data

parent 0c0732b4
{"exp_name": "gt-ib-dumbbell-DCTCPm0-1500", "start_time": 1607019295.1281674, "end_time": 1607076142.664002, "sims": {"nic.server.0.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm0-1500/1/nic.pci.server.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm0-1500/1/nic.eth.server.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm0-1500/1/nic.shm.server.0.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["225430f0d418", "sync_pci=1 sync_eth=1", "exit main_time: 15552256091000"]}, "nic.server.1.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm0-1500/1/nic.pci.server.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm0-1500/1/nic.eth.server.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm0-1500/1/nic.shm.server.1.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["32dd991fcee4", "sync_pci=1 sync_eth=1", "exit main_time: 15552256131999"]}, "nic.client.0.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm0-1500/1/nic.pci.client.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm0-1500/1/nic.eth.client.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm0-1500/1/nic.shm.client.0.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["43676605c9b0", "sync_pci=1 sync_eth=1", "exit main_time: 15552256166000"]}, "nic.client.1.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm0-1500/1/nic.pci.client.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm0-1500/1/nic.eth.client.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm0-1500/1/nic.shm.client.1.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["5f74ebd8949c", "sync_pci=1 sync_eth=1", "exit main_time: 15552255242400"]}, "net.": {"class": "NS3DumbbellNet", "cmd": ["/home/hejingli/endhostsim-code/ns-3/cosim-run.sh", "cosim", "cosim-dumbbell-example", "--CosimPortLeft=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm0-1500/1/nic.eth.server.0.", "--CosimPortLeft=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm0-1500/1/nic.eth.server.1.", "--CosimPortRight=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm0-1500/1/nic.eth.client.0.", "--CosimPortRight=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm0-1500/1/nic.eth.client.1.", "--LinkRate=10Gb/s", "--LinkLatency=500ns", "--EcnTh=0"], "stdout": [], "stderr": []}, "host.server.0": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm0-1500/1/gem5-out.server.0", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm0-1500/0/gem5-cp.server.0", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm0-1500/1/cfg.server.0.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm0-1500/1/nic.pci.server.0.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm0-1500/1/nic.shm.server.0.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:56", "gem5 executing on spyder04, pid 28676", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm0-1500/1/gem5-out.server.0 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm0-1500/0/gem5-cp.server.0 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm0-1500/1/cfg.server.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm0-1500/1/nic.pci.server.0. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm0-1500/1/nic.shm.server.0. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2326182149000", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.090886] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.090886] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.091885] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.091885] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.098884] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.098884] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.216866] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.217866] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.217866] i40e 0000:00:02.0: MAC address: 18:d4:f0:30:54:22\r", "[ 1.217866] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.219866] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.303853] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.303853] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.303853] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.303853] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.399839] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 1500 up\r", "[ 1.413837] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.1/24 dev eth0\r", "+ iperf -s -w 1M -Z dctcp\r", "------------------------------------------------------------\r", "Server listening on TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 5] local 192.168.64.1 port 5001 connected with 192.168.64.3 port 45722\r", "[ 2.487673] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 5] 0.0-10.0 sec 805 MBytes 673 Mbits/sec\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2326182139000. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2326182149000. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14", "warn: PowerState: More than one power state change request encountered within the same simulation tick"]}, "host.server.1": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm0-1500/1/gem5-out.server.1", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm0-1500/0/gem5-cp.server.1", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm0-1500/1/cfg.server.1.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm0-1500/1/nic.pci.server.1.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm0-1500/1/nic.shm.server.1.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:56", "gem5 executing on spyder04, pid 28678", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm0-1500/1/gem5-out.server.1 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm0-1500/0/gem5-cp.server.1 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm0-1500/1/cfg.server.1.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm0-1500/1/nic.pci.server.1. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm0-1500/1/nic.shm.server.1. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2300144438200", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.080887] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.080887] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.080887] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.080887] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.087886] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.087886] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.206868] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.206868] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.207867] i40e 0000:00:02.0: MAC address: e4:ce:1f:99:dd:32\r", "[ 1.207867] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.209867] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.287855] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.287855] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.287855] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.287855] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.383841] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 1500 up\r", "[ 1.397839] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.2/24 dev eth0\r", "+ iperf -s -w 1M -Z dctcp\r", "------------------------------------------------------------\r", "Server listening on TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 5] local 192.168.64.2 port 5001 connected with 192.168.64.4 port 39072\r", "[ 2.375690] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 5] 0.0-10.0 sec 816 MBytes 683 Mbits/sec\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2300144428200. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2300144438200. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.client.0": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm0-1500/1/gem5-out.client.0", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm0-1500/0/gem5-cp.client.0", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm0-1500/1/cfg.client.0.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm0-1500/1/nic.pci.client.0.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm0-1500/1/nic.shm.client.0.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:56", "gem5 executing on spyder04, pid 28679", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm0-1500/1/gem5-out.client.0 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm0-1500/0/gem5-cp.client.0 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm0-1500/1/cfg.client.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm0-1500/1/nic.pci.client.0. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm0-1500/1/nic.shm.client.0. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2312618246000", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.091886] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.091886] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.091886] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.091886] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.098885] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.098885] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.217867] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.217867] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.218867] i40e 0000:00:02.0: MAC address: b0:c9:05:66:67:43\r", "[ 1.218867] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.220866] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.303854] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.303854] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.303854] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.303854] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.399839] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 1500 up\r", "[ 1.412837] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.3/24 dev eth0\r", "+ sleep 1\r", "+ iperf -w 1M -c 192.168.64.1 -Z dctcp -i 1\r", "------------------------------------------------------------\r", "Client connecting to 192.168.64.1, TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 4] local 192.168.64.3 port 45722 connected with 192.168.64.1 port 5001\r", "[ 2.502671] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 4] 0.0- 1.0 sec 82.8 MBytes 694 Mbits/sec\r", "[ 4] 1.0- 2.0 sec 80.8 MBytes 677 Mbits/sec\r", "[ 4] 2.0- 3.0 sec 80.0 MBytes 671 Mbits/sec\r", "[ 4] 3.0- 4.0 sec 80.6 MBytes 676 Mbits/sec\r", "[ 4] 4.0- 5.0 sec 80.6 MBytes 676 Mbits/sec\r", "[ 4] 5.0- 6.0 sec 80.6 MBytes 676 Mbits/sec\r", "[ 4] 6.0- 7.0 sec 78.0 MBytes 654 Mbits/sec\r", "[ 4] 7.0- 8.0 sec 79.2 MBytes 665 Mbits/sec\r", "[ 4] 8.0- 9.0 sec 80.2 MBytes 673 Mbits/sec\r", "[ 4] 9.0-10.0 sec 81.8 MBytes 686 Mbits/sec\r", "[ 4] 0.0-10.0 sec 805 MBytes 674 Mbits/sec\r", "+ sleep 20\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2312618236000. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2312618246000. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14", "warn: PowerState: More than one power state change request encountered within the same simulation tick", "warn: PowerState: More than one power state change request encountered within the same simulation tick", "warn: PowerState: More than one power state change request encountered within the same simulation tick", "warn: PowerState: More than one power state change request encountered within the same simulation tick", "warn: PowerState: More than one power state change request encountered within the same simulation tick", "warn: PowerState: More than one power state change request encountered within the same simulation tick"]}, "host.client.1": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm0-1500/1/gem5-out.client.1", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm0-1500/0/gem5-cp.client.1", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm0-1500/1/cfg.client.1.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm0-1500/1/nic.pci.client.1.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm0-1500/1/nic.shm.client.1.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:56", "gem5 executing on spyder04, pid 28680", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm0-1500/1/gem5-out.client.1 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm0-1500/0/gem5-cp.client.1 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm0-1500/1/cfg.client.1.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm0-1500/1/nic.pci.client.1. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm0-1500/1/nic.shm.client.1. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2182039357200", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.033892] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.033892] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.033892] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.033892] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.041891] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.041891] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.159873] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.160873] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.160873] i40e 0000:00:02.0: MAC address: 9c:94:d8:eb:74:5f\r", "[ 1.160873] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.162873] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.247860] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.247860] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.247860] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.247860] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.343845] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 1500 up\r", "[ 1.357843] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.4/24 dev eth0\r", "+ sleep 1\r", "+ iperf -w 1M -c 192.168.64.2 -Z dctcp -i 1\r", "------------------------------------------------------------\r", "Client connecting to 192.168.64.2, TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 4] local 192.168.64.4 port 39072 connected with 192.168.64.2 port 5001\r", "[ 2.446678] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 4] 0.0- 1.0 sec 83.5 MBytes 700 Mbits/sec\r", "[ 4] 1.0- 2.0 sec 81.4 MBytes 683 Mbits/sec\r", "[ 4] 2.0- 3.0 sec 81.2 MBytes 682 Mbits/sec\r", "[ 4] 3.0- 4.0 sec 81.4 MBytes 683 Mbits/sec\r", "[ 4] 4.0- 5.0 sec 81.4 MBytes 683 Mbits/sec\r", "[ 4] 5.0- 6.0 sec 82.0 MBytes 688 Mbits/sec\r", "[ 4] 6.0- 7.0 sec 80.6 MBytes 676 Mbits/sec\r", "[ 4] 7.0- 8.0 sec 81.4 MBytes 683 Mbits/sec\r", "[ 4] 8.0- 9.0 sec 81.4 MBytes 683 Mbits/sec\r", "[ 4] 9.0-10.0 sec 81.4 MBytes 683 Mbits/sec\r", "[ 4] 0.0-10.0 sec 816 MBytes 684 Mbits/sec\r", "+ sleep 2\r", "+ m5 exit\r", "Exiting @ tick 15552254968400 because m5_exit instruction encountered"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2182039347200. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2182039357200. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14", "warn: PowerState: More than one power state change request encountered within the same simulation tick", "warn: PowerState: More than one power state change request encountered within the same simulation tick", "warn: PowerState: More than one power state change request encountered within the same simulation tick"]}}, "success": true}
\ No newline at end of file
{"exp_name": "gt-ib-dumbbell-DCTCPm0-4000", "start_time": 1607019296.296363, "end_time": 1607053364.5457559, "sims": {"nic.server.0.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm0-4000/1/nic.pci.server.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm0-4000/1/nic.eth.server.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm0-4000/1/nic.shm.server.0.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["2d003dd44e08", "sync_pci=1 sync_eth=1", "exit main_time: 15571215968000"]}, "nic.server.1.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm0-4000/1/nic.pci.server.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm0-4000/1/nic.eth.server.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm0-4000/1/nic.shm.server.1.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["bed24435874", "sync_pci=1 sync_eth=1", "exit main_time: 15571215983000"]}, "nic.client.0.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm0-4000/1/nic.pci.client.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm0-4000/1/nic.eth.client.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm0-4000/1/nic.shm.client.0.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["6ada724e62dc", "sync_pci=1 sync_eth=1", "exit main_time: 15571216017000"]}, "nic.client.1.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm0-4000/1/nic.pci.client.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm0-4000/1/nic.eth.client.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm0-4000/1/nic.shm.client.1.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["28b416e877ac", "sync_pci=1 sync_eth=1", "exit main_time: 15571215168400"]}, "net.": {"class": "NS3DumbbellNet", "cmd": ["/home/hejingli/endhostsim-code/ns-3/cosim-run.sh", "cosim", "cosim-dumbbell-example", "--CosimPortLeft=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm0-4000/1/nic.eth.server.0.", "--CosimPortLeft=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm0-4000/1/nic.eth.server.1.", "--CosimPortRight=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm0-4000/1/nic.eth.client.0.", "--CosimPortRight=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm0-4000/1/nic.eth.client.1.", "--LinkRate=10Gb/s", "--LinkLatency=500ns", "--EcnTh=0"], "stdout": [], "stderr": []}, "host.server.0": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm0-4000/1/gem5-out.server.0", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm0-4000/0/gem5-cp.server.0", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm0-4000/1/cfg.server.0.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm0-4000/1/nic.pci.server.0.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm0-4000/1/nic.shm.server.0.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:58", "gem5 executing on spyder10, pid 56890", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm0-4000/1/gem5-out.server.0 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm0-4000/0/gem5-cp.server.0 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm0-4000/1/cfg.server.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm0-4000/1/nic.pci.server.0. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm0-4000/1/nic.shm.server.0. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2255796165000", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.059890] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.059890] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.059890] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.060890] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.067889] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.067889] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.185871] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.186871] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.186871] i40e 0000:00:02.0: MAC address: 08:4e:d4:3d:00:2d\r", "[ 1.186871] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.188871] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.271858] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.271858] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.271858] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.271858] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.367843] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 4000 up\r", "[ 1.375842] i40e 0000:00:02.0 eth0: changing MTU from 1500 to 4000\r", "[ 1.381841] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.1/24 dev eth0\r", "+ iperf -s -w 1M -Z dctcp\r", "------------------------------------------------------------\r", "Server listening on TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 5] local 192.168.64.1 port 5001 connected with 192.168.64.3 port 47146\r", "[ 2.381689] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 5] 0.0-10.0 sec 1.97 GBytes 1.69 Gbits/sec\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2255796155000. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2255796165000. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.server.1": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm0-4000/1/gem5-out.server.1", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm0-4000/0/gem5-cp.server.1", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm0-4000/1/cfg.server.1.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm0-4000/1/nic.pci.server.1.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm0-4000/1/nic.shm.server.1.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:58", "gem5 executing on spyder10, pid 56896", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm0-4000/1/gem5-out.server.1 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm0-4000/0/gem5-cp.server.1 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm0-4000/1/cfg.server.1.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm0-4000/1/nic.pci.server.1. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm0-4000/1/nic.shm.server.1. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2291171362000", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.056889] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.056889] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.056889] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.056889] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.063888] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.063888] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.182870] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.182870] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.183870] i40e 0000:00:02.0: MAC address: 74:58:43:24:ed:0b\r", "[ 1.183870] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.185869] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.263857] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.263857] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.263857] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.263857] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.359843] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 4000 up\r", "[ 1.367842] i40e 0000:00:02.0 eth0: changing MTU from 1500 to 4000\r", "[ 1.373841] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.2/24 dev eth0\r", "+ iperf -s -w 1M -Z dctcp\r", "------------------------------------------------------------\r", "Server listening on TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 5] local 192.168.64.2 port 5001 connected with 192.168.64.4 port 56616\r", "[ 2.358691] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 5] 0.0-10.0 sec 1.97 GBytes 1.69 Gbits/sec\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2291171352000. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2291171362000. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.client.0": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm0-4000/1/gem5-out.client.0", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm0-4000/0/gem5-cp.client.0", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm0-4000/1/cfg.client.0.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm0-4000/1/nic.pci.client.0.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm0-4000/1/nic.shm.client.0.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:58", "gem5 executing on spyder10, pid 56898", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm0-4000/1/gem5-out.client.0 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm0-4000/0/gem5-cp.client.0 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm0-4000/1/cfg.client.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm0-4000/1/nic.pci.client.0. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm0-4000/1/nic.shm.client.0. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2187127181600", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.037893] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.037893] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.037893] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.037893] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.044892] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.044892] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.163874] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.164874] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.164874] i40e 0000:00:02.0: MAC address: dc:62:4e:72:da:6a\r", "[ 1.164874] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.166873] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.247861] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.247861] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.247861] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.247861] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.343847] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 4000 up\r", "[ 1.351845] i40e 0000:00:02.0 eth0: changing MTU from 1500 to 4000\r", "[ 1.357845] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.3/24 dev eth0\r", "+ sleep 1\r", "+ iperf -w 1M -c 192.168.64.1 -Z dctcp -i 1\r", "------------------------------------------------------------\r", "Client connecting to 192.168.64.1, TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 4] local 192.168.64.3 port 47146 connected with 192.168.64.1 port 5001\r", "[ 2.461677] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 4] 0.0- 1.0 sec 202 MBytes 1.70 Gbits/sec\r", "[ 4] 1.0- 2.0 sec 201 MBytes 1.69 Gbits/sec\r", "[ 4] 2.0- 3.0 sec 201 MBytes 1.69 Gbits/sec\r", "[ 4] 3.0- 4.0 sec 201 MBytes 1.69 Gbits/sec\r", "[ 4] 4.0- 5.0 sec 201 MBytes 1.69 Gbits/sec\r", "[ 4] 5.0- 6.0 sec 202 MBytes 1.69 Gbits/sec\r", "[ 4] 6.0- 7.0 sec 202 MBytes 1.69 Gbits/sec\r", "[ 4] 7.0- 8.0 sec 202 MBytes 1.69 Gbits/sec\r", "[ 4] 8.0- 9.0 sec 201 MBytes 1.69 Gbits/sec\r", "[ 4] 9.0-10.0 sec 202 MBytes 1.69 Gbits/sec\r", "[ 4] 0.0-10.0 sec 1.97 GBytes 1.69 Gbits/sec\r", "+ sleep 20\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2187127171600. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2187127181600. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14", "warn: PowerState: More than one power state change request encountered within the same simulation tick"]}, "host.client.1": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm0-4000/1/gem5-out.client.1", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm0-4000/0/gem5-cp.client.1", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm0-4000/1/cfg.client.1.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm0-4000/1/nic.pci.client.1.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm0-4000/1/nic.shm.client.1.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:58", "gem5 executing on spyder10, pid 56901", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm0-4000/1/gem5-out.client.1 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm0-4000/0/gem5-cp.client.1 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm0-4000/1/cfg.client.1.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm0-4000/1/nic.pci.client.1. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm0-4000/1/nic.shm.client.1. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2206884806000", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.031893] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.031893] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.031893] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.031893] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.038892] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.038892] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.157874] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.158874] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.158874] i40e 0000:00:02.0: MAC address: ac:77:e8:16:b4:28\r", "[ 1.158874] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.160874] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.239862] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.239862] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.239862] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.239862] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.335847] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 4000 up\r", "[ 1.343846] i40e 0000:00:02.0 eth0: changing MTU from 1500 to 4000\r", "[ 1.349845] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.4/24 dev eth0\r", "+ sleep 1\r", "+ iperf -w 1M -c 192.168.64.2 -Z dctcp -i 1\r", "------------------------------------------------------------\r", "Client connecting to 192.168.64.2, TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 4] local 192.168.64.4 port 56616 connected with 192.168.64.2 port 5001\r", "[ 2.448678] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 4] 0.0- 1.0 sec 202 MBytes 1.70 Gbits/sec\r", "[ 4] 1.0- 2.0 sec 201 MBytes 1.69 Gbits/sec\r", "[ 4] 2.0- 3.0 sec 201 MBytes 1.69 Gbits/sec\r", "[ 4] 3.0- 4.0 sec 201 MBytes 1.69 Gbits/sec\r", "[ 4] 4.0- 5.0 sec 201 MBytes 1.69 Gbits/sec\r", "[ 4] 5.0- 6.0 sec 202 MBytes 1.69 Gbits/sec\r", "[ 4] 6.0- 7.0 sec 202 MBytes 1.69 Gbits/sec\r", "[ 4] 7.0- 8.0 sec 202 MBytes 1.69 Gbits/sec\r", "[ 4] 8.0- 9.0 sec 201 MBytes 1.69 Gbits/sec\r", "[ 4] 9.0-10.0 sec 202 MBytes 1.69 Gbits/sec\r", "[ 4] 0.0-10.0 sec 1.97 GBytes 1.69 Gbits/sec\r", "+ sleep 2\r", "+ m5 exit\r", "Exiting @ tick 15571214690800 because m5_exit instruction encountered"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2206884796000. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2206884806000. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14", "warn: PowerState: More than one power state change request encountered within the same simulation tick"]}}, "success": true}
\ No newline at end of file
{"exp_name": "gt-ib-dumbbell-DCTCPm108160-1500", "start_time": 1607019296.1622508, "end_time": 1607058923.023006, "sims": {"nic.server.0.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm108160-1500/1/nic.pci.server.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm108160-1500/1/nic.eth.server.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm108160-1500/1/nic.shm.server.0.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["32fab73e977c", "sync_pci=1 sync_eth=1", "exit main_time: 15700893882985"]}, "nic.server.1.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm108160-1500/1/nic.pci.server.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm108160-1500/1/nic.eth.server.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm108160-1500/1/nic.shm.server.1.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["604ab83fb184", "sync_pci=1 sync_eth=1", "exit main_time: 15700893870000"]}, "nic.client.0.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm108160-1500/1/nic.pci.client.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm108160-1500/1/nic.eth.client.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm108160-1500/1/nic.shm.client.0.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["3f378aecbbec", "sync_pci=1 sync_eth=1", "exit main_time: 15700893929000"]}, "nic.client.1.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm108160-1500/1/nic.pci.client.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm108160-1500/1/nic.eth.client.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm108160-1500/1/nic.shm.client.1.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["1f74acf983a0", "sync_pci=1 sync_eth=1", "exit main_time: 15700893212400"]}, "net.": {"class": "NS3DumbbellNet", "cmd": ["/home/hejingli/endhostsim-code/ns-3/cosim-run.sh", "cosim", "cosim-dumbbell-example", "--CosimPortLeft=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm108160-1500/1/nic.eth.server.0.", "--CosimPortLeft=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm108160-1500/1/nic.eth.server.1.", "--CosimPortRight=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm108160-1500/1/nic.eth.client.0.", "--CosimPortRight=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm108160-1500/1/nic.eth.client.1.", "--LinkRate=10Gb/s", "--LinkLatency=500ns", "--EcnTh=108160"], "stdout": [], "stderr": []}, "host.server.0": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm108160-1500/1/gem5-out.server.0", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm108160-1500/0/gem5-cp.server.0", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm108160-1500/1/cfg.server.0.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm108160-1500/1/nic.pci.server.0.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm108160-1500/1/nic.shm.server.0.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:57", "gem5 executing on spyder08, pid 63235", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm108160-1500/1/gem5-out.server.0 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm108160-1500/0/gem5-cp.server.0 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm108160-1500/1/cfg.server.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm108160-1500/1/nic.pci.server.0. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm108160-1500/1/nic.shm.server.0. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2167400327400", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.038893] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.038893] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.038893] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.038893] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.045892] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.046891] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.164873] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.165873] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.165873] i40e 0000:00:02.0: MAC address: 7c:97:3e:b7:fa:32\r", "[ 1.165873] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.167873] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.247861] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.247861] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.247861] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.247861] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.343846] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 1500 up\r", "[ 1.357844] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.1/24 dev eth0\r", "+ iperf -s -w 1M -Z dctcp\r", "------------------------------------------------------------\r", "Server listening on TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 5] local 192.168.64.1 port 5001 connected with 192.168.64.3 port 33270\r", "[ 2.542664] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 5] 0.0-10.0 sec 4.06 GBytes 3.49 Gbits/sec\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2167400317400. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2167400327400. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.server.1": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm108160-1500/1/gem5-out.server.1", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm108160-1500/0/gem5-cp.server.1", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm108160-1500/1/cfg.server.1.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm108160-1500/1/nic.pci.server.1.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm108160-1500/1/nic.shm.server.1.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:57", "gem5 executing on spyder08, pid 63242", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm108160-1500/1/gem5-out.server.1 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm108160-1500/0/gem5-cp.server.1 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm108160-1500/1/cfg.server.1.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm108160-1500/1/nic.pci.server.1. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm108160-1500/1/nic.shm.server.1. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2258793303200", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.056890] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.056890] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.056890] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.057890] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.064889] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.064889] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.182871] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.183871] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.183871] i40e 0000:00:02.0: MAC address: 84:b1:3f:b8:4a:60\r", "[ 1.183871] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.185870] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.263859] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.263859] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.263859] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.263859] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.359844] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 1500 up\r", "[ 1.373842] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.2/24 dev eth0\r", "+ iperf -s -w 1M -Z dctcp\r", "------------------------------------------------------------\r", "Server listening on TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 5] local 192.168.64.2 port 5001 connected with 192.168.64.4 port 50076\r", "[ 2.495671] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 5] 0.0-10.0 sec 4.09 GBytes 3.51 Gbits/sec\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2258793293200. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2258793303200. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.client.0": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm108160-1500/1/gem5-out.client.0", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm108160-1500/0/gem5-cp.client.0", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm108160-1500/1/cfg.client.0.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm108160-1500/1/nic.pci.client.0.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm108160-1500/1/nic.shm.client.0.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:57", "gem5 executing on spyder08, pid 63245", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm108160-1500/1/gem5-out.client.0 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm108160-1500/0/gem5-cp.client.0 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm108160-1500/1/cfg.client.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm108160-1500/1/nic.pci.client.0. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm108160-1500/1/nic.shm.client.0. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2308579637400", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.067889] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.067889] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.068888] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.068888] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.075887] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.075887] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.193869] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.194869] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.194869] i40e 0000:00:02.0: MAC address: ec:bb:ec:8a:37:3f\r", "[ 1.194869] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.196869] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.279856] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.279856] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.279856] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.279856] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.375842] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 1500 up\r", "[ 1.388840] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.3/24 dev eth0\r", "+ sleep 1\r", "+ iperf -w 1M -c 192.168.64.1 -Z dctcp -i 1\r", "------------------------------------------------------------\r", "Client connecting to 192.168.64.1, TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 4] local 192.168.64.3 port 33270 connected with 192.168.64.1 port 5001\r", "[ 2.628651] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 4] 0.0- 1.0 sec 420 MBytes 3.52 Gbits/sec\r", "[ 4] 1.0- 2.0 sec 416 MBytes 3.49 Gbits/sec\r", "[ 4] 2.0- 3.0 sec 420 MBytes 3.52 Gbits/sec\r", "[ 4] 3.0- 4.0 sec 421 MBytes 3.53 Gbits/sec\r", "[ 4] 4.0- 5.0 sec 418 MBytes 3.50 Gbits/sec\r", "[ 4] 5.0- 6.0 sec 418 MBytes 3.51 Gbits/sec\r", "[ 4] 6.0- 7.0 sec 412 MBytes 3.45 Gbits/sec\r", "[ 4] 7.0- 8.0 sec 415 MBytes 3.48 Gbits/sec\r", "[ 4] 8.0- 9.0 sec 417 MBytes 3.50 Gbits/sec\r", "[ 4] 9.0-10.0 sec 406 MBytes 3.40 Gbits/sec\r", "[ 4] 0.0-10.0 sec 4.06 GBytes 3.49 Gbits/sec\r", "+ sleep 20\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2308579627400. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2308579637400. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.client.1": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm108160-1500/1/gem5-out.client.1", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm108160-1500/0/gem5-cp.client.1", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm108160-1500/1/cfg.client.1.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm108160-1500/1/nic.pci.client.1.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm108160-1500/1/nic.shm.client.1.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:57", "gem5 executing on spyder08, pid 63247", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm108160-1500/1/gem5-out.client.1 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm108160-1500/0/gem5-cp.client.1 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm108160-1500/1/cfg.client.1.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm108160-1500/1/nic.pci.client.1. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm108160-1500/1/nic.shm.client.1. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2332915245600", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.075887] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.075887] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.075887] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.075887] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.083886] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.083886] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.201868] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.202868] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.202868] i40e 0000:00:02.0: MAC address: a0:83:f9:ac:74:1f\r", "[ 1.202868] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.204868] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.287855] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.287855] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.287855] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.287855] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.383841] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 1500 up\r", "[ 1.397839] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.4/24 dev eth0\r", "+ sleep 1\r", "+ iperf -w 1M -c 192.168.64.2 -Z dctcp -i 1\r", "------------------------------------------------------------\r", "Client connecting to 192.168.64.2, TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 4] local 192.168.64.4 port 50076 connected with 192.168.64.2 port 5001\r", "[ 2.608654] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 4] 0.0- 1.0 sec 416 MBytes 3.49 Gbits/sec\r", "[ 4] 1.0- 2.0 sec 429 MBytes 3.60 Gbits/sec\r", "[ 4] 2.0- 3.0 sec 407 MBytes 3.42 Gbits/sec\r", "[ 4] 3.0- 4.0 sec 410 MBytes 3.44 Gbits/sec\r", "[ 4] 4.0- 5.0 sec 416 MBytes 3.49 Gbits/sec\r", "[ 4] 5.0- 6.0 sec 419 MBytes 3.52 Gbits/sec\r", "[ 4] 6.0- 7.0 sec 428 MBytes 3.59 Gbits/sec\r", "[ 4] 7.0- 8.0 sec 422 MBytes 3.54 Gbits/sec\r", "[ 4] 8.0- 9.0 sec 414 MBytes 3.47 Gbits/sec\r", "[ 4] 9.0-10.0 sec 427 MBytes 3.58 Gbits/sec\r", "[ 4] 0.0-10.0 sec 4.09 GBytes 3.51 Gbits/sec\r", "+ sleep 2\r", "+ m5 exit\r", "Exiting @ tick 15700892927600 because m5_exit instruction encountered"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2332915235600. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2332915245600. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}}, "success": true}
\ No newline at end of file
{"exp_name": "gt-ib-dumbbell-DCTCPm108160-4000", "start_time": 1607019298.7340183, "end_time": 1607055597.5194578, "sims": {"nic.server.0.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm108160-4000/1/nic.pci.server.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm108160-4000/1/nic.eth.server.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm108160-4000/1/nic.shm.server.0.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["27a64b95bee8", "sync_pci=1 sync_eth=1", "exit main_time: 15612758225000"]}, "nic.server.1.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm108160-4000/1/nic.pci.server.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm108160-4000/1/nic.eth.server.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm108160-4000/1/nic.shm.server.1.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["4020b77507c4", "sync_pci=1 sync_eth=1", "exit main_time: 15612758224000"]}, "nic.client.0.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm108160-4000/1/nic.pci.client.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm108160-4000/1/nic.eth.client.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm108160-4000/1/nic.shm.client.0.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["fc38ea4f650", "sync_pci=1 sync_eth=1", "exit main_time: 15612758286000"]}, "nic.client.1.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm108160-4000/1/nic.pci.client.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm108160-4000/1/nic.eth.client.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm108160-4000/1/nic.shm.client.1.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["6a6408242a5c", "sync_pci=1 sync_eth=1", "exit main_time: 15612757339400"]}, "net.": {"class": "NS3DumbbellNet", "cmd": ["/home/hejingli/endhostsim-code/ns-3/cosim-run.sh", "cosim", "cosim-dumbbell-example", "--CosimPortLeft=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm108160-4000/1/nic.eth.server.0.", "--CosimPortLeft=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm108160-4000/1/nic.eth.server.1.", "--CosimPortRight=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm108160-4000/1/nic.eth.client.0.", "--CosimPortRight=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm108160-4000/1/nic.eth.client.1.", "--LinkRate=10Gb/s", "--LinkLatency=500ns", "--EcnTh=108160"], "stdout": [], "stderr": []}, "host.server.0": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm108160-4000/1/gem5-out.server.0", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm108160-4000/0/gem5-cp.server.0", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm108160-4000/1/cfg.server.0.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm108160-4000/1/nic.pci.server.0.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm108160-4000/1/nic.shm.server.0.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:15:01", "gem5 executing on spyder12, pid 1821", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm108160-4000/1/gem5-out.server.0 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm108160-4000/0/gem5-cp.server.0 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm108160-4000/1/cfg.server.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm108160-4000/1/nic.pci.server.0. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm108160-4000/1/nic.shm.server.0. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2215538341400", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.045892] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.045892] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.045892] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.045892] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.052891] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.052891] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.171873] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.172873] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.172873] i40e 0000:00:02.0: MAC address: e8:be:95:4b:a6:27\r", "[ 1.172873] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.174872] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.255860] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.255860] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.255860] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.255860] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.351845] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 4000 up\r", "[ 1.359844] i40e 0000:00:02.0 eth0: changing MTU from 1500 to 4000\r", "[ 1.365843] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.1/24 dev eth0\r", "+ iperf -s -w 1M -Z dctcp\r", "------------------------------------------------------------\r", "Server listening on TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 5] local 192.168.64.1 port 5001 connected with 192.168.64.3 port 49074\r", "[ 2.505670] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 5] 0.0-10.0 sec 5.15 GBytes 4.42 Gbits/sec\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2215538331400. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2215538341400. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.server.1": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm108160-4000/1/gem5-out.server.1", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm108160-4000/0/gem5-cp.server.1", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm108160-4000/1/cfg.server.1.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm108160-4000/1/nic.pci.server.1.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm108160-4000/1/nic.shm.server.1.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:15:01", "gem5 executing on spyder12, pid 1832", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm108160-4000/1/gem5-out.server.1 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm108160-4000/0/gem5-cp.server.1 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm108160-4000/1/cfg.server.1.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm108160-4000/1/nic.pci.server.1. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm108160-4000/1/nic.shm.server.1. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2212747070600", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.041893] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.041893] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.041893] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.041893] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.049892] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.049892] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.167874] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.168874] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.168874] i40e 0000:00:02.0: MAC address: c4:07:75:b7:20:40\r", "[ 1.168874] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.170873] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.255861] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.255861] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.255861] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.255861] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.351846] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 4000 up\r", "[ 1.359845] i40e 0000:00:02.0 eth0: changing MTU from 1500 to 4000\r", "[ 1.365844] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.2/24 dev eth0\r", "+ iperf -s -w 1M -Z dctcp\r", "------------------------------------------------------------\r", "Server listening on TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 5] local 192.168.64.2 port 5001 connected with 192.168.64.4 port 49276\r", "[ 2.433682] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 5] 0.0-10.0 sec 5.11 GBytes 4.38 Gbits/sec\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2212747060600. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2212747070600. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.client.0": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm108160-4000/1/gem5-out.client.0", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm108160-4000/0/gem5-cp.client.0", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm108160-4000/1/cfg.client.0.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm108160-4000/1/nic.pci.client.0.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm108160-4000/1/nic.shm.client.0.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:15:01", "gem5 executing on spyder12, pid 1840", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm108160-4000/1/gem5-out.client.0 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm108160-4000/0/gem5-cp.client.0 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm108160-4000/1/cfg.client.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm108160-4000/1/nic.pci.client.0. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm108160-4000/1/nic.shm.client.0. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2315316153200", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.079888] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.079888] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.080888] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.080888] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.087887] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.087887] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.205869] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.206869] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.206869] i40e 0000:00:02.0: MAC address: 50:f6:a4:8e:c3:0f\r", "[ 1.206869] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.209868] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.287857] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.287857] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.287857] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.287857] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.383842] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 4000 up\r", "[ 1.391841] i40e 0000:00:02.0 eth0: changing MTU from 1500 to 4000\r", "[ 1.397840] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.3/24 dev eth0\r", "+ sleep 1\r", "+ iperf -w 1M -c 192.168.64.1 -Z dctcp -i 1\r", "------------------------------------------------------------\r", "Client connecting to 192.168.64.1, TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 4] local 192.168.64.3 port 49074 connected with 192.168.64.1 port 5001\r", "[ 2.548665] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 4] 0.0- 1.0 sec 526 MBytes 4.41 Gbits/sec\r", "[ 4] 1.0- 2.0 sec 507 MBytes 4.26 Gbits/sec\r", "[ 4] 2.0- 3.0 sec 525 MBytes 4.40 Gbits/sec\r", "[ 4] 3.0- 4.0 sec 520 MBytes 4.36 Gbits/sec\r", "[ 4] 4.0- 5.0 sec 516 MBytes 4.33 Gbits/sec\r", "[ 4] 5.0- 6.0 sec 528 MBytes 4.43 Gbits/sec\r", "[ 4] 6.0- 7.0 sec 513 MBytes 4.30 Gbits/sec\r", "[ 4] 7.0- 8.0 sec 537 MBytes 4.51 Gbits/sec\r", "[ 4] 8.0- 9.0 sec 547 MBytes 4.59 Gbits/sec\r", "[ 4] 9.0-10.0 sec 551 MBytes 4.62 Gbits/sec\r", "[ 4] 0.0-10.0 sec 5.15 GBytes 4.42 Gbits/sec\r", "+ sleep 20\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2315316143200. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2315316153200. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.client.1": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm108160-4000/1/gem5-out.client.1", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm108160-4000/0/gem5-cp.client.1", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm108160-4000/1/cfg.client.1.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm108160-4000/1/nic.pci.client.1.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm108160-4000/1/nic.shm.client.1.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:15:01", "gem5 executing on spyder12, pid 1843", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm108160-4000/1/gem5-out.client.1 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm108160-4000/0/gem5-cp.client.1 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm108160-4000/1/cfg.client.1.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm108160-4000/1/nic.pci.client.1. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm108160-4000/1/nic.shm.client.1. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2244758924800", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.059891] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.059891] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.059891] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.059891] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.067889] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.067889] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.185872] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.186871] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.186871] i40e 0000:00:02.0: MAC address: 5c:2a:24:08:64:6a\r", "[ 1.186871] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.188871] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.271858] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.271858] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.271858] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.271858] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.367844] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 4000 up\r", "[ 1.375843] i40e 0000:00:02.0 eth0: changing MTU from 1500 to 4000\r", "[ 1.381842] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.4/24 dev eth0\r", "+ sleep 1\r", "+ iperf -w 1M -c 192.168.64.2 -Z dctcp -i 1\r", "------------------------------------------------------------\r", "Client connecting to 192.168.64.2, TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 4] local 192.168.64.4 port 49276 connected with 192.168.64.2 port 5001\r", "[ 2.552664] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 4] 0.0- 1.0 sec 524 MBytes 4.40 Gbits/sec\r", "[ 4] 1.0- 2.0 sec 539 MBytes 4.52 Gbits/sec\r", "[ 4] 2.0- 3.0 sec 526 MBytes 4.41 Gbits/sec\r", "[ 4] 3.0- 4.0 sec 529 MBytes 4.44 Gbits/sec\r", "[ 4] 4.0- 5.0 sec 537 MBytes 4.50 Gbits/sec\r", "[ 4] 5.0- 6.0 sec 519 MBytes 4.35 Gbits/sec\r", "[ 4] 6.0- 7.0 sec 536 MBytes 4.50 Gbits/sec\r", "[ 4] 7.0- 8.0 sec 516 MBytes 4.33 Gbits/sec\r", "[ 4] 8.0- 9.0 sec 504 MBytes 4.23 Gbits/sec\r", "[ 4] 9.0-10.0 sec 498 MBytes 4.18 Gbits/sec\r", "[ 4] 0.0-10.0 sec 5.11 GBytes 4.39 Gbits/sec\r", "+ sleep 2\r", "+ m5 exit\r", "Exiting @ tick 15612757007600 because m5_exit instruction encountered"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2244758914800. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2244758924800. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}}, "success": true}
\ No newline at end of file
{"exp_name": "gt-ib-dumbbell-DCTCPm116480-1500", "start_time": 1607019296.1644807, "end_time": 1607069240.1560538, "sims": {"nic.server.0.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm116480-1500/1/nic.pci.server.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm116480-1500/1/nic.eth.server.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm116480-1500/1/nic.shm.server.0.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["2270e4159cb0", "sync_pci=1 sync_eth=1", "exit main_time: 15533005068000"]}, "nic.server.1.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm116480-1500/1/nic.pci.server.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm116480-1500/1/nic.eth.server.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm116480-1500/1/nic.shm.server.1.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["4fc16715b6b8", "sync_pci=1 sync_eth=1", "exit main_time: 15533005073000"]}, "nic.client.0.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm116480-1500/1/nic.pci.client.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm116480-1500/1/nic.eth.client.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm116480-1500/1/nic.shm.client.0.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["1e24efd9c654", "sync_pci=1 sync_eth=1", "exit main_time: 15533004990000"]}, "nic.client.1.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm116480-1500/1/nic.pci.client.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm116480-1500/1/nic.eth.client.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm116480-1500/1/nic.shm.client.1.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["eeb7e6388d4", "sync_pci=1 sync_eth=1", "exit main_time: 15533004371400"]}, "net.": {"class": "NS3DumbbellNet", "cmd": ["/home/hejingli/endhostsim-code/ns-3/cosim-run.sh", "cosim", "cosim-dumbbell-example", "--CosimPortLeft=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm116480-1500/1/nic.eth.server.0.", "--CosimPortLeft=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm116480-1500/1/nic.eth.server.1.", "--CosimPortRight=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm116480-1500/1/nic.eth.client.0.", "--CosimPortRight=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm116480-1500/1/nic.eth.client.1.", "--LinkRate=10Gb/s", "--LinkLatency=500ns", "--EcnTh=116480"], "stdout": [], "stderr": []}, "host.server.0": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm116480-1500/1/gem5-out.server.0", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm116480-1500/0/gem5-cp.server.0", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm116480-1500/1/cfg.server.0.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm116480-1500/1/nic.pci.server.0.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm116480-1500/1/nic.shm.server.0.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:57", "gem5 executing on spyder08, pid 63236", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm116480-1500/1/gem5-out.server.0 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm116480-1500/0/gem5-cp.server.0 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm116480-1500/1/cfg.server.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm116480-1500/1/nic.pci.server.0. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm116480-1500/1/nic.shm.server.0. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2270649179200", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.065890] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.065890] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.066890] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.066890] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.073889] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.073889] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.191871] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.192871] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.192871] i40e 0000:00:02.0: MAC address: b0:9c:15:e4:70:22\r", "[ 1.193871] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.195870] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.279858] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.279858] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.279858] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.279858] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.375843] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 1500 up\r", "[ 1.389841] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.1/24 dev eth0\r", "+ iperf -s -w 1M -Z dctcp\r", "------------------------------------------------------------\r", "Server listening on TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 5] local 192.168.64.1 port 5001 connected with 192.168.64.3 port 36130\r", "[ 2.508671] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 5] 0.0-10.0 sec 4.15 GBytes 3.56 Gbits/sec\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2270649169200. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2270649179200. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.server.1": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm116480-1500/1/gem5-out.server.1", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm116480-1500/0/gem5-cp.server.1", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm116480-1500/1/cfg.server.1.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm116480-1500/1/nic.pci.server.1.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm116480-1500/1/nic.shm.server.1.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:57", "gem5 executing on spyder08, pid 63244", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm116480-1500/1/gem5-out.server.1 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm116480-1500/0/gem5-cp.server.1 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm116480-1500/1/cfg.server.1.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm116480-1500/1/nic.pci.server.1. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm116480-1500/1/nic.shm.server.1. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2249491972800", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.057890] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.057890] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.057890] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.057890] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.064889] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.064889] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.183871] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.184871] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.184871] i40e 0000:00:02.0: MAC address: b8:b6:15:67:c1:4f\r", "[ 1.184871] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.186871] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.271858] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.271858] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.271858] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.271858] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.367843] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 1500 up\r", "[ 1.381841] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.2/24 dev eth0\r", "+ iperf -s -w 1M -Z dctcp\r", "------------------------------------------------------------\r", "Server listening on TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 5] local 192.168.64.2 port 5001 connected with 192.168.64.4 port 60066\r", "[ 2.339695] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 5] 0.0-10.0 sec 4.11 GBytes 3.53 Gbits/sec\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2249491962800. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2249491972800. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.client.0": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm116480-1500/1/gem5-out.client.0", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm116480-1500/0/gem5-cp.client.0", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm116480-1500/1/cfg.client.0.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm116480-1500/1/nic.pci.client.0.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm116480-1500/1/nic.shm.client.0.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:57", "gem5 executing on spyder08, pid 63246", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm116480-1500/1/gem5-out.client.0 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm116480-1500/0/gem5-cp.client.0 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm116480-1500/1/cfg.client.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm116480-1500/1/nic.pci.client.0. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm116480-1500/1/nic.shm.client.0. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2350589123400", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.076888] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.076888] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.077888] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.077888] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.084887] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.084887] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.202869] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.203868] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.203868] i40e 0000:00:02.0: MAC address: 54:c6:d9:ef:24:1e\r", "[ 1.203868] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.205868] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.287856] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.287856] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.287856] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.287856] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.383841] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 1500 up\r", "[ 1.397839] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.3/24 dev eth0\r", "+ sleep 1\r", "+ iperf -w 1M -c 192.168.64.1 -Z dctcp -i 1\r", "------------------------------------------------------------\r", "Client connecting to 192.168.64.1, TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 4] local 192.168.64.3 port 36130 connected with 192.168.64.1 port 5001\r", "[ 2.604656] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 4] 0.0- 1.0 sec 421 MBytes 3.53 Gbits/sec\r", "[ 4] 1.0- 2.0 sec 426 MBytes 3.57 Gbits/sec\r", "[ 4] 2.0- 3.0 sec 421 MBytes 3.53 Gbits/sec\r", "[ 4] 3.0- 4.0 sec 425 MBytes 3.57 Gbits/sec\r", "[ 4] 4.0- 5.0 sec 422 MBytes 3.54 Gbits/sec\r", "[ 4] 5.0- 6.0 sec 422 MBytes 3.54 Gbits/sec\r", "[ 4] 6.0- 7.0 sec 427 MBytes 3.58 Gbits/sec\r", "[ 4] 7.0- 8.0 sec 428 MBytes 3.59 Gbits/sec\r", "[ 4] 8.0- 9.0 sec 422 MBytes 3.54 Gbits/sec\r", "[ 4] 9.0-10.0 sec 431 MBytes 3.62 Gbits/sec\r", "[ 4] 0.0-10.0 sec 4.15 GBytes 3.56 Gbits/sec\r", "+ sleep 20\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2350589113400. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2350589123400. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.client.1": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm116480-1500/1/gem5-out.client.1", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm116480-1500/0/gem5-cp.client.1", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm116480-1500/1/cfg.client.1.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm116480-1500/1/nic.pci.client.1.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm116480-1500/1/nic.shm.client.1.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:57", "gem5 executing on spyder08, pid 63248", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm116480-1500/1/gem5-out.client.1 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm116480-1500/0/gem5-cp.client.1 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm116480-1500/1/cfg.client.1.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm116480-1500/1/nic.pci.client.1. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm116480-1500/1/nic.shm.client.1. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2165293112200", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.043892] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.044892] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.044892] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.044892] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.051891] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.051891] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.169873] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.170873] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.170873] i40e 0000:00:02.0: MAC address: d4:88:63:7e:eb:0e\r", "[ 1.171873] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.173873] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.255860] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.255860] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.255860] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.255860] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.351846] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 1500 up\r", "[ 1.365844] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.4/24 dev eth0\r", "+ sleep 1\r", "+ iperf -w 1M -c 192.168.64.2 -Z dctcp -i 1\r", "------------------------------------------------------------\r", "Client connecting to 192.168.64.2, TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 4] local 192.168.64.4 port 60066 connected with 192.168.64.2 port 5001\r", "[ 2.666646] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 4] 0.0- 1.0 sec 421 MBytes 3.53 Gbits/sec\r", "[ 4] 1.0- 2.0 sec 424 MBytes 3.56 Gbits/sec\r", "[ 4] 2.0- 3.0 sec 423 MBytes 3.55 Gbits/sec\r", "[ 4] 3.0- 4.0 sec 425 MBytes 3.56 Gbits/sec\r", "[ 4] 4.0- 5.0 sec 417 MBytes 3.49 Gbits/sec\r", "[ 4] 5.0- 6.0 sec 425 MBytes 3.56 Gbits/sec\r", "[ 4] 6.0- 7.0 sec 418 MBytes 3.50 Gbits/sec\r", "[ 4] 7.0- 8.0 sec 421 MBytes 3.53 Gbits/sec\r", "[ 4] 8.0- 9.0 sec 420 MBytes 3.52 Gbits/sec\r", "[ 4] 9.0-10.0 sec 421 MBytes 3.53 Gbits/sec\r", "[ 4] 0.0-10.0 sec 4.11 GBytes 3.53 Gbits/sec\r", "+ sleep 2\r", "+ m5 exit\r", "Exiting @ tick 15533003919400 because m5_exit instruction encountered"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2165293102200. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2165293112200. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}}, "success": true}
\ No newline at end of file
{"exp_name": "gt-ib-dumbbell-DCTCPm116480-4000", "start_time": 1607019298.7269151, "end_time": 1607056292.6858103, "sims": {"nic.server.0.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm116480-4000/1/nic.pci.server.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm116480-4000/1/nic.eth.server.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm116480-4000/1/nic.shm.server.0.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["59431381af48", "sync_pci=1 sync_eth=1", "exit main_time: 15558385253000"]}, "nic.server.1.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm116480-4000/1/nic.pci.server.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm116480-4000/1/nic.eth.server.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm116480-4000/1/nic.shm.server.1.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["65803d73d3b8", "sync_pci=1 sync_eth=1", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "warn: nicsim_sync failed (t=46067510000)", "exit main_time: 15558385283000"]}, "nic.client.0.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm116480-4000/1/nic.pci.client.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm116480-4000/1/nic.eth.client.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm116480-4000/1/nic.shm.client.0.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["71bd5c3ef828", "sync_pci=1 sync_eth=1", "exit main_time: 15558385305000"]}, "nic.client.1.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm116480-4000/1/nic.pci.client.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm116480-4000/1/nic.eth.client.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm116480-4000/1/nic.shm.client.1.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["6eb0f05000b8", "sync_pci=1 sync_eth=1", "exit main_time: 15558384373400"]}, "net.": {"class": "NS3DumbbellNet", "cmd": ["/home/hejingli/endhostsim-code/ns-3/cosim-run.sh", "cosim", "cosim-dumbbell-example", "--CosimPortLeft=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm116480-4000/1/nic.eth.server.0.", "--CosimPortLeft=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm116480-4000/1/nic.eth.server.1.", "--CosimPortRight=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm116480-4000/1/nic.eth.client.0.", "--CosimPortRight=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm116480-4000/1/nic.eth.client.1.", "--LinkRate=10Gb/s", "--LinkLatency=500ns", "--EcnTh=116480"], "stdout": [], "stderr": []}, "host.server.0": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm116480-4000/1/gem5-out.server.0", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm116480-4000/0/gem5-cp.server.0", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm116480-4000/1/cfg.server.0.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm116480-4000/1/nic.pci.server.0.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm116480-4000/1/nic.shm.server.0.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:15:01", "gem5 executing on spyder12, pid 1826", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm116480-4000/1/gem5-out.server.0 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm116480-4000/0/gem5-cp.server.0 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm116480-4000/1/cfg.server.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm116480-4000/1/nic.pci.server.0. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm116480-4000/1/nic.shm.server.0. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2373007917000", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.077888] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.077888] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.077888] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.077888] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.084887] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.084887] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.203869] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.204869] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.204869] i40e 0000:00:02.0: MAC address: 48:af:81:13:43:59\r", "[ 1.204869] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.206869] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.287856] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.287856] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.287856] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.287856] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.383842] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 4000 up\r", "[ 1.391841] i40e 0000:00:02.0 eth0: changing MTU from 1500 to 4000\r", "[ 1.397840] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.1/24 dev eth0\r", "+ iperf -s -w 1M -Z dctcp\r", "------------------------------------------------------------\r", "Server listening on TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 5] local 192.168.64.1 port 5001 connected with 192.168.64.3 port 58598\r", "[ 2.362693] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 5] 0.0-10.0 sec 5.19 GBytes 4.45 Gbits/sec\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2373007907000. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2373007917000. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.server.1": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm116480-4000/1/gem5-out.server.1", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm116480-4000/0/gem5-cp.server.1", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm116480-4000/1/cfg.server.1.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm116480-4000/1/nic.pci.server.1.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm116480-4000/1/nic.shm.server.1.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:15:01", "gem5 executing on spyder12, pid 1830", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm116480-4000/1/gem5-out.server.1 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm116480-4000/0/gem5-cp.server.1 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm116480-4000/1/cfg.server.1.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm116480-4000/1/nic.pci.server.1. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm116480-4000/1/nic.shm.server.1. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2187444462200", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.033894] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.033894] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.033894] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.033894] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.041893] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.041893] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.159875] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.160875] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.160875] i40e 0000:00:02.0: MAC address: b8:d3:73:3d:80:65\r", "[ 1.160875] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.162874] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.247861] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.247861] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.247861] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.247861] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.343847] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 4000 up\r", "[ 1.351846] i40e 0000:00:02.0 eth0: changing MTU from 1500 to 4000\r", "[ 1.357845] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.2/24 dev eth0\r", "+ iperf -s -w 1M -Z dctcp\r", "------------------------------------------------------------\r", "Server listening on TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 5] local 192.168.64.2 port 5001 connected with 192.168.64.4 port 43664\r", "[ 2.394687] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 5] 0.0-10.0 sec 5.12 GBytes 4.40 Gbits/sec\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2187444452200. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2187444462200. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.client.0": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm116480-4000/1/gem5-out.client.0", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm116480-4000/0/gem5-cp.client.0", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm116480-4000/1/cfg.client.0.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm116480-4000/1/nic.pci.client.0.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm116480-4000/1/nic.shm.client.0.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:15:01", "gem5 executing on spyder12, pid 1835", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm116480-4000/1/gem5-out.client.0 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm116480-4000/0/gem5-cp.client.0 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm116480-4000/1/cfg.client.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm116480-4000/1/nic.pci.client.0. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm116480-4000/1/nic.shm.client.0. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2295604697000", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.063889] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.063889] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.063889] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.063889] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.070888] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.070888] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.188870] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.189870] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.190869] i40e 0000:00:02.0: MAC address: 28:f8:3e:5c:bd:71\r", "[ 1.190869] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.192869] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.271857] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.271857] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.271857] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.271857] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.367842] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 4000 up\r", "[ 1.375841] i40e 0000:00:02.0 eth0: changing MTU from 1500 to 4000\r", "[ 1.381841] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.3/24 dev eth0\r", "+ sleep 1\r", "+ iperf -w 1M -c 192.168.64.1 -Z dctcp -i 1\r", "------------------------------------------------------------\r", "Client connecting to 192.168.64.1, TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 4] local 192.168.64.3 port 58598 connected with 192.168.64.1 port 5001\r", "[ 2.526666] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 4] 0.0- 1.0 sec 545 MBytes 4.57 Gbits/sec\r", "[ 4] 1.0- 2.0 sec 534 MBytes 4.48 Gbits/sec\r", "[ 4] 2.0- 3.0 sec 492 MBytes 4.12 Gbits/sec\r", "[ 4] 3.0- 4.0 sec 549 MBytes 4.60 Gbits/sec\r", "[ 4] 4.0- 5.0 sec 516 MBytes 4.33 Gbits/sec\r", "[ 4] 5.0- 6.0 sec 531 MBytes 4.45 Gbits/sec\r", "[ 4] 6.0- 7.0 sec 534 MBytes 4.48 Gbits/sec\r", "[ 4] 7.0- 8.0 sec 553 MBytes 4.64 Gbits/sec\r", "[ 4] 8.0- 9.0 sec 534 MBytes 4.48 Gbits/sec\r", "[ 4] 9.0-10.0 sec 526 MBytes 4.42 Gbits/sec\r", "[ 4] 0.0-10.0 sec 5.19 GBytes 4.46 Gbits/sec\r", "+ sleep 20\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2295604687000. Starting simulation...", "info: Entering event queue @ 2295604697000. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2295604698000. Starting simulation...", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.client.1": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm116480-4000/1/gem5-out.client.1", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm116480-4000/0/gem5-cp.client.1", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm116480-4000/1/cfg.client.1.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm116480-4000/1/nic.pci.client.1.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm116480-4000/1/nic.shm.client.1.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:15:01", "gem5 executing on spyder12, pid 1838", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm116480-4000/1/gem5-out.client.1 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm116480-4000/0/gem5-cp.client.1 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm116480-4000/1/cfg.client.1.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm116480-4000/1/nic.pci.client.1. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm116480-4000/1/nic.shm.client.1. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2194713073600", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.039893] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.039893] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.039893] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.039893] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.046892] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.046892] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.165874] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.166873] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.166873] i40e 0000:00:02.0: MAC address: b8:00:50:f0:b0:6e\r", "[ 1.166873] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.168873] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.247861] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.247861] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.247861] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.247861] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.343847] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 4000 up\r", "[ 1.351845] i40e 0000:00:02.0 eth0: changing MTU from 1500 to 4000\r", "[ 1.357845] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.4/24 dev eth0\r", "+ sleep 1\r", "+ iperf -w 1M -c 192.168.64.2 -Z dctcp -i 1\r", "------------------------------------------------------------\r", "Client connecting to 192.168.64.2, TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 4] local 192.168.64.4 port 43664 connected with 192.168.64.2 port 5001\r", "[ 2.547664] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 4] 0.0- 1.0 sec 510 MBytes 4.28 Gbits/sec\r", "[ 4] 1.0- 2.0 sec 521 MBytes 4.37 Gbits/sec\r", "[ 4] 2.0- 3.0 sec 560 MBytes 4.70 Gbits/sec\r", "[ 4] 3.0- 4.0 sec 509 MBytes 4.27 Gbits/sec\r", "[ 4] 4.0- 5.0 sec 538 MBytes 4.51 Gbits/sec\r", "[ 4] 5.0- 6.0 sec 532 MBytes 4.46 Gbits/sec\r", "[ 4] 6.0- 7.0 sec 517 MBytes 4.34 Gbits/sec\r", "[ 4] 7.0- 8.0 sec 511 MBytes 4.28 Gbits/sec\r", "[ 4] 8.0- 9.0 sec 520 MBytes 4.36 Gbits/sec\r", "[ 4] 9.0-10.0 sec 526 MBytes 4.42 Gbits/sec\r", "[ 4] 0.0-10.0 sec 5.12 GBytes 4.40 Gbits/sec\r", "+ sleep 2\r", "+ m5 exit\r", "Exiting @ tick 15558384177600 because m5_exit instruction encountered"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2194713063600. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2194713073600. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}}, "success": true}
\ No newline at end of file
{"exp_name": "gt-ib-dumbbell-DCTCPm124800-1500", "start_time": 1607019296.1916099, "end_time": 1607065980.8918948, "sims": {"nic.server.0.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm124800-1500/1/nic.pci.server.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm124800-1500/1/nic.eth.server.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm124800-1500/1/nic.shm.server.0.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["3783975b1524", "sync_pci=1 sync_eth=1", "exit main_time: 15689797871000"]}, "nic.server.1.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm124800-1500/1/nic.pci.server.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm124800-1500/1/nic.eth.server.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm124800-1500/1/nic.shm.server.1.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["16703dae1f90", "sync_pci=1 sync_eth=1", "exit main_time: 15689797903000"]}, "nic.client.0.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm124800-1500/1/nic.pci.client.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm124800-1500/1/nic.eth.client.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm124800-1500/1/nic.shm.client.0.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["755d5afd29f8", "sync_pci=1 sync_eth=1", "exit main_time: 15689797876000"]}, "nic.client.1.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm124800-1500/1/nic.pci.client.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm124800-1500/1/nic.eth.client.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm124800-1500/1/nic.shm.client.1.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["544a07803460", "sync_pci=1 sync_eth=1", "exit main_time: 15689797123400"]}, "net.": {"class": "NS3DumbbellNet", "cmd": ["/home/hejingli/endhostsim-code/ns-3/cosim-run.sh", "cosim", "cosim-dumbbell-example", "--CosimPortLeft=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm124800-1500/1/nic.eth.server.0.", "--CosimPortLeft=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm124800-1500/1/nic.eth.server.1.", "--CosimPortRight=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm124800-1500/1/nic.eth.client.0.", "--CosimPortRight=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm124800-1500/1/nic.eth.client.1.", "--LinkRate=10Gb/s", "--LinkLatency=500ns", "--EcnTh=124800"], "stdout": [], "stderr": []}, "host.server.0": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm124800-1500/1/gem5-out.server.0", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm124800-1500/0/gem5-cp.server.0", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm124800-1500/1/cfg.server.0.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm124800-1500/1/nic.pci.server.0.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm124800-1500/1/nic.shm.server.0.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:57", "gem5 executing on spyder09, pid 24591", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm124800-1500/1/gem5-out.server.0 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm124800-1500/0/gem5-cp.server.0 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm124800-1500/1/cfg.server.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm124800-1500/1/nic.pci.server.0. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm124800-1500/1/nic.shm.server.0. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2328880059400", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.067888] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.067888] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.067888] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.067888] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.074887] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.074887] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.192869] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.193869] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.194869] i40e 0000:00:02.0: MAC address: 24:15:5b:97:83:37\r", "[ 1.194869] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.196869] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.279856] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.279856] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.279856] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.279856] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.375842] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 1500 up\r", "[ 1.388840] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.1/24 dev eth0\r", "+ iperf -s -w 1M -Z dctcp\r", "------------------------------------------------------------\r", "Server listening on TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 5] local 192.168.64.1 port 5001 connected with 192.168.64.3 port 51650\r", "[ 2.430681] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 5] 0.0-10.0 sec 4.17 GBytes 3.58 Gbits/sec\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2328880049400. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2328880059400. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.server.1": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm124800-1500/1/gem5-out.server.1", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm124800-1500/0/gem5-cp.server.1", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm124800-1500/1/cfg.server.1.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm124800-1500/1/nic.pci.server.1.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm124800-1500/1/nic.shm.server.1.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:57", "gem5 executing on spyder09, pid 24594", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm124800-1500/1/gem5-out.server.1 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm124800-1500/0/gem5-cp.server.1 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm124800-1500/1/cfg.server.1.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm124800-1500/1/nic.pci.server.1. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm124800-1500/1/nic.shm.server.1. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2275926906400", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.077888] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.077888] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.077888] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.077888] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.084887] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.085887] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.203869] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.204868] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.204868] i40e 0000:00:02.0: MAC address: 90:1f:ae:3d:70:16\r", "[ 1.204868] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.206868] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.287856] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.287856] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.287856] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.287856] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.383841] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 1500 up\r", "[ 1.397839] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.2/24 dev eth0\r", "+ iperf -s -w 1M -Z dctcp\r", "------------------------------------------------------------\r", "Server listening on TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 5] local 192.168.64.2 port 5001 connected with 192.168.64.4 port 55866\r", "[ 2.488673] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 5] 0.0-10.0 sec 4.17 GBytes 3.58 Gbits/sec\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2275926896400. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2275926906400. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.client.0": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm124800-1500/1/gem5-out.client.0", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm124800-1500/0/gem5-cp.client.0", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm124800-1500/1/cfg.client.0.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm124800-1500/1/nic.pci.client.0.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm124800-1500/1/nic.shm.client.0.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:57", "gem5 executing on spyder09, pid 24598", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm124800-1500/1/gem5-out.client.0 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm124800-1500/0/gem5-cp.client.0 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm124800-1500/1/cfg.client.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm124800-1500/1/nic.pci.client.0. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm124800-1500/1/nic.shm.client.0. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2336423309400", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.047890] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.047890] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.047890] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.047890] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.055889] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.055889] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.173871] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.174871] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.174871] i40e 0000:00:02.0: MAC address: f8:29:fd:5a:5d:75\r", "[ 1.174871] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.176871] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.255859] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.255859] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.255859] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.255859] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.351844] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 1500 up\r", "[ 1.365842] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.3/24 dev eth0\r", "+ sleep 1\r", "+ iperf -w 1M -c 192.168.64.1 -Z dctcp -i 1\r", "------------------------------------------------------------\r", "Client connecting to 192.168.64.1, TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 4] local 192.168.64.3 port 51650 connected with 192.168.64.1 port 5001\r", "[ 2.599654] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 4] 0.0- 1.0 sec 436 MBytes 3.65 Gbits/sec\r", "[ 4] 1.0- 2.0 sec 436 MBytes 3.66 Gbits/sec\r", "[ 4] 2.0- 3.0 sec 424 MBytes 3.55 Gbits/sec\r", "[ 4] 3.0- 4.0 sec 419 MBytes 3.51 Gbits/sec\r", "[ 4] 4.0- 5.0 sec 428 MBytes 3.59 Gbits/sec\r", "[ 4] 5.0- 6.0 sec 430 MBytes 3.61 Gbits/sec\r", "[ 4] 6.0- 7.0 sec 421 MBytes 3.53 Gbits/sec\r", "[ 4] 7.0- 8.0 sec 419 MBytes 3.51 Gbits/sec\r", "[ 4] 8.0- 9.0 sec 423 MBytes 3.55 Gbits/sec\r", "[ 4] 9.0-10.0 sec 438 MBytes 3.68 Gbits/sec\r", "[ 4] 0.0-10.0 sec 4.17 GBytes 3.58 Gbits/sec\r", "+ sleep 20\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2336423299400. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2336423309400. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.client.1": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm124800-1500/1/gem5-out.client.1", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm124800-1500/0/gem5-cp.client.1", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm124800-1500/1/cfg.client.1.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm124800-1500/1/nic.pci.client.1.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm124800-1500/1/nic.shm.client.1.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:57", "gem5 executing on spyder09, pid 24599", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm124800-1500/1/gem5-out.client.1 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm124800-1500/0/gem5-cp.client.1 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm124800-1500/1/cfg.client.1.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm124800-1500/1/nic.pci.client.1. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm124800-1500/1/nic.shm.client.1. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2325495285200", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.062889] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.062889] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.062889] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.062889] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.070888] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.070888] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.188870] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.189870] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.189870] i40e 0000:00:02.0: MAC address: 60:34:80:07:4a:54\r", "[ 1.189870] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.191870] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.271858] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.271858] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.271858] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.271858] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.367843] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 1500 up\r", "[ 1.381841] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.4/24 dev eth0\r", "+ sleep 1\r", "+ iperf -w 1M -c 192.168.64.2 -Z dctcp -i 1\r", "------------------------------------------------------------\r", "Client connecting to 192.168.64.2, TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 4] local 192.168.64.4 port 55866 connected with 192.168.64.2 port 5001\r", "[ 2.629651] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 4] 0.0- 1.0 sec 419 MBytes 3.52 Gbits/sec\r", "[ 4] 1.0- 2.0 sec 419 MBytes 3.52 Gbits/sec\r", "[ 4] 2.0- 3.0 sec 439 MBytes 3.68 Gbits/sec\r", "[ 4] 3.0- 4.0 sec 430 MBytes 3.60 Gbits/sec\r", "[ 4] 4.0- 5.0 sec 427 MBytes 3.58 Gbits/sec\r", "[ 4] 5.0- 6.0 sec 428 MBytes 3.59 Gbits/sec\r", "[ 4] 6.0- 7.0 sec 425 MBytes 3.56 Gbits/sec\r", "[ 4] 7.0- 8.0 sec 432 MBytes 3.62 Gbits/sec\r", "[ 4] 8.0- 9.0 sec 431 MBytes 3.61 Gbits/sec\r", "[ 4] 9.0-10.0 sec 422 MBytes 3.54 Gbits/sec\r", "[ 4] 0.0-10.0 sec 4.17 GBytes 3.58 Gbits/sec\r", "+ sleep 2\r", "+ m5 exit\r", "Exiting @ tick 15689796749400 because m5_exit instruction encountered"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2325495275200. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2325495285200. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}}, "success": true}
\ No newline at end of file
{"exp_name": "gt-ib-dumbbell-DCTCPm124800-4000", "start_time": 1607019298.723138, "end_time": 1607055677.62944, "sims": {"nic.server.0.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm124800-4000/1/nic.pci.server.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm124800-4000/1/nic.eth.server.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm124800-4000/1/nic.shm.server.0.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["382fa18cb9b4", "sync_pci=1 sync_eth=1", "exit main_time: 15775231371000"]}, "nic.server.1.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm124800-4000/1/nic.pci.server.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm124800-4000/1/nic.eth.server.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm124800-4000/1/nic.shm.server.1.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["33e3a840e358", "sync_pci=1 sync_eth=1", "exit main_time: 15775231362000"]}, "nic.client.0.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm124800-4000/1/nic.pci.client.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm124800-4000/1/nic.eth.client.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm124800-4000/1/nic.shm.client.0.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["12d03a73edc0", "sync_pci=1 sync_eth=1", "exit main_time: 15775231328000"]}, "nic.client.1.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm124800-4000/1/nic.pci.client.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm124800-4000/1/nic.eth.client.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm124800-4000/1/nic.shm.client.1.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["5e2748ca05ec", "sync_pci=1 sync_eth=1", "exit main_time: 15775230660400"]}, "net.": {"class": "NS3DumbbellNet", "cmd": ["/home/hejingli/endhostsim-code/ns-3/cosim-run.sh", "cosim", "cosim-dumbbell-example", "--CosimPortLeft=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm124800-4000/1/nic.eth.server.0.", "--CosimPortLeft=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm124800-4000/1/nic.eth.server.1.", "--CosimPortRight=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm124800-4000/1/nic.eth.client.0.", "--CosimPortRight=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm124800-4000/1/nic.eth.client.1.", "--LinkRate=10Gb/s", "--LinkLatency=500ns", "--EcnTh=124800"], "stdout": [], "stderr": []}, "host.server.0": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm124800-4000/1/gem5-out.server.0", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm124800-4000/0/gem5-cp.server.0", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm124800-4000/1/cfg.server.0.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm124800-4000/1/nic.pci.server.0.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm124800-4000/1/nic.shm.server.0.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:15:01", "gem5 executing on spyder12, pid 1823", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm124800-4000/1/gem5-out.server.0 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm124800-4000/0/gem5-cp.server.0 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm124800-4000/1/cfg.server.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm124800-4000/1/nic.pci.server.0. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm124800-4000/1/nic.shm.server.0. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2314586686600", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.071888] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.071888] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.071888] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.071888] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.078887] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.078887] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.197869] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.198869] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.198869] i40e 0000:00:02.0: MAC address: b4:b9:8c:a1:2f:38\r", "[ 1.198869] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.200869] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.279857] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.279857] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.279857] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.279857] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.375842] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 4000 up\r", "[ 1.383841] i40e 0000:00:02.0 eth0: changing MTU from 1500 to 4000\r", "[ 1.389840] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.1/24 dev eth0\r", "+ iperf -s -w 1M -Z dctcp\r", "------------------------------------------------------------\r", "Server listening on TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 5] local 192.168.64.1 port 5001 connected with 192.168.64.3 port 55412\r", "[ 2.490673] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 5] 0.0-10.0 sec 5.17 GBytes 4.43 Gbits/sec\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2314586676600. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2314586686600. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.server.1": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm124800-4000/1/gem5-out.server.1", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm124800-4000/0/gem5-cp.server.1", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm124800-4000/1/cfg.server.1.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm124800-4000/1/nic.pci.server.1.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm124800-4000/1/nic.shm.server.1.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:15:01", "gem5 executing on spyder12, pid 1829", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm124800-4000/1/gem5-out.server.1 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm124800-4000/0/gem5-cp.server.1 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm124800-4000/1/cfg.server.1.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm124800-4000/1/nic.pci.server.1. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm124800-4000/1/nic.shm.server.1. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2399638511200", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.091887] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.091887] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.091887] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.092887] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.099886] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.099886] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.217868] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.218868] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.218868] i40e 0000:00:02.0: MAC address: 58:e3:40:a8:e3:33\r", "[ 1.218868] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.221867] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.303855] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.303855] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.303855] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.303855] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.399840] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 4000 up\r", "[ 1.407839] i40e 0000:00:02.0 eth0: changing MTU from 1500 to 4000\r", "[ 1.413838] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.2/24 dev eth0\r", "+ iperf -s -w 1M -Z dctcp\r", "------------------------------------------------------------\r", "Server listening on TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 5] local 192.168.64.2 port 5001 connected with 192.168.64.4 port 58976\r", "[ 2.462679] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 5] 0.0-10.0 sec 5.23 GBytes 4.49 Gbits/sec\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2399638501200. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2399638511200. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.client.0": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm124800-4000/1/gem5-out.client.0", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm124800-4000/0/gem5-cp.client.0", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm124800-4000/1/cfg.client.0.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm124800-4000/1/nic.pci.client.0.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm124800-4000/1/nic.shm.client.0.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:15:01", "gem5 executing on spyder12, pid 1834", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm124800-4000/1/gem5-out.client.0 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm124800-4000/0/gem5-cp.client.0 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm124800-4000/1/cfg.client.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm124800-4000/1/nic.pci.client.0. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm124800-4000/1/nic.shm.client.0. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2376994037200", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.078888] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.078888] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.078888] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.079888] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.085887] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.086887] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.204869] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.205869] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.205869] i40e 0000:00:02.0: MAC address: c0:ed:73:3a:d0:12\r", "[ 1.205869] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.207868] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.287856] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.287856] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.287856] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.287856] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.383842] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 4000 up\r", "[ 1.390841] i40e 0000:00:02.0 eth0: changing MTU from 1500 to 4000\r", "[ 1.396840] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.3/24 dev eth0\r", "+ sleep 1\r", "+ iperf -w 1M -c 192.168.64.1 -Z dctcp -i 1\r", "------------------------------------------------------------\r", "Client connecting to 192.168.64.1, TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 4] local 192.168.64.3 port 55412 connected with 192.168.64.1 port 5001\r", "[ 2.568661] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 4] 0.0- 1.0 sec 551 MBytes 4.62 Gbits/sec\r", "[ 4] 1.0- 2.0 sec 534 MBytes 4.48 Gbits/sec\r", "[ 4] 2.0- 3.0 sec 519 MBytes 4.35 Gbits/sec\r", "[ 4] 3.0- 4.0 sec 504 MBytes 4.22 Gbits/sec\r", "[ 4] 4.0- 5.0 sec 531 MBytes 4.46 Gbits/sec\r", "[ 4] 5.0- 6.0 sec 480 MBytes 4.03 Gbits/sec\r", "[ 4] 6.0- 7.0 sec 555 MBytes 4.66 Gbits/sec\r", "[ 4] 7.0- 8.0 sec 576 MBytes 4.83 Gbits/sec\r", "[ 4] 8.0- 9.0 sec 526 MBytes 4.41 Gbits/sec\r", "[ 4] 9.0-10.0 sec 513 MBytes 4.31 Gbits/sec\r", "[ 4] 0.0-10.0 sec 5.17 GBytes 4.44 Gbits/sec\r", "+ sleep 20\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2376994027200. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2376994037200. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14", "warn: PowerState: More than one power state change request encountered within the same simulation tick"]}, "host.client.1": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm124800-4000/1/gem5-out.client.1", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm124800-4000/0/gem5-cp.client.1", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm124800-4000/1/cfg.client.1.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm124800-4000/1/nic.pci.client.1.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm124800-4000/1/nic.shm.client.1.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:15:01", "gem5 executing on spyder12, pid 1837", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm124800-4000/1/gem5-out.client.1 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm124800-4000/0/gem5-cp.client.1 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm124800-4000/1/cfg.client.1.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm124800-4000/1/nic.pci.client.1. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm124800-4000/1/nic.shm.client.1. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2411406903400", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.088886] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.088886] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.088886] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.088886] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.095885] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.095885] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.213867] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.214867] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.214867] i40e 0000:00:02.0: MAC address: ec:05:ca:48:27:5e\r", "[ 1.214867] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.216866] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.295854] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.295854] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.295854] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.295854] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.391840] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 4000 up\r", "[ 1.398839] i40e 0000:00:02.0 eth0: changing MTU from 1500 to 4000\r", "[ 1.404838] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.4/24 dev eth0\r", "+ sleep 1\r", "+ iperf -w 1M -c 192.168.64.2 -Z dctcp -i 1\r", "------------------------------------------------------------\r", "Client connecting to 192.168.64.2, TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 4] local 192.168.64.4 port 58976 connected with 192.168.64.2 port 5001\r", "[ 2.553663] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 4] 0.0- 1.0 sec 517 MBytes 4.34 Gbits/sec\r", "[ 4] 1.0- 2.0 sec 525 MBytes 4.40 Gbits/sec\r", "[ 4] 2.0- 3.0 sec 546 MBytes 4.58 Gbits/sec\r", "[ 4] 3.0- 4.0 sec 564 MBytes 4.73 Gbits/sec\r", "[ 4] 4.0- 5.0 sec 533 MBytes 4.47 Gbits/sec\r", "[ 4] 5.0- 6.0 sec 583 MBytes 4.89 Gbits/sec\r", "[ 4] 6.0- 7.0 sec 506 MBytes 4.24 Gbits/sec\r", "[ 4] 7.0- 8.0 sec 487 MBytes 4.09 Gbits/sec\r", "[ 4] 8.0- 9.0 sec 538 MBytes 4.51 Gbits/sec\r", "[ 4] 9.0-10.0 sec 552 MBytes 4.63 Gbits/sec\r", "[ 4] 0.0-10.0 sec 5.23 GBytes 4.49 Gbits/sec\r", "+ sleep 2\r", "+ m5 exit\r", "Exiting @ tick 15775230559600 because m5_exit instruction encountered"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2411406893400. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2411406903400. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}}, "success": true}
\ No newline at end of file
{"exp_name": "gt-ib-dumbbell-DCTCPm133120-1500", "start_time": 1607019296.1046324, "end_time": 1607058359.6980708, "sims": {"nic.server.0.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm133120-1500/1/nic.pci.server.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm133120-1500/1/nic.eth.server.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm133120-1500/1/nic.shm.server.0.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["53eccfec620", "sync_pci=1 sync_eth=1", "exit main_time: 15679992467969"]}, "nic.server.1.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm133120-1500/1/nic.pci.server.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm133120-1500/1/nic.eth.server.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm133120-1500/1/nic.shm.server.1.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["328f41f9e024", "sync_pci=1 sync_eth=1", "exit main_time: 15679992460000"]}, "nic.client.0.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm133120-1500/1/nic.pci.client.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm133120-1500/1/nic.eth.client.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm133120-1500/1/nic.shm.client.0.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["f215aaefc4", "sync_pci=1 sync_eth=1", "exit main_time: 15679992418000"]}, "nic.client.1.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm133120-1500/1/nic.pci.client.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm133120-1500/1/nic.eth.client.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm133120-1500/1/nic.shm.client.1.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["1db922900efc", "sync_pci=1 sync_eth=1", "exit main_time: 15679991589400"]}, "net.": {"class": "NS3DumbbellNet", "cmd": ["/home/hejingli/endhostsim-code/ns-3/cosim-run.sh", "cosim", "cosim-dumbbell-example", "--CosimPortLeft=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm133120-1500/1/nic.eth.server.0.", "--CosimPortLeft=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm133120-1500/1/nic.eth.server.1.", "--CosimPortRight=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm133120-1500/1/nic.eth.client.0.", "--CosimPortRight=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm133120-1500/1/nic.eth.client.1.", "--LinkRate=10Gb/s", "--LinkLatency=500ns", "--EcnTh=133120"], "stdout": [], "stderr": []}, "host.server.0": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm133120-1500/1/gem5-out.server.0", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm133120-1500/0/gem5-cp.server.0", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm133120-1500/1/cfg.server.0.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm133120-1500/1/nic.pci.server.0.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm133120-1500/1/nic.shm.server.0.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:57", "gem5 executing on spyder09, pid 24570", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm133120-1500/1/gem5-out.server.0 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm133120-1500/0/gem5-cp.server.0 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm133120-1500/1/cfg.server.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm133120-1500/1/nic.pci.server.0. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm133120-1500/1/nic.shm.server.0. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2511584385800", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.106884] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.107883] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.107883] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.107883] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.114882] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.114882] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.232864] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.233864] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.233864] i40e 0000:00:02.0: MAC address: 20:c6:fe:cc:3e:05\r", "[ 1.234864] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.236864] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.319851] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.319851] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.319851] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.319851] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.415837] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 1500 up\r", "[ 1.429835] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.1/24 dev eth0\r", "+ iperf -s -w 1M -Z dctcp\r", "------------------------------------------------------------\r", "Server listening on TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 5] local 192.168.64.1 port 5001 connected with 192.168.64.3 port 55430\r", "[ 2.188719] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 5] 0.0-10.0 sec 4.25 GBytes 3.65 Gbits/sec\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2511584375800. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2511584385800. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.server.1": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm133120-1500/1/gem5-out.server.1", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm133120-1500/0/gem5-cp.server.1", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm133120-1500/1/cfg.server.1.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm133120-1500/1/nic.pci.server.1.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm133120-1500/1/nic.shm.server.1.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:57", "gem5 executing on spyder09, pid 24577", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm133120-1500/1/gem5-out.server.1 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm133120-1500/0/gem5-cp.server.1 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm133120-1500/1/cfg.server.1.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm133120-1500/1/nic.pci.server.1. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm133120-1500/1/nic.shm.server.1. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2307849752200", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.062890] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.062890] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.063889] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.063889] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.070888] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.070888] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.188870] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.189870] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.189870] i40e 0000:00:02.0: MAC address: 24:e0:f9:41:8f:32\r", "[ 1.189870] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.191870] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.271858] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.271858] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.271858] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.271858] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.367843] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 1500 up\r", "[ 1.380841] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.2/24 dev eth0\r", "+ iperf -s -w 1M -Z dctcp\r", "------------------------------------------------------------\r", "Server listening on TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 5] local 192.168.64.2 port 5001 connected with 192.168.64.4 port 42988\r", "[ 2.433681] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 5] 0.0-10.0 sec 4.26 GBytes 3.66 Gbits/sec\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2307849742200. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2307849752200. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.client.0": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm133120-1500/1/gem5-out.client.0", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm133120-1500/0/gem5-cp.client.0", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm133120-1500/1/cfg.client.0.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm133120-1500/1/nic.pci.client.0.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm133120-1500/1/nic.shm.client.0.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:57", "gem5 executing on spyder09, pid 24580", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm133120-1500/1/gem5-out.client.0 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm133120-1500/0/gem5-cp.client.0 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm133120-1500/1/cfg.client.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm133120-1500/1/nic.pci.client.0. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm133120-1500/1/nic.shm.client.0. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2231580174200", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.038893] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.038893] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.039893] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.039893] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.046892] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.046892] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.164874] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.165873] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.165873] i40e 0000:00:02.0: MAC address: c4:ef:aa:15:f2:00\r", "[ 1.165873] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.168873] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.247861] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.247861] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.247861] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.247861] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.343846] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 1500 up\r", "[ 1.357844] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.3/24 dev eth0\r", "+ sleep 1\r", "+ iperf -w 1M -c 192.168.64.1 -Z dctcp -i 1\r", "------------------------------------------------------------\r", "Client connecting to 192.168.64.1, TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 4] local 192.168.64.3 port 55430 connected with 192.168.64.1 port 5001\r", "[ 2.639649] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 4] 0.0- 1.0 sec 431 MBytes 3.62 Gbits/sec\r", "[ 4] 1.0- 2.0 sec 435 MBytes 3.65 Gbits/sec\r", "[ 4] 2.0- 3.0 sec 433 MBytes 3.63 Gbits/sec\r", "[ 4] 3.0- 4.0 sec 440 MBytes 3.69 Gbits/sec\r", "[ 4] 4.0- 5.0 sec 435 MBytes 3.65 Gbits/sec\r", "[ 4] 5.0- 6.0 sec 440 MBytes 3.69 Gbits/sec\r", "[ 4] 6.0- 7.0 sec 443 MBytes 3.71 Gbits/sec\r", "[ 4] 7.0- 8.0 sec 438 MBytes 3.67 Gbits/sec\r", "[ 4] 8.0- 9.0 sec 436 MBytes 3.66 Gbits/sec\r", "[ 4] 9.0-10.0 sec 427 MBytes 3.59 Gbits/sec\r", "[ 4] 0.0-10.0 sec 4.25 GBytes 3.65 Gbits/sec\r", "+ sleep 20\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2231580164200. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2231580174200. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.client.1": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm133120-1500/1/gem5-out.client.1", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm133120-1500/0/gem5-cp.client.1", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm133120-1500/1/cfg.client.1.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm133120-1500/1/nic.pci.client.1.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm133120-1500/1/nic.shm.client.1.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:57", "gem5 executing on spyder09, pid 24584", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm133120-1500/1/gem5-out.client.1 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm133120-1500/0/gem5-cp.client.1 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm133120-1500/1/cfg.client.1.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm133120-1500/1/nic.pci.client.1. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm133120-1500/1/nic.shm.client.1. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2320017723600", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.069888] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.069888] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.069888] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.069888] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.077887] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.077887] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.195869] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.196869] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.196869] i40e 0000:00:02.0: MAC address: fc:0e:90:22:b9:1d\r", "[ 1.196869] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.199868] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.279856] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.279856] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.279856] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.279856] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.375842] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 1500 up\r", "[ 1.389840] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.4/24 dev eth0\r", "+ sleep 1\r", "+ iperf -w 1M -c 192.168.64.2 -Z dctcp -i 1\r", "------------------------------------------------------------\r", "Client connecting to 192.168.64.2, TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 4] local 192.168.64.4 port 42988 connected with 192.168.64.2 port 5001\r", "[ 2.635650] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 4] 0.0- 1.0 sec 431 MBytes 3.61 Gbits/sec\r", "[ 4] 1.0- 2.0 sec 432 MBytes 3.63 Gbits/sec\r", "[ 4] 2.0- 3.0 sec 439 MBytes 3.69 Gbits/sec\r", "[ 4] 3.0- 4.0 sec 438 MBytes 3.67 Gbits/sec\r", "[ 4] 4.0- 5.0 sec 434 MBytes 3.64 Gbits/sec\r", "[ 4] 5.0- 6.0 sec 439 MBytes 3.68 Gbits/sec\r", "[ 4] 6.0- 7.0 sec 435 MBytes 3.65 Gbits/sec\r", "[ 4] 7.0- 8.0 sec 436 MBytes 3.66 Gbits/sec\r", "[ 4] 8.0- 9.0 sec 440 MBytes 3.69 Gbits/sec\r", "[ 4] 9.0-10.0 sec 436 MBytes 3.65 Gbits/sec\r", "[ 4] 0.0-10.0 sec 4.26 GBytes 3.66 Gbits/sec\r", "+ sleep 2\r", "+ m5 exit\r", "Exiting @ tick 15679991562200 because m5_exit instruction encountered"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2320017713600. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2320017723600. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}}, "success": true}
\ No newline at end of file
{"exp_name": "gt-ib-dumbbell-DCTCPm133120-4000", "start_time": 1607019298.7307854, "end_time": 1607055721.100588, "sims": {"nic.server.0.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm133120-4000/1/nic.pci.server.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm133120-4000/1/nic.eth.server.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm133120-4000/1/nic.shm.server.0.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["69316a0c950", "sync_pci=1 sync_eth=1", "exit main_time: 15663610020000"]}, "nic.server.1.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm133120-4000/1/nic.pci.server.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm133120-4000/1/nic.eth.server.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm133120-4000/1/nic.shm.server.1.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["54f6ced5d8ec", "sync_pci=1 sync_eth=1", "exit main_time: 15663610009000"]}, "nic.client.0.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm133120-4000/1/nic.pci.client.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm133120-4000/1/nic.eth.client.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm133120-4000/1/nic.shm.client.0.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["6133ab27fd5c", "sync_pci=1 sync_eth=1", "exit main_time: 15663610034000"]}, "nic.client.1.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm133120-4000/1/nic.pci.client.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm133120-4000/1/nic.eth.client.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm133120-4000/1/nic.shm.client.1.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["3d140dc51054", "sync_pci=1 sync_eth=1", "exit main_time: 15663609320400"]}, "net.": {"class": "NS3DumbbellNet", "cmd": ["/home/hejingli/endhostsim-code/ns-3/cosim-run.sh", "cosim", "cosim-dumbbell-example", "--CosimPortLeft=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm133120-4000/1/nic.eth.server.0.", "--CosimPortLeft=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm133120-4000/1/nic.eth.server.1.", "--CosimPortRight=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm133120-4000/1/nic.eth.client.0.", "--CosimPortRight=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm133120-4000/1/nic.eth.client.1.", "--LinkRate=10Gb/s", "--LinkLatency=500ns", "--EcnTh=133120"], "stdout": [], "stderr": []}, "host.server.0": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm133120-4000/1/gem5-out.server.0", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm133120-4000/0/gem5-cp.server.0", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm133120-4000/1/cfg.server.0.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm133120-4000/1/nic.pci.server.0.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm133120-4000/1/nic.shm.server.0.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:15:01", "gem5 executing on spyder12, pid 1850", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm133120-4000/1/gem5-out.server.0 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm133120-4000/0/gem5-cp.server.0 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm133120-4000/1/cfg.server.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm133120-4000/1/nic.pci.server.0. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm133120-4000/1/nic.shm.server.0. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2314318455200", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.066890] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.066890] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.066890] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.066890] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.073889] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.074889] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.192871] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.193871] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.193871] i40e 0000:00:02.0: MAC address: 50:c9:a0:16:93:06\r", "[ 1.193871] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.195870] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.279858] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.279858] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.279858] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.279858] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.375843] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 4000 up\r", "[ 1.383842] i40e 0000:00:02.0 eth0: changing MTU from 1500 to 4000\r", "[ 1.389841] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.1/24 dev eth0\r", "+ iperf -s -w 1M -Z dctcp\r", "------------------------------------------------------------\r", "Server listening on TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 5] local 192.168.64.1 port 5001 connected with 192.168.64.3 port 53814\r", "[ 2.397688] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 5] 0.0-10.0 sec 5.32 GBytes 4.57 Gbits/sec\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2314318445200. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2314318455200. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.server.1": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm133120-4000/1/gem5-out.server.1", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm133120-4000/0/gem5-cp.server.1", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm133120-4000/1/cfg.server.1.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm133120-4000/1/nic.pci.server.1.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm133120-4000/1/nic.shm.server.1.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:15:01", "gem5 executing on spyder12, pid 1856", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm133120-4000/1/gem5-out.server.1 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm133120-4000/0/gem5-cp.server.1 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm133120-4000/1/cfg.server.1.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm133120-4000/1/nic.pci.server.1. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm133120-4000/1/nic.shm.server.1. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2242590166000", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.050893] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.050893] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.051892] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.051892] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.058891] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.058891] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.176873] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.177873] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.177873] i40e 0000:00:02.0: MAC address: ec:d8:d5:ce:f6:54\r", "[ 1.178873] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.180873] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.263860] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.263860] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.263860] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.263860] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.359846] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 4000 up\r", "[ 1.367844] i40e 0000:00:02.0 eth0: changing MTU from 1500 to 4000\r", "[ 1.373844] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.2/24 dev eth0\r", "+ iperf -s -w 1M -Z dctcp\r", "------------------------------------------------------------\r", "Server listening on TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 5] local 192.168.64.2 port 5001 connected with 192.168.64.4 port 47044\r", "[ 2.467677] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 5] 0.0-10.0 sec 5.11 GBytes 4.38 Gbits/sec\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2242590156000. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2242590166000. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.client.0": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm133120-4000/1/gem5-out.client.0", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm133120-4000/0/gem5-cp.client.0", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm133120-4000/1/cfg.client.0.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm133120-4000/1/nic.pci.client.0.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm133120-4000/1/nic.shm.client.0.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:15:01", "gem5 executing on spyder12, pid 1858", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm133120-4000/1/gem5-out.client.0 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm133120-4000/0/gem5-cp.client.0 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm133120-4000/1/cfg.client.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm133120-4000/1/nic.pci.client.0. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm133120-4000/1/nic.shm.client.0. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2287306559200", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.059890] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.059890] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.059890] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.059890] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.066889] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.066889] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.185871] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.185871] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.186871] i40e 0000:00:02.0: MAC address: 5c:fd:27:ab:33:61\r", "[ 1.186871] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.188870] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.271858] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.271858] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.271858] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.271858] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.367843] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 4000 up\r", "[ 1.375842] i40e 0000:00:02.0 eth0: changing MTU from 1500 to 4000\r", "[ 1.381841] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.3/24 dev eth0\r", "+ sleep 1\r", "+ iperf -w 1M -c 192.168.64.1 -Z dctcp -i 1\r", "------------------------------------------------------------\r", "Client connecting to 192.168.64.1, TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 4] local 192.168.64.3 port 53814 connected with 192.168.64.1 port 5001\r", "[ 2.550663] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 4] 0.0- 1.0 sec 502 MBytes 4.21 Gbits/sec\r", "[ 4] 1.0- 2.0 sec 568 MBytes 4.77 Gbits/sec\r", "[ 4] 2.0- 3.0 sec 578 MBytes 4.85 Gbits/sec\r", "[ 4] 3.0- 4.0 sec 568 MBytes 4.76 Gbits/sec\r", "[ 4] 4.0- 5.0 sec 584 MBytes 4.90 Gbits/sec\r", "[ 4] 5.0- 6.0 sec 512 MBytes 4.30 Gbits/sec\r", "[ 4] 6.0- 7.0 sec 528 MBytes 4.43 Gbits/sec\r", "[ 4] 7.0- 8.0 sec 558 MBytes 4.68 Gbits/sec\r", "[ 4] 8.0- 9.0 sec 518 MBytes 4.35 Gbits/sec\r", "[ 4] 9.0-10.0 sec 537 MBytes 4.50 Gbits/sec\r", "[ 4] 0.0-10.0 sec 5.32 GBytes 4.57 Gbits/sec\r", "+ sleep 20\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2287306549200. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2287306559200. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.client.1": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm133120-4000/1/gem5-out.client.1", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm133120-4000/0/gem5-cp.client.1", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm133120-4000/1/cfg.client.1.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm133120-4000/1/nic.pci.client.1.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm133120-4000/1/nic.shm.client.1.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:15:01", "gem5 executing on spyder12, pid 1860", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm133120-4000/1/gem5-out.client.1 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm133120-4000/0/gem5-cp.client.1 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm133120-4000/1/cfg.client.1.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm133120-4000/1/nic.pci.client.1. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm133120-4000/1/nic.shm.client.1. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2300539432000", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.056890] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.056890] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.056890] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.056890] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.064889] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.064889] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.182871] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.183871] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.183871] i40e 0000:00:02.0: MAC address: 54:10:c5:0d:14:3d\r", "[ 1.183871] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.185870] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.263859] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.263859] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.263859] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.263859] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.359844] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 4000 up\r", "[ 1.367843] i40e 0000:00:02.0 eth0: changing MTU from 1500 to 4000\r", "[ 1.373842] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.4/24 dev eth0\r", "+ sleep 1\r", "+ iperf -w 1M -c 192.168.64.2 -Z dctcp -i 1\r", "------------------------------------------------------------\r", "Client connecting to 192.168.64.2, TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 4] local 192.168.64.4 port 47044 connected with 192.168.64.2 port 5001\r", "[ 2.517668] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 4] 0.0- 1.0 sec 566 MBytes 4.75 Gbits/sec\r", "[ 4] 1.0- 2.0 sec 494 MBytes 4.15 Gbits/sec\r", "[ 4] 2.0- 3.0 sec 498 MBytes 4.17 Gbits/sec\r", "[ 4] 3.0- 4.0 sec 500 MBytes 4.20 Gbits/sec\r", "[ 4] 4.0- 5.0 sec 484 MBytes 4.06 Gbits/sec\r", "[ 4] 5.0- 6.0 sec 550 MBytes 4.62 Gbits/sec\r", "[ 4] 6.0- 7.0 sec 544 MBytes 4.57 Gbits/sec\r", "[ 4] 7.0- 8.0 sec 508 MBytes 4.27 Gbits/sec\r", "[ 4] 8.0- 9.0 sec 554 MBytes 4.65 Gbits/sec\r", "[ 4] 9.0-10.0 sec 530 MBytes 4.45 Gbits/sec\r", "[ 4] 0.0-10.0 sec 5.11 GBytes 4.39 Gbits/sec\r", "+ sleep 2\r", "+ m5 exit\r", "Exiting @ tick 15663609009400 because m5_exit instruction encountered"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2300539422000. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2300539432000. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14", "warn: PowerState: More than one power state change request encountered within the same simulation tick"]}}, "success": true}
\ No newline at end of file
{"exp_name": "gt-ib-dumbbell-DCTCPm141440-1500", "start_time": 1607019296.105964, "end_time": 1607058713.553826, "sims": {"nic.server.0.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm141440-1500/1/nic.pci.server.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm141440-1500/1/nic.eth.server.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm141440-1500/1/nic.shm.server.0.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["642b89cdd088", "sync_pci=1 sync_eth=1", "exit main_time: 15492895925000"]}, "nic.server.1.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm141440-1500/1/nic.pci.server.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm141440-1500/1/nic.eth.server.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm141440-1500/1/nic.shm.server.1.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["117c0cacea8c", "sync_pci=1 sync_eth=1", "exit main_time: 15492895912955"]}, "nic.client.0.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm141440-1500/1/nic.pci.client.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm141440-1500/1/nic.eth.client.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm141440-1500/1/nic.shm.client.0.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["3ecc0f8f0494", "sync_pci=1 sync_eth=1", "exit main_time: 15492895904000"]}, "nic.client.1.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm141440-1500/1/nic.pci.client.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm141440-1500/1/nic.eth.client.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm141440-1500/1/nic.shm.client.1.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["d2fc7fb1430", "sync_pci=1 sync_eth=1", "exit main_time: 15492894988400"]}, "net.": {"class": "NS3DumbbellNet", "cmd": ["/home/hejingli/endhostsim-code/ns-3/cosim-run.sh", "cosim", "cosim-dumbbell-example", "--CosimPortLeft=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm141440-1500/1/nic.eth.server.0.", "--CosimPortLeft=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm141440-1500/1/nic.eth.server.1.", "--CosimPortRight=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm141440-1500/1/nic.eth.client.0.", "--CosimPortRight=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm141440-1500/1/nic.eth.client.1.", "--LinkRate=10Gb/s", "--LinkLatency=500ns", "--EcnTh=141440"], "stdout": [], "stderr": []}, "host.server.0": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm141440-1500/1/gem5-out.server.0", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm141440-1500/0/gem5-cp.server.0", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm141440-1500/1/cfg.server.0.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm141440-1500/1/nic.pci.server.0.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm141440-1500/1/nic.shm.server.0.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:57", "gem5 executing on spyder09, pid 24575", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm141440-1500/1/gem5-out.server.0 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm141440-1500/0/gem5-cp.server.0 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm141440-1500/1/cfg.server.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm141440-1500/1/nic.pci.server.0. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm141440-1500/1/nic.shm.server.0. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2171219543800", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.031893] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.031893] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.032893] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.032893] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.039892] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.039892] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.157874] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.158874] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.158874] i40e 0000:00:02.0: MAC address: 88:d0:cd:89:2b:64\r", "[ 1.159873] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.161873] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.239861] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.239861] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.239861] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.239861] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.335847] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 1500 up\r", "[ 1.349845] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.1/24 dev eth0\r", "+ iperf -s -w 1M -Z dctcp\r", "------------------------------------------------------------\r", "Server listening on TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 5] local 192.168.64.1 port 5001 connected with 192.168.64.3 port 50060\r", "[ 2.525666] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 5] 0.0-10.0 sec 4.29 GBytes 3.69 Gbits/sec\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2171219533800. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2171219543800. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14", "warn: PowerState: More than one power state change request encountered within the same simulation tick", "warn: PowerState: More than one power state change request encountered within the same simulation tick"]}, "host.server.1": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm141440-1500/1/gem5-out.server.1", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm141440-1500/0/gem5-cp.server.1", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm141440-1500/1/cfg.server.1.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm141440-1500/1/nic.pci.server.1.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm141440-1500/1/nic.shm.server.1.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:57", "gem5 executing on spyder09, pid 24579", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm141440-1500/1/gem5-out.server.1 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm141440-1500/0/gem5-cp.server.1 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm141440-1500/1/cfg.server.1.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm141440-1500/1/nic.pci.server.1. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm141440-1500/1/nic.shm.server.1. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2339721951800", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.086887] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.086887] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.086887] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.086887] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.093886] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.093886] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.212868] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.213868] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.213868] i40e 0000:00:02.0: MAC address: 8c:ea:ac:0c:7c:11\r", "[ 1.213868] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.215868] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.295855] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.295855] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.295855] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.295855] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.391841] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 1500 up\r", "[ 1.405839] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.2/24 dev eth0\r", "+ iperf -s -w 1M -Z dctcp\r", "------------------------------------------------------------\r", "Server listening on TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 5] local 192.168.64.2 port 5001 connected with 192.168.64.4 port 33764\r", "[ 2.232713] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 5] 0.0-10.0 sec 4.35 GBytes 3.73 Gbits/sec\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2339721941800. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2339721951800. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.client.0": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm141440-1500/1/gem5-out.client.0", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm141440-1500/0/gem5-cp.client.0", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm141440-1500/1/cfg.client.0.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm141440-1500/1/nic.pci.client.0.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm141440-1500/1/nic.shm.client.0.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:57", "gem5 executing on spyder09, pid 24582", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm141440-1500/1/gem5-out.client.0 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm141440-1500/0/gem5-cp.client.0 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm141440-1500/1/cfg.client.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm141440-1500/1/nic.pci.client.0. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm141440-1500/1/nic.shm.client.0. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2300243183400", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.065889] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.065889] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.065889] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.065889] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.072888] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.072888] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.191870] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.192870] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.192870] i40e 0000:00:02.0: MAC address: 94:04:8f:0f:cc:3e\r", "[ 1.192870] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.194870] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.279857] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.279857] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.279857] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.279857] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.375842] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 1500 up\r", "[ 1.389840] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.3/24 dev eth0\r", "+ sleep 1\r", "+ iperf -w 1M -c 192.168.64.1 -Z dctcp -i 1\r", "------------------------------------------------------------\r", "Client connecting to 192.168.64.1, TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 4] local 192.168.64.3 port 50060 connected with 192.168.64.1 port 5001\r", "[ 2.648649] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 4] 0.0- 1.0 sec 440 MBytes 3.69 Gbits/sec\r", "[ 4] 1.0- 2.0 sec 437 MBytes 3.66 Gbits/sec\r", "[ 4] 2.0- 3.0 sec 437 MBytes 3.67 Gbits/sec\r", "[ 4] 3.0- 4.0 sec 442 MBytes 3.71 Gbits/sec\r", "[ 4] 4.0- 5.0 sec 438 MBytes 3.68 Gbits/sec\r", "[ 4] 5.0- 6.0 sec 437 MBytes 3.67 Gbits/sec\r", "[ 4] 6.0- 7.0 sec 438 MBytes 3.67 Gbits/sec\r", "[ 4] 7.0- 8.0 sec 442 MBytes 3.71 Gbits/sec\r", "[ 4] 8.0- 9.0 sec 440 MBytes 3.69 Gbits/sec\r", "[ 4] 9.0-10.0 sec 444 MBytes 3.73 Gbits/sec\r", "[ 4] 0.0-10.0 sec 4.29 GBytes 3.69 Gbits/sec\r", "+ sleep 20\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2300243173400. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2300243183400. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.client.1": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm141440-1500/1/gem5-out.client.1", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm141440-1500/0/gem5-cp.client.1", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm141440-1500/1/cfg.client.1.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm141440-1500/1/nic.pci.client.1.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm141440-1500/1/nic.shm.client.1.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:57", "gem5 executing on spyder09, pid 24587", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm141440-1500/1/gem5-out.client.1 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm141440-1500/0/gem5-cp.client.1 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm141440-1500/1/cfg.client.1.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm141440-1500/1/nic.pci.client.1. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm141440-1500/1/nic.shm.client.1. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2124980518200", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.031894] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.031894] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.031894] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.031894] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.038892] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.038892] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.157874] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.158874] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.158874] i40e 0000:00:02.0: MAC address: 30:14:fb:c7:2f:0d\r", "[ 1.158874] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.160874] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.239862] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.239862] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.239862] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.239862] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.335847] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 1500 up\r", "[ 1.349845] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.4/24 dev eth0\r", "+ sleep 1\r", "+ iperf -w 1M -c 192.168.64.2 -Z dctcp -i 1\r", "------------------------------------------------------------\r", "Client connecting to 192.168.64.2, TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 4] local 192.168.64.4 port 33764 connected with 192.168.64.2 port 5001\r", "[ 2.659646] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 4] 0.0- 1.0 sec 442 MBytes 3.71 Gbits/sec\r", "[ 4] 1.0- 2.0 sec 443 MBytes 3.72 Gbits/sec\r", "[ 4] 2.0- 3.0 sec 446 MBytes 3.74 Gbits/sec\r", "[ 4] 3.0- 4.0 sec 449 MBytes 3.77 Gbits/sec\r", "[ 4] 4.0- 5.0 sec 439 MBytes 3.68 Gbits/sec\r", "[ 4] 5.0- 6.0 sec 448 MBytes 3.76 Gbits/sec\r", "[ 4] 6.0- 7.0 sec 445 MBytes 3.73 Gbits/sec\r", "[ 4] 7.0- 8.0 sec 451 MBytes 3.78 Gbits/sec\r", "[ 4] 8.0- 9.0 sec 445 MBytes 3.74 Gbits/sec\r", "[ 4] 9.0-10.0 sec 442 MBytes 3.71 Gbits/sec\r", "[ 4] 0.0-10.0 sec 4.35 GBytes 3.73 Gbits/sec\r", "+ sleep 2\r", "+ m5 exit\r", "Exiting @ tick 15492894681400 because m5_exit instruction encountered"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2124980508200. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2124980518200. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}}, "success": true}
\ No newline at end of file
{"exp_name": "gt-ib-dumbbell-DCTCPm141440-4000", "start_time": 1607019298.7250967, "end_time": 1607055092.206456, "sims": {"nic.server.0.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm141440-4000/1/nic.pci.server.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm141440-4000/1/nic.eth.server.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm141440-4000/1/nic.shm.server.0.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["69ccd5bfaa14", "sync_pci=1 sync_eth=1", "exit main_time: 15736600944000"]}, "nic.server.1.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm141440-4000/1/nic.pci.server.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm141440-4000/1/nic.eth.server.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm141440-4000/1/nic.shm.server.1.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["446d53bede20", "sync_pci=1 sync_eth=1", "exit main_time: 15736600951000"]}, "nic.client.0.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm141440-4000/1/nic.pci.client.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm141440-4000/1/nic.eth.client.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm141440-4000/1/nic.shm.client.0.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["235980c9e88c", "sync_pci=1 sync_eth=1", "exit main_time: 15736600976000"]}, "nic.client.1.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm141440-4000/1/nic.pci.client.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm141440-4000/1/nic.eth.client.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm141440-4000/1/nic.shm.client.1.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["2c8abc3e1588", "sync_pci=1 sync_eth=1", "exit main_time: 15736600480400"]}, "net.": {"class": "NS3DumbbellNet", "cmd": ["/home/hejingli/endhostsim-code/ns-3/cosim-run.sh", "cosim", "cosim-dumbbell-example", "--CosimPortLeft=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm141440-4000/1/nic.eth.server.0.", "--CosimPortLeft=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm141440-4000/1/nic.eth.server.1.", "--CosimPortRight=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm141440-4000/1/nic.eth.client.0.", "--CosimPortRight=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm141440-4000/1/nic.eth.client.1.", "--LinkRate=10Gb/s", "--LinkLatency=500ns", "--EcnTh=141440"], "stdout": [], "stderr": []}, "host.server.0": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm141440-4000/1/gem5-out.server.0", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm141440-4000/0/gem5-cp.server.0", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm141440-4000/1/cfg.server.0.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm141440-4000/1/nic.pci.server.0.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm141440-4000/1/nic.shm.server.0.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:15:01", "gem5 executing on spyder12, pid 1849", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm141440-4000/1/gem5-out.server.0 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm141440-4000/0/gem5-cp.server.0 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm141440-4000/1/cfg.server.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm141440-4000/1/nic.pci.server.0. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm141440-4000/1/nic.shm.server.0. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2278888162200", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.071888] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.071888] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.071888] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.071888] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.078887] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.078887] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.197869] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.198869] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.198869] i40e 0000:00:02.0: MAC address: 14:aa:bf:d5:cc:69\r", "[ 1.198869] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.200869] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.279857] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.279857] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.279857] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.279857] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.375842] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 4000 up\r", "[ 1.383841] i40e 0000:00:02.0 eth0: changing MTU from 1500 to 4000\r", "[ 1.389840] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.1/24 dev eth0\r", "+ iperf -s -w 1M -Z dctcp\r", "------------------------------------------------------------\r", "Server listening on TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 5] local 192.168.64.1 port 5001 connected with 192.168.64.3 port 49326\r", "[ 2.437681] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 5] 0.0-10.0 sec 5.28 GBytes 4.53 Gbits/sec\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2278888152200. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2278888162200. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14", "warn: PowerState: More than one power state change request encountered within the same simulation tick"]}, "host.server.1": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm141440-4000/1/gem5-out.server.1", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm141440-4000/0/gem5-cp.server.1", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm141440-4000/1/cfg.server.1.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm141440-4000/1/nic.pci.server.1.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm141440-4000/1/nic.shm.server.1.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:15:01", "gem5 executing on spyder12, pid 1855", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm141440-4000/1/gem5-out.server.1 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm141440-4000/0/gem5-cp.server.1 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm141440-4000/1/cfg.server.1.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm141440-4000/1/nic.pci.server.1. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm141440-4000/1/nic.shm.server.1. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2323090753800", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.079888] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.079888] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.080888] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.080888] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.087887] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.087887] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.205869] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.206869] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.206869] i40e 0000:00:02.0: MAC address: 20:de:be:53:6d:44\r", "[ 1.206869] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.209868] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.287856] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.287856] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.287856] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.287856] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.383842] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 4000 up\r", "[ 1.391841] i40e 0000:00:02.0 eth0: changing MTU from 1500 to 4000\r", "[ 1.397840] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.2/24 dev eth0\r", "+ iperf -s -w 1M -Z dctcp\r", "------------------------------------------------------------\r", "Server listening on TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 5] local 192.168.64.2 port 5001 connected with 192.168.64.4 port 38546\r", "[ 2.488674] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 5] 0.0-10.0 sec 5.23 GBytes 4.49 Gbits/sec\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2323090743800. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2323090753800. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.client.0": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm141440-4000/1/gem5-out.client.0", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm141440-4000/0/gem5-cp.client.0", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm141440-4000/1/cfg.client.0.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm141440-4000/1/nic.pci.client.0.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm141440-4000/1/nic.shm.client.0.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:15:01", "gem5 executing on spyder12, pid 1857", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm141440-4000/1/gem5-out.client.0 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm141440-4000/0/gem5-cp.client.0 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm141440-4000/1/cfg.client.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm141440-4000/1/nic.pci.client.0. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm141440-4000/1/nic.shm.client.0. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2281249559200", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.071888] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.071888] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.071888] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.071888] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.079887] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.079887] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.197869] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.198869] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.198869] i40e 0000:00:02.0: MAC address: 8c:e8:c9:80:59:23\r", "[ 1.198869] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.200869] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.279857] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.279857] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.279857] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.279857] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.375842] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 4000 up\r", "[ 1.383841] i40e 0000:00:02.0 eth0: changing MTU from 1500 to 4000\r", "[ 1.389840] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.3/24 dev eth0\r", "+ sleep 1\r", "+ iperf -w 1M -c 192.168.64.1 -Z dctcp -i 1\r", "------------------------------------------------------------\r", "Client connecting to 192.168.64.1, TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 4] local 192.168.64.3 port 49326 connected with 192.168.64.1 port 5001\r", "[ 2.589658] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 4] 0.0- 1.0 sec 546 MBytes 4.58 Gbits/sec\r", "[ 4] 1.0- 2.0 sec 551 MBytes 4.62 Gbits/sec\r", "[ 4] 2.0- 3.0 sec 470 MBytes 3.94 Gbits/sec\r", "[ 4] 3.0- 4.0 sec 549 MBytes 4.60 Gbits/sec\r", "[ 4] 4.0- 5.0 sec 579 MBytes 4.86 Gbits/sec\r", "[ 4] 5.0- 6.0 sec 545 MBytes 4.57 Gbits/sec\r", "[ 4] 6.0- 7.0 sec 503 MBytes 4.22 Gbits/sec\r", "[ 4] 7.0- 8.0 sec 573 MBytes 4.81 Gbits/sec\r", "[ 4] 8.0- 9.0 sec 538 MBytes 4.51 Gbits/sec\r", "[ 4] 9.0-10.0 sec 548 MBytes 4.60 Gbits/sec\r", "[ 4] 0.0-10.0 sec 5.28 GBytes 4.53 Gbits/sec\r", "+ sleep 20\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2281249549200. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2281249559200. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.client.1": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm141440-4000/1/gem5-out.client.1", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm141440-4000/0/gem5-cp.client.1", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm141440-4000/1/cfg.client.1.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm141440-4000/1/nic.pci.client.1.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm141440-4000/1/nic.shm.client.1.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:15:01", "gem5 executing on spyder12, pid 1859", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm141440-4000/1/gem5-out.client.1 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm141440-4000/0/gem5-cp.client.1 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm141440-4000/1/cfg.client.1.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm141440-4000/1/nic.pci.client.1. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm141440-4000/1/nic.shm.client.1. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2370028513200", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.078888] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.078888] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.078888] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.078888] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.085887] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.085887] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.203869] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.204869] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.204869] i40e 0000:00:02.0: MAC address: 88:15:3e:bc:8a:2c\r", "[ 1.205869] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.207869] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.287856] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.287856] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.287856] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.287856] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.383842] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 4000 up\r", "[ 1.390841] i40e 0000:00:02.0 eth0: changing MTU from 1500 to 4000\r", "[ 1.396840] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.4/24 dev eth0\r", "+ sleep 1\r", "+ iperf -w 1M -c 192.168.64.2 -Z dctcp -i 1\r", "------------------------------------------------------------\r", "Client connecting to 192.168.64.2, TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 4] local 192.168.64.4 port 38546 connected with 192.168.64.2 port 5001\r", "[ 2.562663] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 4] 0.0- 1.0 sec 518 MBytes 4.34 Gbits/sec\r", "[ 4] 1.0- 2.0 sec 538 MBytes 4.51 Gbits/sec\r", "[ 4] 2.0- 3.0 sec 602 MBytes 5.05 Gbits/sec\r", "[ 4] 3.0- 4.0 sec 516 MBytes 4.33 Gbits/sec\r", "[ 4] 4.0- 5.0 sec 498 MBytes 4.18 Gbits/sec\r", "[ 4] 5.0- 6.0 sec 536 MBytes 4.49 Gbits/sec\r", "[ 4] 6.0- 7.0 sec 573 MBytes 4.81 Gbits/sec\r", "[ 4] 7.0- 8.0 sec 498 MBytes 4.17 Gbits/sec\r", "[ 4] 8.0- 9.0 sec 546 MBytes 4.58 Gbits/sec\r", "[ 4] 9.0-10.0 sec 532 MBytes 4.46 Gbits/sec\r", "[ 4] 0.0-10.0 sec 5.23 GBytes 4.49 Gbits/sec\r", "+ sleep 2\r", "+ m5 exit\r", "Exiting @ tick 15736600117000 because m5_exit instruction encountered"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2370028503200. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2370028513200. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}}, "success": true}
\ No newline at end of file
{"exp_name": "gt-ib-dumbbell-DCTCPm149760-1500", "start_time": 1607019296.1068802, "end_time": 1607059134.4962404, "sims": {"nic.server.0.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm149760-1500/1/nic.pci.server.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm149760-1500/1/nic.eth.server.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm149760-1500/1/nic.shm.server.0.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["53a210cad5bc", "sync_pci=1 sync_eth=1", "exit main_time: 15653844823000"]}, "nic.server.1.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm149760-1500/1/nic.pci.server.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm149760-1500/1/nic.eth.server.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm149760-1500/1/nic.shm.server.1.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["2205be67e558", "sync_pci=1 sync_eth=1", "exit main_time: 15653844774000"]}, "nic.client.0.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm149760-1500/1/nic.pci.client.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm149760-1500/1/nic.eth.client.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm149760-1500/1/nic.shm.client.0.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["4f55b986ff60", "sync_pci=1 sync_eth=1", "exit main_time: 15653844793000"]}, "nic.client.1.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm149760-1500/1/nic.pci.client.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm149760-1500/1/nic.eth.client.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm149760-1500/1/nic.shm.client.1.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["6c1c92ac1e9c", "sync_pci=1 sync_eth=1", "exit main_time: 15653843949400"]}, "net.": {"class": "NS3DumbbellNet", "cmd": ["/home/hejingli/endhostsim-code/ns-3/cosim-run.sh", "cosim", "cosim-dumbbell-example", "--CosimPortLeft=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm149760-1500/1/nic.eth.server.0.", "--CosimPortLeft=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm149760-1500/1/nic.eth.server.1.", "--CosimPortRight=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm149760-1500/1/nic.eth.client.0.", "--CosimPortRight=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm149760-1500/1/nic.eth.client.1.", "--LinkRate=10Gb/s", "--LinkLatency=500ns", "--EcnTh=149760"], "stdout": [], "stderr": []}, "host.server.0": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm149760-1500/1/gem5-out.server.0", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm149760-1500/0/gem5-cp.server.0", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm149760-1500/1/cfg.server.0.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm149760-1500/1/nic.pci.server.0.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm149760-1500/1/nic.shm.server.0.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:57", "gem5 executing on spyder09, pid 24596", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm149760-1500/1/gem5-out.server.0 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm149760-1500/0/gem5-cp.server.0 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm149760-1500/1/cfg.server.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm149760-1500/1/nic.pci.server.0. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm149760-1500/1/nic.shm.server.0. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2204819852200", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.038893] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.038893] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.039893] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.039893] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.046892] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.046892] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.164874] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.165874] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.165874] i40e 0000:00:02.0: MAC address: bc:d5:ca:10:a2:53\r", "[ 1.166874] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.168873] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.247861] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.247861] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.247861] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.247861] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.343847] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 1500 up\r", "[ 1.357845] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.1/24 dev eth0\r", "+ iperf -s -w 1M -Z dctcp\r", "------------------------------------------------------------\r", "Server listening on TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 5] local 192.168.64.1 port 5001 connected with 192.168.64.3 port 53696\r", "[ 2.502671] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 5] 0.0-10.0 sec 4.36 GBytes 3.74 Gbits/sec\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2204819842200. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2204819852200. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.server.1": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm149760-1500/1/gem5-out.server.1", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm149760-1500/0/gem5-cp.server.1", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm149760-1500/1/cfg.server.1.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm149760-1500/1/nic.pci.server.1.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm149760-1500/1/nic.shm.server.1.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:57", "gem5 executing on spyder09, pid 24600", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm149760-1500/1/gem5-out.server.1 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm149760-1500/0/gem5-cp.server.1 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm149760-1500/1/cfg.server.1.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm149760-1500/1/nic.pci.server.1. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm149760-1500/1/nic.shm.server.1. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2306543416800", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.070887] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.070887] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.071887] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.071887] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.078886] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.078886] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.196868] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.197868] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.197868] i40e 0000:00:02.0: MAC address: 58:e5:67:be:05:22\r", "[ 1.197868] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.200868] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.279856] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.279856] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.279856] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.279856] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.375841] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 1500 up\r", "[ 1.389839] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.2/24 dev eth0\r", "+ iperf -s -w 1M -Z dctcp\r", "------------------------------------------------------------\r", "Server listening on TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 5] local 192.168.64.2 port 5001 connected with 192.168.64.4 port 39776\r", "[ 2.413683] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 5] 0.0-10.0 sec 4.39 GBytes 3.76 Gbits/sec\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2306543406800. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2306543416800. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14", "warn: PowerState: More than one power state change request encountered within the same simulation tick"]}, "host.client.0": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm149760-1500/1/gem5-out.client.0", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm149760-1500/0/gem5-cp.client.0", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm149760-1500/1/cfg.client.0.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm149760-1500/1/nic.pci.client.0.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm149760-1500/1/nic.shm.client.0.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:57", "gem5 executing on spyder09, pid 24602", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm149760-1500/1/gem5-out.client.0 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm149760-1500/0/gem5-cp.client.0 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm149760-1500/1/cfg.client.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm149760-1500/1/nic.pci.client.0. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm149760-1500/1/nic.shm.client.0. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2307619313400", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.075887] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.075887] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.076887] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.076887] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.083886] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.083886] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.201868] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.202868] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.202868] i40e 0000:00:02.0: MAC address: 60:ff:86:b9:55:4f\r", "[ 1.202868] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.205868] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.287855] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.287855] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.287855] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.287855] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.383841] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 1500 up\r", "[ 1.396839] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.3/24 dev eth0\r", "+ sleep 1\r", "+ iperf -w 1M -c 192.168.64.1 -Z dctcp -i 1\r", "------------------------------------------------------------\r", "Client connecting to 192.168.64.1, TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 4] local 192.168.64.3 port 53696 connected with 192.168.64.1 port 5001\r", "[ 2.656647] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 4] 0.0- 1.0 sec 447 MBytes 3.75 Gbits/sec\r", "[ 4] 1.0- 2.0 sec 450 MBytes 3.77 Gbits/sec\r", "[ 4] 2.0- 3.0 sec 451 MBytes 3.78 Gbits/sec\r", "[ 4] 3.0- 4.0 sec 452 MBytes 3.79 Gbits/sec\r", "[ 4] 4.0- 5.0 sec 438 MBytes 3.67 Gbits/sec\r", "[ 4] 5.0- 6.0 sec 445 MBytes 3.73 Gbits/sec\r", "[ 4] 6.0- 7.0 sec 445 MBytes 3.74 Gbits/sec\r", "[ 4] 7.0- 8.0 sec 449 MBytes 3.77 Gbits/sec\r", "[ 4] 8.0- 9.0 sec 445 MBytes 3.73 Gbits/sec\r", "[ 4] 9.0-10.0 sec 445 MBytes 3.73 Gbits/sec\r", "[ 4] 0.0-10.0 sec 4.36 GBytes 3.75 Gbits/sec\r", "+ sleep 20\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2307619303400. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2307619313400. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.client.1": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm149760-1500/1/gem5-out.client.1", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm149760-1500/0/gem5-cp.client.1", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm149760-1500/1/cfg.client.1.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm149760-1500/1/nic.pci.client.1.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm149760-1500/1/nic.shm.client.1.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:57", "gem5 executing on spyder09, pid 24603", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm149760-1500/1/gem5-out.client.1 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm149760-1500/0/gem5-cp.client.1 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm149760-1500/1/cfg.client.1.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm149760-1500/1/nic.pci.client.1. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm149760-1500/1/nic.shm.client.1. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2285165968400", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.068889] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.068889] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.068889] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.068889] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.075888] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.075888] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.194870] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.195870] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.195870] i40e 0000:00:02.0: MAC address: 9c:1e:ac:92:1c:6c\r", "[ 1.195870] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.197869] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.279857] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.279857] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.279857] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.279857] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.375842] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 1500 up\r", "[ 1.389840] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.4/24 dev eth0\r", "+ sleep 1\r", "+ iperf -w 1M -c 192.168.64.2 -Z dctcp -i 1\r", "------------------------------------------------------------\r", "Client connecting to 192.168.64.2, TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 4] local 192.168.64.4 port 39776 connected with 192.168.64.2 port 5001\r", "[ 2.682644] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 4] 0.0- 1.0 sec 450 MBytes 3.78 Gbits/sec\r", "[ 4] 1.0- 2.0 sec 450 MBytes 3.78 Gbits/sec\r", "[ 4] 2.0- 3.0 sec 443 MBytes 3.72 Gbits/sec\r", "[ 4] 3.0- 4.0 sec 444 MBytes 3.72 Gbits/sec\r", "[ 4] 4.0- 5.0 sec 454 MBytes 3.81 Gbits/sec\r", "[ 4] 5.0- 6.0 sec 450 MBytes 3.77 Gbits/sec\r", "[ 4] 6.0- 7.0 sec 449 MBytes 3.77 Gbits/sec\r", "[ 4] 7.0- 8.0 sec 454 MBytes 3.81 Gbits/sec\r", "[ 4] 8.0- 9.0 sec 450 MBytes 3.77 Gbits/sec\r", "[ 4] 9.0-10.0 sec 448 MBytes 3.76 Gbits/sec\r", "[ 4] 0.0-10.0 sec 4.39 GBytes 3.77 Gbits/sec\r", "+ sleep 2\r", "+ m5 exit\r", "Exiting @ tick 15653843519400 because m5_exit instruction encountered"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2285165958400. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2285165968400. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}}, "success": true}
\ No newline at end of file
{"exp_name": "gt-ib-dumbbell-DCTCPm149760-4000", "start_time": 1607019298.7405307, "end_time": 1607061810.702421, "sims": {"nic.server.0.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm149760-4000/1/nic.pci.server.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm149760-4000/1/nic.eth.server.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm149760-4000/1/nic.shm.server.0.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["631b3976c730", "sync_pci=1 sync_eth=1", "exit main_time: 15667409169000"]}, "nic.server.1.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm149760-4000/1/nic.pci.server.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm149760-4000/1/nic.eth.server.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm149760-4000/1/nic.shm.server.1.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["7fe2428fe668", "sync_pci=1 sync_eth=1", "exit main_time: 15667409200000"]}, "nic.client.0.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm149760-4000/1/nic.pci.client.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm149760-4000/1/nic.eth.client.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm149760-4000/1/nic.shm.client.0.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["6b0c23731540", "sync_pci=1 sync_eth=1", "exit main_time: 15667409192000"]}, "nic.client.1.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm149760-4000/1/nic.pci.client.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm149760-4000/1/nic.eth.client.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm149760-4000/1/nic.shm.client.1.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["185c2c732f48", "sync_pci=1 sync_eth=1", "exit main_time: 15667408492400"]}, "net.": {"class": "NS3DumbbellNet", "cmd": ["/home/hejingli/endhostsim-code/ns-3/cosim-run.sh", "cosim", "cosim-dumbbell-example", "--CosimPortLeft=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm149760-4000/1/nic.eth.server.0.", "--CosimPortLeft=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm149760-4000/1/nic.eth.server.1.", "--CosimPortRight=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm149760-4000/1/nic.eth.client.0.", "--CosimPortRight=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm149760-4000/1/nic.eth.client.1.", "--LinkRate=10Gb/s", "--LinkLatency=500ns", "--EcnTh=149760"], "stdout": [], "stderr": []}, "host.server.0": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm149760-4000/1/gem5-out.server.0", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm149760-4000/0/gem5-cp.server.0", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm149760-4000/1/cfg.server.0.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm149760-4000/1/nic.pci.server.0.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm149760-4000/1/nic.shm.server.0.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:15:01", "gem5 executing on spyder13, pid 51543", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm149760-4000/1/gem5-out.server.0 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm149760-4000/0/gem5-cp.server.0 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm149760-4000/1/cfg.server.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm149760-4000/1/nic.pci.server.0. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm149760-4000/1/nic.shm.server.0. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2170719196600", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.051891] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.051891] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.051891] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.051891] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.059890] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.059890] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.177872] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.178872] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.178872] i40e 0000:00:02.0: MAC address: 30:c7:76:39:1b:63\r", "[ 1.178872] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.180872] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.263859] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.263859] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.263859] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.263859] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.359845] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 4000 up\r", "[ 1.367843] i40e 0000:00:02.0 eth0: changing MTU from 1500 to 4000\r", "[ 1.373843] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.1/24 dev eth0\r", "+ iperf -s -w 1M -Z dctcp\r", "------------------------------------------------------------\r", "Server listening on TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 5] local 192.168.64.1 port 5001 connected with 192.168.64.3 port 46258\r", "[ 2.562662] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 5] 0.0-10.0 sec 5.26 GBytes 4.52 Gbits/sec\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2170719186600. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2170719196600. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.server.1": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm149760-4000/1/gem5-out.server.1", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm149760-4000/0/gem5-cp.server.1", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm149760-4000/1/cfg.server.1.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm149760-4000/1/nic.pci.server.1.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm149760-4000/1/nic.shm.server.1.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:15:01", "gem5 executing on spyder13, pid 51552", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm149760-4000/1/gem5-out.server.1 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm149760-4000/0/gem5-cp.server.1 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm149760-4000/1/cfg.server.1.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm149760-4000/1/nic.pci.server.1. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm149760-4000/1/nic.shm.server.1. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2455876345000", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.041893] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.041893] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.041893] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.041893] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.048892] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.048892] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.166874] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.167874] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.167874] i40e 0000:00:02.0: MAC address: 68:e6:8f:42:e2:7f\r", "[ 1.168874] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.169874] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.247862] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.247862] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.247862] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.247862] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.343847] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 4000 up\r", "[ 1.350846] i40e 0000:00:02.0 eth0: changing MTU from 1500 to 4000\r", "[ 1.356846] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.2/24 dev eth0\r", "+ iperf -s -w 1M -Z dctcp\r", "------------------------------------------------------------\r", "Server listening on TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 5] local 192.168.64.2 port 5001 connected with 192.168.64.4 port 43784\r", "[ 2.253709] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 5] 0.0-10.0 sec 5.28 GBytes 4.54 Gbits/sec\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2455876335000. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2455876345000. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.client.0": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm149760-4000/1/gem5-out.client.0", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm149760-4000/0/gem5-cp.client.0", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm149760-4000/1/cfg.client.0.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm149760-4000/1/nic.pci.client.0.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm149760-4000/1/nic.shm.client.0.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:15:01", "gem5 executing on spyder13, pid 51558", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm149760-4000/1/gem5-out.client.0 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm149760-4000/0/gem5-cp.client.0 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm149760-4000/1/cfg.client.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm149760-4000/1/nic.pci.client.0. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm149760-4000/1/nic.shm.client.0. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2318025585400", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.066889] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.066889] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.066889] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.066889] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.073888] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.073888] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.191870] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.192870] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.193870] i40e 0000:00:02.0: MAC address: 40:15:73:23:0c:6b\r", "[ 1.193870] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.195870] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.279857] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.279857] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.279857] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.279857] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.375842] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 4000 up\r", "[ 1.383841] i40e 0000:00:02.0 eth0: changing MTU from 1500 to 4000\r", "[ 1.389840] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.3/24 dev eth0\r", "+ sleep 1\r", "+ iperf -w 1M -c 192.168.64.1 -Z dctcp -i 1\r", "------------------------------------------------------------\r", "Client connecting to 192.168.64.1, TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 4] local 192.168.64.3 port 46258 connected with 192.168.64.1 port 5001\r", "[ 2.561662] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 4] 0.0- 1.0 sec 555 MBytes 4.66 Gbits/sec\r", "[ 4] 1.0- 2.0 sec 582 MBytes 4.89 Gbits/sec\r", "[ 4] 2.0- 3.0 sec 550 MBytes 4.62 Gbits/sec\r", "[ 4] 3.0- 4.0 sec 556 MBytes 4.67 Gbits/sec\r", "[ 4] 4.0- 5.0 sec 566 MBytes 4.75 Gbits/sec\r", "[ 4] 5.0- 6.0 sec 546 MBytes 4.58 Gbits/sec\r", "[ 4] 6.0- 7.0 sec 526 MBytes 4.41 Gbits/sec\r", "[ 4] 7.0- 8.0 sec 496 MBytes 4.16 Gbits/sec\r", "[ 4] 8.0- 9.0 sec 468 MBytes 3.92 Gbits/sec\r", "[ 4] 9.0-10.0 sec 542 MBytes 4.55 Gbits/sec\r", "[ 4] 0.0-10.0 sec 5.26 GBytes 4.52 Gbits/sec\r", "+ sleep 20\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2318025575400. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2318025585400. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14", "warn: PowerState: More than one power state change request encountered within the same simulation tick"]}, "host.client.1": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm149760-4000/1/gem5-out.client.1", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm149760-4000/0/gem5-cp.client.1", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm149760-4000/1/cfg.client.1.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm149760-4000/1/nic.pci.client.1.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm149760-4000/1/nic.shm.client.1.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:15:01", "gem5 executing on spyder13, pid 51562", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm149760-4000/1/gem5-out.client.1 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm149760-4000/0/gem5-cp.client.1 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm149760-4000/1/cfg.client.1.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm149760-4000/1/nic.pci.client.1. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm149760-4000/1/nic.shm.client.1. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2304682408000", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.056890] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.056890] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.057890] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.057890] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.064889] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.064889] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.182871] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.183871] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.183871] i40e 0000:00:02.0: MAC address: 48:2f:73:2c:5c:18\r", "[ 1.184871] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.186870] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.263859] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.263859] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.263859] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.263859] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.359844] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 4000 up\r", "[ 1.367843] i40e 0000:00:02.0 eth0: changing MTU from 1500 to 4000\r", "[ 1.373842] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.4/24 dev eth0\r", "+ sleep 1\r", "+ iperf -w 1M -c 192.168.64.2 -Z dctcp -i 1\r", "------------------------------------------------------------\r", "Client connecting to 192.168.64.2, TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 4] local 192.168.64.4 port 43784 connected with 192.168.64.2 port 5001\r", "[ 2.549663] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 4] 0.0- 1.0 sec 521 MBytes 4.37 Gbits/sec\r", "[ 4] 1.0- 2.0 sec 498 MBytes 4.18 Gbits/sec\r", "[ 4] 2.0- 3.0 sec 523 MBytes 4.39 Gbits/sec\r", "[ 4] 3.0- 4.0 sec 528 MBytes 4.42 Gbits/sec\r", "[ 4] 4.0- 5.0 sec 518 MBytes 4.35 Gbits/sec\r", "[ 4] 5.0- 6.0 sec 534 MBytes 4.48 Gbits/sec\r", "[ 4] 6.0- 7.0 sec 554 MBytes 4.64 Gbits/sec\r", "[ 4] 7.0- 8.0 sec 586 MBytes 4.92 Gbits/sec\r", "[ 4] 8.0- 9.0 sec 610 MBytes 5.11 Gbits/sec\r", "[ 4] 9.0-10.0 sec 536 MBytes 4.50 Gbits/sec\r", "[ 4] 0.0-10.0 sec 5.28 GBytes 4.54 Gbits/sec\r", "+ sleep 2\r", "+ m5 exit\r", "Exiting @ tick 15667408228600 because m5_exit instruction encountered"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2304682398000. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2304682408000. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14", "warn: PowerState: More than one power state change request encountered within the same simulation tick"]}}, "success": true}
\ No newline at end of file
{"exp_name": "gt-ib-dumbbell-DCTCPm158080-1500", "start_time": 1607019296.1185377, "end_time": 1607058080.4548287, "sims": {"nic.server.0.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm158080-1500/1/nic.pci.server.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm158080-1500/1/nic.eth.server.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm158080-1500/1/nic.shm.server.0.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["5fdf42f9fa2c", "sync_pci=1 sync_eth=1", "exit main_time: 15576200177955"]}, "nic.server.1.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm158080-1500/1/nic.pci.server.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm158080-1500/1/nic.eth.server.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm158080-1500/1/nic.shm.server.1.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["7ca635651968", "sync_pci=1 sync_eth=1", "exit main_time: 15576200153000"]}, "nic.client.0.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm158080-1500/1/nic.pci.client.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm158080-1500/1/nic.eth.client.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm158080-1500/1/nic.shm.client.0.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["5b929fb623d0", "sync_pci=1 sync_eth=1", "exit main_time: 15576200095000"]}, "nic.client.1.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm158080-1500/1/nic.pci.client.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm158080-1500/1/nic.eth.client.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm158080-1500/1/nic.shm.client.1.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["4b0920512904", "sync_pci=1 sync_eth=1", "exit main_time: 15576199532400"]}, "net.": {"class": "NS3DumbbellNet", "cmd": ["/home/hejingli/endhostsim-code/ns-3/cosim-run.sh", "cosim", "cosim-dumbbell-example", "--CosimPortLeft=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm158080-1500/1/nic.eth.server.0.", "--CosimPortLeft=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm158080-1500/1/nic.eth.server.1.", "--CosimPortRight=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm158080-1500/1/nic.eth.client.0.", "--CosimPortRight=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm158080-1500/1/nic.eth.client.1.", "--LinkRate=10Gb/s", "--LinkLatency=500ns", "--EcnTh=158080"], "stdout": [], "stderr": []}, "host.server.0": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm158080-1500/1/gem5-out.server.0", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm158080-1500/0/gem5-cp.server.0", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm158080-1500/1/cfg.server.0.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm158080-1500/1/nic.pci.server.0.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm158080-1500/1/nic.shm.server.0.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:57", "gem5 executing on spyder09, pid 24573", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm158080-1500/1/gem5-out.server.0 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm158080-1500/0/gem5-cp.server.0 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm158080-1500/1/cfg.server.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm158080-1500/1/nic.pci.server.0. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm158080-1500/1/nic.shm.server.0. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2262413465200", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.062889] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.062889] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.062889] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.063889] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.070888] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.070888] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.188870] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.189870] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.189870] i40e 0000:00:02.0: MAC address: 2c:fa:f9:42:df:5f\r", "[ 1.189870] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.191870] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.271857] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.271857] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.271857] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.271857] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.367843] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 1500 up\r", "[ 1.381841] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.1/24 dev eth0\r", "+ iperf -s -w 1M -Z dctcp\r", "------------------------------------------------------------\r", "Server listening on TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 5] local 192.168.64.1 port 5001 connected with 192.168.64.3 port 40872\r", "[ 2.299701] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 5] 0.0-10.0 sec 4.36 GBytes 3.74 Gbits/sec\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2262413455200. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2262413465200. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14", "warn: PowerState: More than one power state change request encountered within the same simulation tick"]}, "host.server.1": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm158080-1500/1/gem5-out.server.1", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm158080-1500/0/gem5-cp.server.1", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm158080-1500/1/cfg.server.1.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm158080-1500/1/nic.pci.server.1.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm158080-1500/1/nic.shm.server.1.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:57", "gem5 executing on spyder09, pid 24578", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm158080-1500/1/gem5-out.server.1 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm158080-1500/0/gem5-cp.server.1 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm158080-1500/1/cfg.server.1.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm158080-1500/1/nic.pci.server.1. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm158080-1500/1/nic.shm.server.1. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2300733934200", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.075887] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.075887] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.076887] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.076887] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.083886] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.083886] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.201868] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.202867] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.202867] i40e 0000:00:02.0: MAC address: 68:19:65:35:a6:7c\r", "[ 1.202867] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.204867] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.287854] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.287854] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.287854] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.287854] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.383840] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 1500 up\r", "[ 1.397838] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.2/24 dev eth0\r", "+ iperf -s -w 1M -Z dctcp\r", "------------------------------------------------------------\r", "Server listening on TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 5] local 192.168.64.2 port 5001 connected with 192.168.64.4 port 46448\r", "[ 2.351693] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 5] 0.0-10.0 sec 4.39 GBytes 3.77 Gbits/sec\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2300733924200. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2300733934200. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.client.0": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm158080-1500/1/gem5-out.client.0", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm158080-1500/0/gem5-cp.client.0", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm158080-1500/1/cfg.client.0.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm158080-1500/1/nic.pci.client.0.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm158080-1500/1/nic.shm.client.0.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:57", "gem5 executing on spyder09, pid 24581", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm158080-1500/1/gem5-out.client.0 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm158080-1500/0/gem5-cp.client.0 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm158080-1500/1/cfg.client.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm158080-1500/1/nic.pci.client.0. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm158080-1500/1/nic.shm.client.0. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2139774110600", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.032893] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.032893] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.032893] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.032893] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.040892] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.040892] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.158874] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.159874] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.159874] i40e 0000:00:02.0: MAC address: d0:23:b6:9f:92:5b\r", "[ 1.159874] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.162873] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.239862] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.239862] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.239862] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.239862] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.335847] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 1500 up\r", "[ 1.349845] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.3/24 dev eth0\r", "+ sleep 1\r", "+ iperf -w 1M -c 192.168.64.1 -Z dctcp -i 1\r", "------------------------------------------------------------\r", "Client connecting to 192.168.64.1, TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 4] local 192.168.64.3 port 40872 connected with 192.168.64.1 port 5001\r", "[ 2.649647] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 4] 0.0- 1.0 sec 442 MBytes 3.71 Gbits/sec\r", "[ 4] 1.0- 2.0 sec 449 MBytes 3.77 Gbits/sec\r", "[ 4] 2.0- 3.0 sec 453 MBytes 3.80 Gbits/sec\r", "[ 4] 3.0- 4.0 sec 450 MBytes 3.77 Gbits/sec\r", "[ 4] 4.0- 5.0 sec 448 MBytes 3.75 Gbits/sec\r", "[ 4] 5.0- 6.0 sec 447 MBytes 3.75 Gbits/sec\r", "[ 4] 6.0- 7.0 sec 446 MBytes 3.74 Gbits/sec\r", "[ 4] 7.0- 8.0 sec 440 MBytes 3.69 Gbits/sec\r", "[ 4] 8.0- 9.0 sec 444 MBytes 3.72 Gbits/sec\r", "[ 4] 9.0-10.0 sec 445 MBytes 3.73 Gbits/sec\r", "[ 4] 0.0-10.0 sec 4.36 GBytes 3.74 Gbits/sec\r", "+ sleep 20\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2139774100600. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2139774110600. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.client.1": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm158080-1500/1/gem5-out.client.1", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm158080-1500/0/gem5-cp.client.1", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm158080-1500/1/cfg.client.1.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm158080-1500/1/nic.pci.client.1.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm158080-1500/1/nic.shm.client.1.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:57", "gem5 executing on spyder09, pid 24586", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm158080-1500/1/gem5-out.client.1 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm158080-1500/0/gem5-cp.client.1 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm158080-1500/1/cfg.client.1.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm158080-1500/1/nic.pci.client.1. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm158080-1500/1/nic.shm.client.1. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2208034938400", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.035892] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.035892] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.035892] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.035892] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.043891] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.043891] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.161873] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.162873] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.162873] i40e 0000:00:02.0: MAC address: 04:29:51:20:09:4b\r", "[ 1.162873] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.164873] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.247860] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.247860] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.247860] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.247860] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.343845] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 1500 up\r", "[ 1.357843] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.4/24 dev eth0\r", "+ sleep 1\r", "+ iperf -w 1M -c 192.168.64.2 -Z dctcp -i 1\r", "------------------------------------------------------------\r", "Client connecting to 192.168.64.2, TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 4] local 192.168.64.4 port 46448 connected with 192.168.64.2 port 5001\r", "[ 2.647647] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 4] 0.0- 1.0 sec 440 MBytes 3.69 Gbits/sec\r", "[ 4] 1.0- 2.0 sec 452 MBytes 3.79 Gbits/sec\r", "[ 4] 2.0- 3.0 sec 450 MBytes 3.77 Gbits/sec\r", "[ 4] 3.0- 4.0 sec 453 MBytes 3.80 Gbits/sec\r", "[ 4] 4.0- 5.0 sec 449 MBytes 3.77 Gbits/sec\r", "[ 4] 5.0- 6.0 sec 450 MBytes 3.77 Gbits/sec\r", "[ 4] 6.0- 7.0 sec 446 MBytes 3.75 Gbits/sec\r", "[ 4] 7.0- 8.0 sec 451 MBytes 3.78 Gbits/sec\r", "[ 4] 8.0- 9.0 sec 452 MBytes 3.79 Gbits/sec\r", "[ 4] 9.0-10.0 sec 454 MBytes 3.81 Gbits/sec\r", "[ 4] 0.0-10.0 sec 4.39 GBytes 3.77 Gbits/sec\r", "+ sleep 2\r", "+ m5 exit\r", "Exiting @ tick 15576199425200 because m5_exit instruction encountered"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2208034928400. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2208034938400. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}}, "success": true}
\ No newline at end of file
{"exp_name": "gt-ib-dumbbell-DCTCPm158080-4000", "start_time": 1607019298.7340028, "end_time": 1607055702.2011921, "sims": {"nic.server.0.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm158080-4000/1/nic.pci.server.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm158080-4000/1/nic.eth.server.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm158080-4000/1/nic.shm.server.0.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["35cb3e76ad28", "sync_pci=1 sync_eth=1", "exit main_time: 15780384071000"]}, "nic.server.1.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm158080-4000/1/nic.pci.server.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm158080-4000/1/nic.eth.server.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm158080-4000/1/nic.shm.server.1.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["14b82445b790", "sync_pci=1 sync_eth=1", "exit main_time: 15780384068000"]}, "nic.client.0.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm158080-4000/1/nic.pci.client.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm158080-4000/1/nic.eth.client.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm158080-4000/1/nic.shm.client.0.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["6f58df84eb9c", "sync_pci=1 sync_eth=1", "exit main_time: 15780384083000"]}, "nic.client.1.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm158080-4000/1/nic.pci.client.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm158080-4000/1/nic.eth.client.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm158080-4000/1/nic.shm.client.1.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["1ca8dca705a4", "sync_pci=1 sync_eth=1", "exit main_time: 15780383294400"]}, "net.": {"class": "NS3DumbbellNet", "cmd": ["/home/hejingli/endhostsim-code/ns-3/cosim-run.sh", "cosim", "cosim-dumbbell-example", "--CosimPortLeft=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm158080-4000/1/nic.eth.server.0.", "--CosimPortLeft=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm158080-4000/1/nic.eth.server.1.", "--CosimPortRight=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm158080-4000/1/nic.eth.client.0.", "--CosimPortRight=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm158080-4000/1/nic.eth.client.1.", "--LinkRate=10Gb/s", "--LinkLatency=500ns", "--EcnTh=158080"], "stdout": [], "stderr": []}, "host.server.0": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm158080-4000/1/gem5-out.server.0", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm158080-4000/0/gem5-cp.server.0", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm158080-4000/1/cfg.server.0.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm158080-4000/1/nic.pci.server.0.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm158080-4000/1/nic.shm.server.0.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:15:01", "gem5 executing on spyder13, pid 51529", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm158080-4000/1/gem5-out.server.0 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm158080-4000/0/gem5-cp.server.0 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm158080-4000/1/cfg.server.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm158080-4000/1/nic.pci.server.0. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm158080-4000/1/nic.shm.server.0. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2219739794000", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.040892] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.040892] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.041892] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.041892] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.048891] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.048891] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.166873] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.167873] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.167873] i40e 0000:00:02.0: MAC address: 28:ad:76:3e:cb:35\r", "[ 1.168873] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.170873] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.247861] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.247861] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.247861] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.247861] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.343846] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 4000 up\r", "[ 1.351845] i40e 0000:00:02.0 eth0: changing MTU from 1500 to 4000\r", "[ 1.357844] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.1/24 dev eth0\r", "+ iperf -s -w 1M -Z dctcp\r", "------------------------------------------------------------\r", "Server listening on TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 5] local 192.168.64.1 port 5001 connected with 192.168.64.3 port 43596\r", "[ 2.383688] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 5] 0.0-10.0 sec 5.17 GBytes 4.43 Gbits/sec\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2219739784000. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2219739794000. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.server.1": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm158080-4000/1/gem5-out.server.1", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm158080-4000/0/gem5-cp.server.1", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm158080-4000/1/cfg.server.1.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm158080-4000/1/nic.pci.server.1.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm158080-4000/1/nic.shm.server.1.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:15:01", "gem5 executing on spyder13, pid 51544", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm158080-4000/1/gem5-out.server.1 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm158080-4000/0/gem5-cp.server.1 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm158080-4000/1/cfg.server.1.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm158080-4000/1/nic.pci.server.1. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm158080-4000/1/nic.shm.server.1. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2408319168200", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.080889] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.080889] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.080889] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.080889] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.087888] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.087888] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.206870] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.206870] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.207869] i40e 0000:00:02.0: MAC address: 90:b7:45:24:b8:14\r", "[ 1.207869] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.209869] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.287857] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.287857] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.287857] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.287857] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.383843] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 4000 up\r", "[ 1.391841] i40e 0000:00:02.0 eth0: changing MTU from 1500 to 4000\r", "[ 1.397841] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.2/24 dev eth0\r", "+ iperf -s -w 1M -Z dctcp\r", "------------------------------------------------------------\r", "Server listening on TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 5] local 192.168.64.2 port 5001 connected with 192.168.64.4 port 46196\r", "[ 2.448681] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 5] 0.0-10.0 sec 5.43 GBytes 4.66 Gbits/sec\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2408319158200. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2408319168200. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.client.0": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm158080-4000/1/gem5-out.client.0", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm158080-4000/0/gem5-cp.client.0", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm158080-4000/1/cfg.client.0.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm158080-4000/1/nic.pci.client.0.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm158080-4000/1/nic.shm.client.0.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:15:01", "gem5 executing on spyder13, pid 51549", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm158080-4000/1/gem5-out.client.0 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm158080-4000/0/gem5-cp.client.0 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm158080-4000/1/cfg.client.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm158080-4000/1/nic.pci.client.0. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm158080-4000/1/nic.shm.client.0. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2197609456400", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.044892] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.045892] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.045892] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.045892] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.052891] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.052891] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.170873] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.171873] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.172873] i40e 0000:00:02.0: MAC address: 9c:eb:84:df:58:6f\r", "[ 1.172873] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.174873] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.255860] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.255860] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.255860] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.255860] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.351846] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 4000 up\r", "[ 1.359844] i40e 0000:00:02.0 eth0: changing MTU from 1500 to 4000\r", "[ 1.365844] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.3/24 dev eth0\r", "+ sleep 1\r", "+ iperf -w 1M -c 192.168.64.1 -Z dctcp -i 1\r", "------------------------------------------------------------\r", "Client connecting to 192.168.64.1, TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 4] local 192.168.64.3 port 43596 connected with 192.168.64.1 port 5001\r", "[ 2.603655] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 4] 0.0- 1.0 sec 566 MBytes 4.75 Gbits/sec\r", "[ 4] 1.0- 2.0 sec 559 MBytes 4.69 Gbits/sec\r", "[ 4] 2.0- 3.0 sec 496 MBytes 4.16 Gbits/sec\r", "[ 4] 3.0- 4.0 sec 520 MBytes 4.36 Gbits/sec\r", "[ 4] 4.0- 5.0 sec 564 MBytes 4.73 Gbits/sec\r", "[ 4] 5.0- 6.0 sec 544 MBytes 4.57 Gbits/sec\r", "[ 4] 6.0- 7.0 sec 561 MBytes 4.71 Gbits/sec\r", "[ 4] 7.0- 8.0 sec 472 MBytes 3.96 Gbits/sec\r", "[ 4] 8.0- 9.0 sec 484 MBytes 4.06 Gbits/sec\r", "[ 4] 9.0-10.0 sec 522 MBytes 4.38 Gbits/sec\r", "[ 4] 0.0-10.0 sec 5.17 GBytes 4.44 Gbits/sec\r", "+ sleep 20\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2197609446400. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2197609456400. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14", "warn: PowerState: More than one power state change request encountered within the same simulation tick"]}, "host.client.1": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm158080-4000/1/gem5-out.client.1", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm158080-4000/0/gem5-cp.client.1", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm158080-4000/1/cfg.client.1.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm158080-4000/1/nic.pci.client.1.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm158080-4000/1/nic.shm.client.1.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:15:01", "gem5 executing on spyder13, pid 51555", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm158080-4000/1/gem5-out.client.1 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm158080-4000/0/gem5-cp.client.1 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm158080-4000/1/cfg.client.1.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm158080-4000/1/nic.pci.client.1. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm158080-4000/1/nic.shm.client.1. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2415906571600", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.080888] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.080888] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.080888] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.080888] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.087887] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.087887] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.205869] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.206869] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.207869] i40e 0000:00:02.0: MAC address: a4:05:a7:dc:a8:1c\r", "[ 1.207869] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.209869] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.287857] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.287857] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.287857] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.287857] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.383842] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 4000 up\r", "[ 1.390841] i40e 0000:00:02.0 eth0: changing MTU from 1500 to 4000\r", "[ 1.396841] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.4/24 dev eth0\r", "+ sleep 1\r", "+ iperf -w 1M -c 192.168.64.2 -Z dctcp -i 1\r", "------------------------------------------------------------\r", "Client connecting to 192.168.64.2, TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 4] local 192.168.64.4 port 46196 connected with 192.168.64.2 port 5001\r", "[ 2.546666] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 4] 0.0- 1.0 sec 524 MBytes 4.39 Gbits/sec\r", "[ 4] 1.0- 2.0 sec 544 MBytes 4.56 Gbits/sec\r", "[ 4] 2.0- 3.0 sec 558 MBytes 4.69 Gbits/sec\r", "[ 4] 3.0- 4.0 sec 594 MBytes 4.98 Gbits/sec\r", "[ 4] 4.0- 5.0 sec 508 MBytes 4.26 Gbits/sec\r", "[ 4] 5.0- 6.0 sec 513 MBytes 4.31 Gbits/sec\r", "[ 4] 6.0- 7.0 sec 558 MBytes 4.68 Gbits/sec\r", "[ 4] 7.0- 8.0 sec 608 MBytes 5.10 Gbits/sec\r", "[ 4] 8.0- 9.0 sec 596 MBytes 5.00 Gbits/sec\r", "[ 4] 9.0-10.0 sec 555 MBytes 4.65 Gbits/sec\r", "[ 4] 0.0-10.0 sec 5.43 GBytes 4.66 Gbits/sec\r", "+ sleep 2\r", "+ m5 exit\r", "Exiting @ tick 15780383071400 because m5_exit instruction encountered"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2415906561600. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2415906571600. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14", "warn: PowerState: More than one power state change request encountered within the same simulation tick", "warn: PowerState: More than one power state change request encountered within the same simulation tick"]}}, "success": true}
\ No newline at end of file
{"exp_name": "gt-ib-dumbbell-DCTCPm16640-1500", "start_time": 1607019295.151171, "end_time": 1607055562.2918694, "sims": {"nic.server.0.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm16640-1500/1/nic.pci.server.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm16640-1500/1/nic.eth.server.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm16640-1500/1/nic.shm.server.0.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["2f3f6e0740a4", "sync_pci=1 sync_eth=1", "exit main_time: 15708806953000"]}, "nic.server.1.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm16640-1500/1/nic.pci.server.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm16640-1500/1/nic.eth.server.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm16640-1500/1/nic.shm.server.1.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["3fc89d3d3b70", "sync_pci=1 sync_eth=1", "exit main_time: 15708806997000"]}, "nic.client.0.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm16640-1500/1/nic.pci.client.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm16640-1500/1/nic.eth.client.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm16640-1500/1/nic.shm.client.0.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["2deecef3835c", "sync_pci=1 sync_eth=1", "exit main_time: 15708806941000"]}, "nic.client.1.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm16640-1500/1/nic.pci.client.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm16640-1500/1/nic.eth.client.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm16640-1500/1/nic.shm.client.1.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["3e78dd957e24", "sync_pci=1 sync_eth=1", "exit main_time: 15708806236400"]}, "net.": {"class": "NS3DumbbellNet", "cmd": ["/home/hejingli/endhostsim-code/ns-3/cosim-run.sh", "cosim", "cosim-dumbbell-example", "--CosimPortLeft=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm16640-1500/1/nic.eth.server.0.", "--CosimPortLeft=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm16640-1500/1/nic.eth.server.1.", "--CosimPortRight=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm16640-1500/1/nic.eth.client.0.", "--CosimPortRight=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm16640-1500/1/nic.eth.client.1.", "--LinkRate=10Gb/s", "--LinkLatency=500ns", "--EcnTh=16640"], "stdout": [], "stderr": []}, "host.server.0": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm16640-1500/1/gem5-out.server.0", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm16640-1500/0/gem5-cp.server.0", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm16640-1500/1/cfg.server.0.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm16640-1500/1/nic.pci.server.0.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm16640-1500/1/nic.shm.server.0.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:57", "gem5 executing on spyder07, pid 47009", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm16640-1500/1/gem5-out.server.0 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm16640-1500/0/gem5-cp.server.0 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm16640-1500/1/cfg.server.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm16640-1500/1/nic.pci.server.0. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm16640-1500/1/nic.shm.server.0. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2241285919600", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.046892] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.046892] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.046892] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.047892] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.054891] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.054891] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.172873] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.173872] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.173872] i40e 0000:00:02.0: MAC address: a4:40:07:6e:3f:2f\r", "[ 1.173872] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.176872] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.255860] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.255860] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.255860] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.255860] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.351845] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 1500 up\r", "[ 1.365843] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.1/24 dev eth0\r", "+ iperf -s -w 1M -Z dctcp\r", "------------------------------------------------------------\r", "Server listening on TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 5] local 192.168.64.1 port 5001 connected with 192.168.64.3 port 34354\r", "[ 2.506670] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 5] 0.0-10.0 sec 2.99 GBytes 2.57 Gbits/sec\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2241285909600. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2241285919600. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.server.1": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm16640-1500/1/gem5-out.server.1", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm16640-1500/0/gem5-cp.server.1", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm16640-1500/1/cfg.server.1.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm16640-1500/1/nic.pci.server.1.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm16640-1500/1/nic.shm.server.1.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:57", "gem5 executing on spyder07, pid 47019", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm16640-1500/1/gem5-out.server.1 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm16640-1500/0/gem5-cp.server.1 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm16640-1500/1/cfg.server.1.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm16640-1500/1/nic.pci.server.1. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm16640-1500/1/nic.shm.server.1. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2296603880200", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.096885] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.096885] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.096885] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.096885] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.103884] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.103884] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.222865] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.223865] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.223865] i40e 0000:00:02.0: MAC address: 70:3b:3d:9d:c8:3f\r", "[ 1.223865] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.225865] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.303853] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.303853] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.303853] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.303853] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.399839] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 1500 up\r", "[ 1.413837] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.2/24 dev eth0\r", "+ iperf -s -w 1M -Z dctcp\r", "------------------------------------------------------------\r", "Server listening on TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 5] local 192.168.64.2 port 5001 connected with 192.168.64.4 port 53542\r", "[ 2.506670] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 5] 0.0-10.0 sec 3.03 GBytes 2.60 Gbits/sec\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2296603870200. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2296603880200. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14", "warn: PowerState: More than one power state change request encountered within the same simulation tick"]}, "host.client.0": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm16640-1500/1/gem5-out.client.0", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm16640-1500/0/gem5-cp.client.0", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm16640-1500/1/cfg.client.0.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm16640-1500/1/nic.pci.client.0.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm16640-1500/1/nic.shm.client.0.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:57", "gem5 executing on spyder07, pid 47023", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm16640-1500/1/gem5-out.client.0 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm16640-1500/0/gem5-cp.client.0 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm16640-1500/1/cfg.client.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm16640-1500/1/nic.pci.client.0. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm16640-1500/1/nic.shm.client.0. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2336766905000", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.085887] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.085887] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.085887] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.085887] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.092886] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.092886] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.211868] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.211868] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.212868] i40e 0000:00:02.0: MAC address: 5c:83:f3:ce:ee:2d\r", "[ 1.212868] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.214867] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.295855] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.295855] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.295855] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.295855] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.391840] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 1500 up\r", "[ 1.405838] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.3/24 dev eth0\r", "+ sleep 1\r", "+ iperf -w 1M -c 192.168.64.1 -Z dctcp -i 1\r", "------------------------------------------------------------\r", "Client connecting to 192.168.64.1, TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 4] local 192.168.64.3 port 34354 connected with 192.168.64.1 port 5001\r", "[ 2.501672] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 4] 0.0- 1.0 sec 306 MBytes 2.57 Gbits/sec\r", "[ 4] 1.0- 2.0 sec 306 MBytes 2.57 Gbits/sec\r", "[ 4] 2.0- 3.0 sec 304 MBytes 2.55 Gbits/sec\r", "[ 4] 3.0- 4.0 sec 307 MBytes 2.57 Gbits/sec\r", "[ 4] 4.0- 5.0 sec 307 MBytes 2.57 Gbits/sec\r", "[ 4] 5.0- 6.0 sec 307 MBytes 2.57 Gbits/sec\r", "[ 4] 6.0- 7.0 sec 305 MBytes 2.56 Gbits/sec\r", "[ 4] 7.0- 8.0 sec 306 MBytes 2.57 Gbits/sec\r", "[ 4] 8.0- 9.0 sec 305 MBytes 2.56 Gbits/sec\r", "[ 4] 9.0-10.0 sec 307 MBytes 2.58 Gbits/sec\r", "[ 4] 0.0-10.0 sec 2.99 GBytes 2.57 Gbits/sec\r", "+ sleep 20\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2336766895000. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2336766905000. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14", "warn: PowerState: More than one power state change request encountered within the same simulation tick"]}, "host.client.1": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm16640-1500/1/gem5-out.client.1", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm16640-1500/0/gem5-cp.client.1", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm16640-1500/1/cfg.client.1.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm16640-1500/1/nic.pci.client.1.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm16640-1500/1/nic.shm.client.1.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:57", "gem5 executing on spyder07, pid 47027", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm16640-1500/1/gem5-out.client.1 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm16640-1500/0/gem5-cp.client.1 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm16640-1500/1/cfg.client.1.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm16640-1500/1/nic.pci.client.1. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm16640-1500/1/nic.shm.client.1. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2342629286800", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.094886] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.094886] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.094886] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.094886] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.101885] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.101885] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.220867] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.221867] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.221867] i40e 0000:00:02.0: MAC address: 24:7e:95:dd:78:3e\r", "[ 1.221867] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.223867] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.303854] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.303854] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.303854] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.303854] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.399840] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 1500 up\r", "[ 1.413838] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.4/24 dev eth0\r", "+ sleep 1\r", "+ iperf -w 1M -c 192.168.64.2 -Z dctcp -i 1\r", "------------------------------------------------------------\r", "Client connecting to 192.168.64.2, TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 4] local 192.168.64.4 port 53542 connected with 192.168.64.2 port 5001\r", "[ 2.515670] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 4] 0.0- 1.0 sec 309 MBytes 2.59 Gbits/sec\r", "[ 4] 1.0- 2.0 sec 310 MBytes 2.60 Gbits/sec\r", "[ 4] 2.0- 3.0 sec 312 MBytes 2.61 Gbits/sec\r", "[ 4] 3.0- 4.0 sec 309 MBytes 2.59 Gbits/sec\r", "[ 4] 4.0- 5.0 sec 308 MBytes 2.59 Gbits/sec\r", "[ 4] 5.0- 6.0 sec 310 MBytes 2.60 Gbits/sec\r", "[ 4] 6.0- 7.0 sec 312 MBytes 2.62 Gbits/sec\r", "[ 4] 7.0- 8.0 sec 310 MBytes 2.60 Gbits/sec\r", "[ 4] 8.0- 9.0 sec 308 MBytes 2.58 Gbits/sec\r", "[ 4] 9.0-10.0 sec 311 MBytes 2.61 Gbits/sec\r", "[ 4] 0.0-10.0 sec 3.03 GBytes 2.60 Gbits/sec\r", "+ sleep 2\r", "+ m5 exit\r", "Exiting @ tick 15708806114200 because m5_exit instruction encountered"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2342629276800. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2342629286800. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14", "warn: PowerState: More than one power state change request encountered within the same simulation tick"]}}, "success": true}
\ No newline at end of file
{"exp_name": "gt-ib-dumbbell-DCTCPm16640-4000", "start_time": 1607019296.2967496, "end_time": 1607055137.9777358, "sims": {"nic.server.0.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm16640-4000/1/nic.pci.server.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm16640-4000/1/nic.eth.server.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm16640-4000/1/nic.shm.server.0.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["1c76c33a5340", "sync_pci=1 sync_eth=1", "exit main_time: 15636888852000"]}, "nic.server.1.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm16640-4000/1/nic.pci.server.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm16640-4000/1/nic.eth.server.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm16640-4000/1/nic.shm.server.1.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["7b6395c95da8", "sync_pci=1 sync_eth=1", "exit main_time: 15636888918000"]}, "nic.client.0.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm16640-4000/1/nic.pci.client.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm16640-4000/1/nic.eth.client.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm16640-4000/1/nic.shm.client.0.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["49c741bd6d44", "sync_pci=1 sync_eth=1", "exit main_time: 15636888881000"]}, "nic.client.1.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm16640-4000/1/nic.pci.client.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm16640-4000/1/nic.eth.client.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm16640-4000/1/nic.shm.client.1.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["182af56e7ce4", "sync_pci=1 sync_eth=1", "exit main_time: 15636888138400"]}, "net.": {"class": "NS3DumbbellNet", "cmd": ["/home/hejingli/endhostsim-code/ns-3/cosim-run.sh", "cosim", "cosim-dumbbell-example", "--CosimPortLeft=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm16640-4000/1/nic.eth.server.0.", "--CosimPortLeft=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm16640-4000/1/nic.eth.server.1.", "--CosimPortRight=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm16640-4000/1/nic.eth.client.0.", "--CosimPortRight=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm16640-4000/1/nic.eth.client.1.", "--LinkRate=10Gb/s", "--LinkLatency=500ns", "--EcnTh=16640"], "stdout": [], "stderr": []}, "host.server.0": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm16640-4000/1/gem5-out.server.0", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm16640-4000/0/gem5-cp.server.0", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm16640-4000/1/cfg.server.0.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm16640-4000/1/nic.pci.server.0.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm16640-4000/1/nic.shm.server.0.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:58", "gem5 executing on spyder10, pid 56891", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm16640-4000/1/gem5-out.server.0 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm16640-4000/0/gem5-cp.server.0 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm16640-4000/1/cfg.server.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm16640-4000/1/nic.pci.server.0. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm16640-4000/1/nic.shm.server.0. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2277240653000", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.064889] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.065889] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.065889] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.065889] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.072888] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.072888] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.190870] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.191870] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.192869] i40e 0000:00:02.0: MAC address: 40:53:3a:c3:76:1c\r", "[ 1.192869] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.194869] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.279856] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.279856] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.279856] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.279856] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.375842] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 4000 up\r", "[ 1.383840] i40e 0000:00:02.0 eth0: changing MTU from 1500 to 4000\r", "[ 1.389840] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.1/24 dev eth0\r", "+ iperf -s -w 1M -Z dctcp\r", "------------------------------------------------------------\r", "Server listening on TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 5] local 192.168.64.1 port 5001 connected with 192.168.64.3 port 46690\r", "[ 2.461677] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 5] 0.0-10.0 sec 3.95 GBytes 3.39 Gbits/sec\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2277240643000. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2277240653000. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.server.1": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm16640-4000/1/gem5-out.server.1", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm16640-4000/0/gem5-cp.server.1", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm16640-4000/1/cfg.server.1.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm16640-4000/1/nic.pci.server.1.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm16640-4000/1/nic.shm.server.1.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:58", "gem5 executing on spyder10, pid 56897", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm16640-4000/1/gem5-out.server.1 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm16640-4000/0/gem5-cp.server.1 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm16640-4000/1/cfg.server.1.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm16640-4000/1/nic.pci.server.1. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm16640-4000/1/nic.shm.server.1. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2300607802000", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.092887] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.093887] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.093887] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.093887] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.100886] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.100886] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.218868] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.219867] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.220867] i40e 0000:00:02.0: MAC address: a8:5d:c9:95:63:7b\r", "[ 1.220867] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.222867] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.303855] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.303855] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.303855] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.303855] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.399840] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 4000 up\r", "[ 1.407839] i40e 0000:00:02.0 eth0: changing MTU from 1500 to 4000\r", "[ 1.413838] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.2/24 dev eth0\r", "+ iperf -s -w 1M -Z dctcp\r", "------------------------------------------------------------\r", "Server listening on TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 5] local 192.168.64.2 port 5001 connected with 192.168.64.4 port 35606\r", "[ 2.426684] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 5] 0.0-10.0 sec 3.96 GBytes 3.40 Gbits/sec\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2300607792000. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2300607802000. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.client.0": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm16640-4000/1/gem5-out.client.0", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm16640-4000/0/gem5-cp.client.0", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm16640-4000/1/cfg.client.0.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm16640-4000/1/nic.pci.client.0.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm16640-4000/1/nic.shm.client.0.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:58", "gem5 executing on spyder10, pid 56899", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm16640-4000/1/gem5-out.client.0 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm16640-4000/0/gem5-cp.client.0 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm16640-4000/1/cfg.client.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm16640-4000/1/nic.pci.client.0. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm16640-4000/1/nic.shm.client.0. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2309486327200", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.077889] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.077889] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.077889] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.077889] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.084888] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.085888] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.203870] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.204870] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.204870] i40e 0000:00:02.0: MAC address: 44:6d:bd:41:c7:49\r", "[ 1.204870] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.206869] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.287857] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.287857] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.287857] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.287857] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.383842] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 4000 up\r", "[ 1.391841] i40e 0000:00:02.0 eth0: changing MTU from 1500 to 4000\r", "[ 1.397841] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.3/24 dev eth0\r", "+ sleep 1\r", "+ iperf -w 1M -c 192.168.64.1 -Z dctcp -i 1\r", "------------------------------------------------------------\r", "Client connecting to 192.168.64.1, TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 4] local 192.168.64.3 port 46690 connected with 192.168.64.1 port 5001\r", "[ 2.484675] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 4] 0.0- 1.0 sec 405 MBytes 3.40 Gbits/sec\r", "[ 4] 1.0- 2.0 sec 405 MBytes 3.40 Gbits/sec\r", "[ 4] 2.0- 3.0 sec 404 MBytes 3.39 Gbits/sec\r", "[ 4] 3.0- 4.0 sec 407 MBytes 3.41 Gbits/sec\r", "[ 4] 4.0- 5.0 sec 403 MBytes 3.38 Gbits/sec\r", "[ 4] 5.0- 6.0 sec 405 MBytes 3.40 Gbits/sec\r", "[ 4] 6.0- 7.0 sec 405 MBytes 3.40 Gbits/sec\r", "[ 4] 7.0- 8.0 sec 407 MBytes 3.41 Gbits/sec\r", "[ 4] 8.0- 9.0 sec 402 MBytes 3.37 Gbits/sec\r", "[ 4] 9.0-10.0 sec 406 MBytes 3.40 Gbits/sec\r", "[ 4] 0.0-10.0 sec 3.95 GBytes 3.40 Gbits/sec\r", "+ sleep 20\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2309486317200. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2309486327200. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14", "warn: PowerState: More than one power state change request encountered within the same simulation tick", "warn: PowerState: More than one power state change request encountered within the same simulation tick", "warn: PowerState: More than one power state change request encountered within the same simulation tick", "warn: PowerState: More than one power state change request encountered within the same simulation tick", "warn: PowerState: More than one power state change request encountered within the same simulation tick"]}, "host.client.1": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm16640-4000/1/gem5-out.client.1", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm16640-4000/0/gem5-cp.client.1", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm16640-4000/1/cfg.client.1.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm16640-4000/1/nic.pci.client.1.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm16640-4000/1/nic.shm.client.1.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:58", "gem5 executing on spyder10, pid 56902", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm16640-4000/1/gem5-out.client.1 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm16640-4000/0/gem5-cp.client.1 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm16640-4000/1/cfg.client.1.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm16640-4000/1/nic.pci.client.1. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm16640-4000/1/nic.shm.client.1. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2269634208200", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.052891] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.052891] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.052891] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.052891] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.059890] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.059890] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.178872] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.179871] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.179871] i40e 0000:00:02.0: MAC address: e4:7c:6e:f5:2a:18\r", "[ 1.179871] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.181871] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.263859] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.263859] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.263859] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.263859] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.359844] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 4000 up\r", "[ 1.367843] i40e 0000:00:02.0 eth0: changing MTU from 1500 to 4000\r", "[ 1.373842] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.4/24 dev eth0\r", "+ sleep 1\r", "+ iperf -w 1M -c 192.168.64.2 -Z dctcp -i 1\r", "------------------------------------------------------------\r", "Client connecting to 192.168.64.2, TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 4] local 192.168.64.4 port 35606 connected with 192.168.64.2 port 5001\r", "[ 2.467676] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 4] 0.0- 1.0 sec 408 MBytes 3.42 Gbits/sec\r", "[ 4] 1.0- 2.0 sec 406 MBytes 3.41 Gbits/sec\r", "[ 4] 2.0- 3.0 sec 403 MBytes 3.38 Gbits/sec\r", "[ 4] 3.0- 4.0 sec 406 MBytes 3.40 Gbits/sec\r", "[ 4] 4.0- 5.0 sec 405 MBytes 3.40 Gbits/sec\r", "[ 4] 5.0- 6.0 sec 403 MBytes 3.38 Gbits/sec\r", "[ 4] 6.0- 7.0 sec 407 MBytes 3.41 Gbits/sec\r", "[ 4] 7.0- 8.0 sec 401 MBytes 3.37 Gbits/sec\r", "[ 4] 8.0- 9.0 sec 407 MBytes 3.41 Gbits/sec\r", "[ 4] 9.0-10.0 sec 406 MBytes 3.41 Gbits/sec\r", "[ 4] 0.0-10.0 sec 3.96 GBytes 3.40 Gbits/sec\r", "+ sleep 2\r", "+ m5 exit\r", "Exiting @ tick 15636887781400 because m5_exit instruction encountered"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2269634198200. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2269634208200. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14", "warn: PowerState: More than one power state change request encountered within the same simulation tick", "warn: PowerState: More than one power state change request encountered within the same simulation tick", "warn: PowerState: More than one power state change request encountered within the same simulation tick", "warn: PowerState: More than one power state change request encountered within the same simulation tick"]}}, "success": true}
\ No newline at end of file
{"exp_name": "gt-ib-dumbbell-DCTCPm166400-1500", "start_time": 1607019296.190642, "end_time": 1607058404.3914204, "sims": {"nic.server.0.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm166400-1500/1/nic.pci.server.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm166400-1500/1/nic.eth.server.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm166400-1500/1/nic.shm.server.0.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["480d59fd0ff0", "sync_pci=1 sync_eth=1", "exit main_time: 15558332081000"]}, "nic.server.1.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm166400-1500/1/nic.pci.server.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm166400-1500/1/nic.eth.server.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm166400-1500/1/nic.shm.server.1.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["26f98aa01a58", "sync_pci=1 sync_eth=1", "exit main_time: 15558332022954"]}, "nic.client.0.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm166400-1500/1/nic.pci.client.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm166400-1500/1/nic.eth.client.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm166400-1500/1/nic.shm.client.0.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["5e6cf9724c4", "sync_pci=1 sync_eth=1", "exit main_time: 15558332036000"]}, "nic.client.1.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm166400-1500/1/nic.pci.client.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm166400-1500/1/nic.eth.client.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm166400-1500/1/nic.shm.client.1.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["64d3919a2f2c", "sync_pci=1 sync_eth=1", "exit main_time: 15558331292400"]}, "net.": {"class": "NS3DumbbellNet", "cmd": ["/home/hejingli/endhostsim-code/ns-3/cosim-run.sh", "cosim", "cosim-dumbbell-example", "--CosimPortLeft=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm166400-1500/1/nic.eth.server.0.", "--CosimPortLeft=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm166400-1500/1/nic.eth.server.1.", "--CosimPortRight=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm166400-1500/1/nic.eth.client.0.", "--CosimPortRight=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm166400-1500/1/nic.eth.client.1.", "--LinkRate=10Gb/s", "--LinkLatency=500ns", "--EcnTh=166400"], "stdout": [], "stderr": []}, "host.server.0": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm166400-1500/1/gem5-out.server.0", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm166400-1500/0/gem5-cp.server.0", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm166400-1500/1/cfg.server.0.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm166400-1500/1/nic.pci.server.0.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm166400-1500/1/nic.shm.server.0.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:57", "gem5 executing on spyder09, pid 24606", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm166400-1500/1/gem5-out.server.0 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm166400-1500/0/gem5-cp.server.0 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm166400-1500/1/cfg.server.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm166400-1500/1/nic.pci.server.0. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm166400-1500/1/nic.shm.server.0. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2276811298200", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.066888] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.066888] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.066888] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.066888] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.073887] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.074887] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.192869] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.193869] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.193869] i40e 0000:00:02.0: MAC address: f0:0f:fd:59:0d:48\r", "[ 1.193869] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.195869] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.279856] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.279856] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.279856] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.279856] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.375841] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 1500 up\r", "[ 1.389839] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.1/24 dev eth0\r", "+ iperf -s -w 1M -Z dctcp\r", "------------------------------------------------------------\r", "Server listening on TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 5] local 192.168.64.1 port 5001 connected with 192.168.64.3 port 59746\r", "[ 2.361692] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 5] 0.0-10.0 sec 4.45 GBytes 3.82 Gbits/sec\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2276811288200. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2276811298200. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.server.1": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm166400-1500/1/gem5-out.server.1", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm166400-1500/0/gem5-cp.server.1", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm166400-1500/1/cfg.server.1.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm166400-1500/1/nic.pci.server.1.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm166400-1500/1/nic.shm.server.1.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:57", "gem5 executing on spyder09, pid 24607", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm166400-1500/1/gem5-out.server.1 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm166400-1500/0/gem5-cp.server.1 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm166400-1500/1/cfg.server.1.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm166400-1500/1/nic.pci.server.1. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm166400-1500/1/nic.shm.server.1. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2171446963600", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.040891] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.040891] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.040891] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.040891] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.048890] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.048890] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.166872] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.167872] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.167872] i40e 0000:00:02.0: MAC address: 58:1a:a0:8a:f9:26\r", "[ 1.167872] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.170872] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.247860] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.247860] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.247860] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.247860] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.343845] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 1500 up\r", "[ 1.357843] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.2/24 dev eth0\r", "+ iperf -s -w 1M -Z dctcp\r", "------------------------------------------------------------\r", "Server listening on TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 5] local 192.168.64.2 port 5001 connected with 192.168.64.4 port 50808\r", "[ 2.423681] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 5] 0.0-10.0 sec 4.45 GBytes 3.82 Gbits/sec\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2171446953600. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2171446963600. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.client.0": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm166400-1500/1/gem5-out.client.0", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm166400-1500/0/gem5-cp.client.0", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm166400-1500/1/cfg.client.0.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm166400-1500/1/nic.pci.client.0.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm166400-1500/1/nic.shm.client.0.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:57", "gem5 executing on spyder09, pid 24608", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm166400-1500/1/gem5-out.client.0 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm166400-1500/0/gem5-cp.client.0 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm166400-1500/1/cfg.client.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm166400-1500/1/nic.pci.client.0. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm166400-1500/1/nic.shm.client.0. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2205307707200", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.033892] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.033892] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.033892] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.033892] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.040891] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.040891] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.159873] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.160873] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.160873] i40e 0000:00:02.0: MAC address: c4:24:97:cf:e6:05\r", "[ 1.160873] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.162873] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.247860] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.247860] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.247860] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.247860] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.343845] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 1500 up\r", "[ 1.357843] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.3/24 dev eth0\r", "+ sleep 1\r", "+ iperf -w 1M -c 192.168.64.1 -Z dctcp -i 1\r", "------------------------------------------------------------\r", "Client connecting to 192.168.64.1, TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 4] local 192.168.64.3 port 59746 connected with 192.168.64.1 port 5001\r", "[ 2.632649] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 4] 0.0- 1.0 sec 451 MBytes 3.79 Gbits/sec\r", "[ 4] 1.0- 2.0 sec 456 MBytes 3.83 Gbits/sec\r", "[ 4] 2.0- 3.0 sec 457 MBytes 3.83 Gbits/sec\r", "[ 4] 3.0- 4.0 sec 457 MBytes 3.84 Gbits/sec\r", "[ 4] 4.0- 5.0 sec 456 MBytes 3.83 Gbits/sec\r", "[ 4] 5.0- 6.0 sec 452 MBytes 3.80 Gbits/sec\r", "[ 4] 6.0- 7.0 sec 459 MBytes 3.85 Gbits/sec\r", "[ 4] 7.0- 8.0 sec 455 MBytes 3.81 Gbits/sec\r", "[ 4] 8.0- 9.0 sec 457 MBytes 3.83 Gbits/sec\r", "[ 4] 9.0-10.0 sec 457 MBytes 3.83 Gbits/sec\r", "[ 4] 0.0-10.0 sec 4.45 GBytes 3.82 Gbits/sec\r", "+ sleep 20\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2205307697200. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2205307707200. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.client.1": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm166400-1500/1/gem5-out.client.1", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm166400-1500/0/gem5-cp.client.1", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm166400-1500/1/cfg.client.1.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm166400-1500/1/nic.pci.client.1.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm166400-1500/1/nic.shm.client.1.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:57", "gem5 executing on spyder09, pid 24610", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm166400-1500/1/gem5-out.client.1 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm166400-1500/0/gem5-cp.client.1 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm166400-1500/1/cfg.client.1.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm166400-1500/1/nic.pci.client.1. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm166400-1500/1/nic.shm.client.1. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2192332030800", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.053890] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.053890] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.053890] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.053890] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.061889] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.061889] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.179871] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.180871] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.180871] i40e 0000:00:02.0: MAC address: 2c:2f:9a:91:d3:64\r", "[ 1.180871] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.183871] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.263858] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.263858] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.263858] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.263858] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.359844] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 1500 up\r", "[ 1.373842] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.4/24 dev eth0\r", "+ sleep 1\r", "+ iperf -w 1M -c 192.168.64.2 -Z dctcp -i 1\r", "------------------------------------------------------------\r", "Client connecting to 192.168.64.2, TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 4] local 192.168.64.4 port 50808 connected with 192.168.64.2 port 5001\r", "[ 2.661646] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 4] 0.0- 1.0 sec 452 MBytes 3.79 Gbits/sec\r", "[ 4] 1.0- 2.0 sec 456 MBytes 3.82 Gbits/sec\r", "[ 4] 2.0- 3.0 sec 458 MBytes 3.84 Gbits/sec\r", "[ 4] 3.0- 4.0 sec 455 MBytes 3.82 Gbits/sec\r", "[ 4] 4.0- 5.0 sec 459 MBytes 3.85 Gbits/sec\r", "[ 4] 5.0- 6.0 sec 454 MBytes 3.81 Gbits/sec\r", "[ 4] 6.0- 7.0 sec 458 MBytes 3.84 Gbits/sec\r", "[ 4] 7.0- 8.0 sec 455 MBytes 3.81 Gbits/sec\r", "[ 4] 8.0- 9.0 sec 452 MBytes 3.79 Gbits/sec\r", "[ 4] 9.0-10.0 sec 457 MBytes 3.83 Gbits/sec\r", "[ 4] 0.0-10.0 sec 4.45 GBytes 3.82 Gbits/sec\r", "+ sleep 2\r", "+ m5 exit\r", "Exiting @ tick 15558331164200 because m5_exit instruction encountered"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2192332020800. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2192332030800. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}}, "success": true}
\ No newline at end of file
{"exp_name": "gt-ib-dumbbell-DCTCPm166400-4000", "start_time": 1607019298.7441294, "end_time": 1607056039.9394355, "sims": {"nic.server.0.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm166400-4000/1/nic.pci.server.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm166400-4000/1/nic.eth.server.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm166400-4000/1/nic.shm.server.0.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["20f57798dc00", "sync_pci=1 sync_eth=1", "exit main_time: 15564684861000"]}, "nic.server.1.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm166400-4000/1/nic.pci.server.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm166400-4000/1/nic.eth.server.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm166400-4000/1/nic.shm.server.1.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["3dbba671fb3c", "sync_pci=1 sync_eth=1", "exit main_time: 15564684910000"]}, "nic.client.0.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm166400-4000/1/nic.pci.client.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm166400-4000/1/nic.eth.client.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm166400-4000/1/nic.shm.client.0.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["28e67ed92a14", "sync_pci=1 sync_eth=1", "exit main_time: 15564684863000"]}, "nic.client.1.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm166400-4000/1/nic.pci.client.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm166400-4000/1/nic.eth.client.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm166400-4000/1/nic.shm.client.1.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["396faa3e24e0", "sync_pci=1 sync_eth=1", "exit main_time: 15564684031400"]}, "net.": {"class": "NS3DumbbellNet", "cmd": ["/home/hejingli/endhostsim-code/ns-3/cosim-run.sh", "cosim", "cosim-dumbbell-example", "--CosimPortLeft=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm166400-4000/1/nic.eth.server.0.", "--CosimPortLeft=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm166400-4000/1/nic.eth.server.1.", "--CosimPortRight=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm166400-4000/1/nic.eth.client.0.", "--CosimPortRight=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm166400-4000/1/nic.eth.client.1.", "--LinkRate=10Gb/s", "--LinkLatency=500ns", "--EcnTh=166400"], "stdout": [], "stderr": []}, "host.server.0": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm166400-4000/1/gem5-out.server.0", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm166400-4000/0/gem5-cp.server.0", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm166400-4000/1/cfg.server.0.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm166400-4000/1/nic.pci.server.0.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm166400-4000/1/nic.shm.server.0.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:15:01", "gem5 executing on spyder13, pid 51536", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm166400-4000/1/gem5-out.server.0 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm166400-4000/0/gem5-cp.server.0 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm166400-4000/1/cfg.server.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm166400-4000/1/nic.pci.server.0. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm166400-4000/1/nic.shm.server.0. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2194642585600", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.045892] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.045892] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.046892] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.046892] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.053891] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.053891] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.171873] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.172873] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.172873] i40e 0000:00:02.0: MAC address: 00:dc:98:77:f5:20\r", "[ 1.173872] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.175872] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.255860] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.255860] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.255860] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.255860] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.351845] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 4000 up\r", "[ 1.359844] i40e 0000:00:02.0 eth0: changing MTU from 1500 to 4000\r", "[ 1.365843] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.1/24 dev eth0\r", "+ iperf -s -w 1M -Z dctcp\r", "------------------------------------------------------------\r", "Server listening on TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 5] local 192.168.64.1 port 5001 connected with 192.168.64.3 port 45134\r", "[ 2.643649] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 5] 0.0-10.0 sec 5.42 GBytes 4.65 Gbits/sec\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2194642575600. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2194642585600. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.server.1": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm166400-4000/1/gem5-out.server.1", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm166400-4000/0/gem5-cp.server.1", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm166400-4000/1/cfg.server.1.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm166400-4000/1/nic.pci.server.1.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm166400-4000/1/nic.shm.server.1.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:15:01", "gem5 executing on spyder13, pid 51548", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm166400-4000/1/gem5-out.server.1 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm166400-4000/0/gem5-cp.server.1 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm166400-4000/1/cfg.server.1.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm166400-4000/1/nic.pci.server.1. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm166400-4000/1/nic.shm.server.1. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2415219341400", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.080887] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.080887] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.080887] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.080887] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.087886] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.087886] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.205868] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.206868] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.206868] i40e 0000:00:02.0: MAC address: 3c:fb:71:a6:bb:3d\r", "[ 1.207867] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.209867] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.287855] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.287855] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.287855] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.287855] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.383841] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 4000 up\r", "[ 1.391839] i40e 0000:00:02.0 eth0: changing MTU from 1500 to 4000\r", "[ 1.397839] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.2/24 dev eth0\r", "+ iperf -s -w 1M -Z dctcp\r", "------------------------------------------------------------\r", "Server listening on TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 5] local 192.168.64.2 port 5001 connected with 192.168.64.4 port 54614\r", "[ 2.226713] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 5] 0.0-10.0 sec 5.21 GBytes 4.48 Gbits/sec\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2415219331400. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2415219341400. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.client.0": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm166400-4000/1/gem5-out.client.0", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm166400-4000/0/gem5-cp.client.0", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm166400-4000/1/cfg.client.0.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm166400-4000/1/nic.pci.client.0.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm166400-4000/1/nic.shm.client.0.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:15:01", "gem5 executing on spyder13, pid 51553", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm166400-4000/1/gem5-out.client.0 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm166400-4000/0/gem5-cp.client.0 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm166400-4000/1/cfg.client.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm166400-4000/1/nic.pci.client.0. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm166400-4000/1/nic.shm.client.0. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2429056399400", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.092885] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.092885] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.092885] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.092885] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.099884] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.099884] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.218866] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.219866] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.219866] i40e 0000:00:02.0: MAC address: 14:2a:d9:7e:e6:28\r", "[ 1.219866] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.221866] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.303853] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.303853] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.303853] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.303853] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.399839] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 4000 up\r", "[ 1.407837] i40e 0000:00:02.0 eth0: changing MTU from 1500 to 4000\r", "[ 1.413837] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.3/24 dev eth0\r", "+ sleep 1\r", "+ iperf -w 1M -c 192.168.64.1 -Z dctcp -i 1\r", "------------------------------------------------------------\r", "Client connecting to 192.168.64.1, TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 4] local 192.168.64.3 port 45134 connected with 192.168.64.1 port 5001\r", "[ 2.581659] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 4] 0.0- 1.0 sec 580 MBytes 4.87 Gbits/sec\r", "[ 4] 1.0- 2.0 sec 549 MBytes 4.60 Gbits/sec\r", "[ 4] 2.0- 3.0 sec 613 MBytes 5.14 Gbits/sec\r", "[ 4] 3.0- 4.0 sec 530 MBytes 4.45 Gbits/sec\r", "[ 4] 4.0- 5.0 sec 504 MBytes 4.23 Gbits/sec\r", "[ 4] 5.0- 6.0 sec 562 MBytes 4.71 Gbits/sec\r", "[ 4] 6.0- 7.0 sec 556 MBytes 4.66 Gbits/sec\r", "[ 4] 7.0- 8.0 sec 577 MBytes 4.84 Gbits/sec\r", "[ 4] 8.0- 9.0 sec 534 MBytes 4.48 Gbits/sec\r", "[ 4] 9.0-10.0 sec 543 MBytes 4.55 Gbits/sec\r", "[ 4] 0.0-10.0 sec 5.42 GBytes 4.65 Gbits/sec\r", "+ sleep 20\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2429056389400. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2429056399400. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14", "warn: PowerState: More than one power state change request encountered within the same simulation tick"]}, "host.client.1": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm166400-4000/1/gem5-out.client.1", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm166400-4000/0/gem5-cp.client.1", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm166400-4000/1/cfg.client.1.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm166400-4000/1/nic.pci.client.1.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm166400-4000/1/nic.shm.client.1.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:15:01", "gem5 executing on spyder13, pid 51559", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm166400-4000/1/gem5-out.client.1 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm166400-4000/0/gem5-cp.client.1 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm166400-4000/1/cfg.client.1.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm166400-4000/1/nic.pci.client.1. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm166400-4000/1/nic.shm.client.1. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2200237313000", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.039892] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.039892] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.040892] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.040892] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.047891] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.047891] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.165873] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.166873] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.166873] i40e 0000:00:02.0: MAC address: e0:24:3e:aa:6f:39\r", "[ 1.167873] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.169873] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.247861] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.247861] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.247861] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.247861] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.343846] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 4000 up\r", "[ 1.351845] i40e 0000:00:02.0 eth0: changing MTU from 1500 to 4000\r", "[ 1.357844] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.4/24 dev eth0\r", "+ sleep 1\r", "+ iperf -w 1M -c 192.168.64.2 -Z dctcp -i 1\r", "------------------------------------------------------------\r", "Client connecting to 192.168.64.2, TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 4] local 192.168.64.4 port 54614 connected with 192.168.64.2 port 5001\r", "[ 2.610654] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 4] 0.0- 1.0 sec 522 MBytes 4.38 Gbits/sec\r", "[ 4] 1.0- 2.0 sec 512 MBytes 4.29 Gbits/sec\r", "[ 4] 2.0- 3.0 sec 506 MBytes 4.24 Gbits/sec\r", "[ 4] 3.0- 4.0 sec 520 MBytes 4.36 Gbits/sec\r", "[ 4] 4.0- 5.0 sec 581 MBytes 4.88 Gbits/sec\r", "[ 4] 5.0- 6.0 sec 558 MBytes 4.68 Gbits/sec\r", "[ 4] 6.0- 7.0 sec 521 MBytes 4.37 Gbits/sec\r", "[ 4] 7.0- 8.0 sec 520 MBytes 4.37 Gbits/sec\r", "[ 4] 8.0- 9.0 sec 522 MBytes 4.38 Gbits/sec\r", "[ 4] 9.0-10.0 sec 578 MBytes 4.85 Gbits/sec\r", "[ 4] 0.0-10.0 sec 5.21 GBytes 4.48 Gbits/sec\r", "+ sleep 2\r", "+ m5 exit\r", "Exiting @ tick 15564683691600 because m5_exit instruction encountered"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2200237303000. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2200237313000. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}}, "success": true}
\ No newline at end of file
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