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Commit 414f8b28 authored by Hejing Li's avatar Hejing Li
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add dctcp gem5 data

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{"exp_name": "gt-ib-dumbbell-DCTCPm174720-1500", "start_time": 1607019296.2333324, "end_time": 1607059161.6331646, "sims": {"nic.server.0.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm174720-1500/1/nic.pci.server.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm174720-1500/1/nic.eth.server.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm174720-1500/1/nic.shm.server.0.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["19a04a34e68", "sync_pci=1 sync_eth=1", "exit main_time: 15595027805000"]}, "nic.server.1.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm174720-1500/1/nic.pci.server.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm174720-1500/1/nic.eth.server.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm174720-1500/1/nic.shm.server.1.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["7110a7a9539c", "sync_pci=1 sync_eth=1", "exit main_time: 15595027888955"]}, "nic.client.0.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm174720-1500/1/nic.pci.client.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm174720-1500/1/nic.eth.client.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm174720-1500/1/nic.shm.client.0.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["6087495658d0", "sync_pci=1 sync_eth=1", "exit main_time: 15595027884000"]}, "nic.client.1.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm174720-1500/1/nic.pci.client.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm174720-1500/1/nic.eth.client.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm174720-1500/1/nic.shm.client.1.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["4ffdd0fc5e04", "sync_pci=1 sync_eth=1", "exit main_time: 15595027268400"]}, "net.": {"class": "NS3DumbbellNet", "cmd": ["/home/hejingli/endhostsim-code/ns-3/cosim-run.sh", "cosim", "cosim-dumbbell-example", "--CosimPortLeft=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm174720-1500/1/nic.eth.server.0.", "--CosimPortLeft=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm174720-1500/1/nic.eth.server.1.", "--CosimPortRight=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm174720-1500/1/nic.eth.client.0.", "--CosimPortRight=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm174720-1500/1/nic.eth.client.1.", "--LinkRate=10Gb/s", "--LinkLatency=500ns", "--EcnTh=174720"], "stdout": [], "stderr": []}, "host.server.0": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm174720-1500/1/gem5-out.server.0", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm174720-1500/0/gem5-cp.server.0", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm174720-1500/1/cfg.server.0.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm174720-1500/1/nic.pci.server.0.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm174720-1500/1/nic.shm.server.0.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:57", "gem5 executing on spyder09, pid 24614", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm174720-1500/1/gem5-out.server.0 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm174720-1500/0/gem5-cp.server.0 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm174720-1500/1/cfg.server.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm174720-1500/1/nic.pci.server.0. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm174720-1500/1/nic.shm.server.0. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2303307986600", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.089885] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.089885] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.089885] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.089885] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.096884] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.096884] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.215866] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.216866] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.216866] i40e 0000:00:02.0: MAC address: 68:4e:a3:04:9a:01\r", "[ 1.216866] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.218865] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.303853] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.303853] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.303853] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.303853] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.399838] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 1500 up\r", "[ 1.413836] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.1/24 dev eth0\r", "+ iperf -s -w 1M -Z dctcp\r", "------------------------------------------------------------\r", "Server listening on TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 5] local 192.168.64.1 port 5001 connected with 192.168.64.3 port 60102\r", "[ 2.671645] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 5] 0.0-10.1 sec 4.51 GBytes 3.84 Gbits/sec\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2303307976600. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2303307986600. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.server.1": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm174720-1500/1/gem5-out.server.1", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm174720-1500/0/gem5-cp.server.1", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm174720-1500/1/cfg.server.1.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm174720-1500/1/nic.pci.server.1.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm174720-1500/1/nic.shm.server.1.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:57", "gem5 executing on spyder09, pid 24615", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm174720-1500/1/gem5-out.server.1 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm174720-1500/0/gem5-cp.server.1 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm174720-1500/1/cfg.server.1.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm174720-1500/1/nic.pci.server.1. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm174720-1500/1/nic.shm.server.1. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2269039007000", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.068888] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.068888] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.068888] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.068888] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.076887] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.076887] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.194869] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.195869] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.195869] i40e 0000:00:02.0: MAC address: 9c:53:a9:a7:10:71\r", "[ 1.195869] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.198868] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.279856] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.279856] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.279856] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.279856] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.375841] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 1500 up\r", "[ 1.389839] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.2/24 dev eth0\r", "+ iperf -s -w 1M -Z dctcp\r", "------------------------------------------------------------\r", "Server listening on TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 5] local 192.168.64.2 port 5001 connected with 192.168.64.4 port 33866\r", "[ 2.391687] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 5] 0.0-10.0 sec 4.46 GBytes 3.83 Gbits/sec\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2269038997000. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2269039007000. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.client.0": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm174720-1500/1/gem5-out.client.0", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm174720-1500/0/gem5-cp.client.0", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm174720-1500/1/cfg.client.0.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm174720-1500/1/nic.pci.client.0.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm174720-1500/1/nic.shm.client.0.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:57", "gem5 executing on spyder09, pid 24616", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm174720-1500/1/gem5-out.client.0 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm174720-1500/0/gem5-cp.client.0 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm174720-1500/1/cfg.client.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm174720-1500/1/nic.pci.client.0. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm174720-1500/1/nic.shm.client.0. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2522521876600", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.097888] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.097888] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.097888] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.097888] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.104887] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.104887] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.221869] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.222869] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.222869] i40e 0000:00:02.0: MAC address: d0:58:56:49:87:60\r", "[ 1.222869] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.223869] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.303856] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.303856] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.303856] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.303856] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.399842] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 1500 up\r", "[ 1.411840] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.3/24 dev eth0\r", "+ sleep 1\r", "+ iperf -w 1M -c 192.168.64.1 -Z dctcp -i 1\r", "------------------------------------------------------------\r", "Client connecting to 192.168.64.1, TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 4] local 192.168.64.3 port 60102 connected with 192.168.64.1 port 5001\r", "[ 2.685646] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 4] 0.0- 1.0 sec 458 MBytes 3.84 Gbits/sec\r", "[ 4] 1.0- 2.0 sec 464 MBytes 3.90 Gbits/sec\r", "[ 4] 2.0- 3.0 sec 463 MBytes 3.88 Gbits/sec\r", "[ 4] 3.0- 4.0 sec 464 MBytes 3.90 Gbits/sec\r", "[ 4] 4.0- 5.0 sec 461 MBytes 3.87 Gbits/sec\r", "[ 4] 5.0- 6.0 sec 459 MBytes 3.85 Gbits/sec\r", "[ 4] 6.0- 7.0 sec 463 MBytes 3.88 Gbits/sec\r", "[ 4] 7.0- 8.0 sec 461 MBytes 3.87 Gbits/sec\r", "[ 4] 8.0- 9.0 sec 464 MBytes 3.89 Gbits/sec\r", "[ 4] 9.0-10.0 sec 459 MBytes 3.85 Gbits/sec\r", "[ 4] 0.0-10.0 sec 4.51 GBytes 3.87 Gbits/sec\r", "+ sleep 20\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2522521866600. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2522521876600. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.client.1": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm174720-1500/1/gem5-out.client.1", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm174720-1500/0/gem5-cp.client.1", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm174720-1500/1/cfg.client.1.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm174720-1500/1/nic.pci.client.1.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm174720-1500/1/nic.shm.client.1.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:57", "gem5 executing on spyder09, pid 24618", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm174720-1500/1/gem5-out.client.1 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm174720-1500/0/gem5-cp.client.1 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm174720-1500/1/cfg.client.1.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm174720-1500/1/nic.pci.client.1. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm174720-1500/1/nic.shm.client.1. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2224469213000", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.065890] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.065890] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.065890] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.065890] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.072889] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.072889] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.191870] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.192870] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.192870] i40e 0000:00:02.0: MAC address: 04:5e:fc:d0:fd:4f\r", "[ 1.192870] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.194870] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.279857] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.279857] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.279857] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.279857] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.375842] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 1500 up\r", "[ 1.389841] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.4/24 dev eth0\r", "+ sleep 1\r", "+ iperf -w 1M -c 192.168.64.2 -Z dctcp -i 1\r", "------------------------------------------------------------\r", "Client connecting to 192.168.64.2, TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 4] local 192.168.64.4 port 33866 connected with 192.168.64.2 port 5001\r", "[ 2.745634] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 4] 0.0- 1.0 sec 451 MBytes 3.79 Gbits/sec\r", "[ 4] 1.0- 2.0 sec 454 MBytes 3.81 Gbits/sec\r", "[ 4] 2.0- 3.0 sec 458 MBytes 3.84 Gbits/sec\r", "[ 4] 3.0- 4.0 sec 456 MBytes 3.82 Gbits/sec\r", "[ 4] 4.0- 5.0 sec 456 MBytes 3.82 Gbits/sec\r", "[ 4] 5.0- 6.0 sec 460 MBytes 3.86 Gbits/sec\r", "[ 4] 6.0- 7.0 sec 456 MBytes 3.83 Gbits/sec\r", "[ 4] 7.0- 8.0 sec 462 MBytes 3.88 Gbits/sec\r", "[ 4] 8.0- 9.0 sec 458 MBytes 3.84 Gbits/sec\r", "[ 4] 9.0-10.0 sec 459 MBytes 3.85 Gbits/sec\r", "[ 4] 0.0-10.0 sec 4.46 GBytes 3.83 Gbits/sec\r", "+ sleep 2\r", "+ m5 exit\r", "Exiting @ tick 15595026995600 because m5_exit instruction encountered"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2224469203000. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2224469213000. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}}, "success": true}
\ No newline at end of file
results/paper_data/gt-ib-dumbbell-DCTCPm174720-4000-1.json 0 → 100644
View file @ 414f8b28
{"exp_name": "gt-ib-dumbbell-DCTCPm174720-4000", "start_time": 1607019298.737039, "end_time": 1607055308.7571115, "sims": {"nic.server.0.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm174720-4000/1/nic.pci.server.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm174720-4000/1/nic.eth.server.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm174720-4000/1/nic.shm.server.0.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["73a572d8c1f8", "sync_pci=1 sync_eth=1", "exit main_time: 15743556216000"]}, "nic.server.1.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm174720-4000/1/nic.pci.server.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm174720-4000/1/nic.eth.server.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm174720-4000/1/nic.shm.server.1.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["42085aa5d198", "sync_pci=1 sync_eth=1", "exit main_time: 15743556218000"]}, "nic.client.0.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm174720-4000/1/nic.pci.client.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm174720-4000/1/nic.eth.client.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm174720-4000/1/nic.shm.client.0.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["2d3245ed0070", "sync_pci=1 sync_eth=1", "exit main_time: 15743556195000"]}, "nic.client.1.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm174720-4000/1/nic.pci.client.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm174720-4000/1/nic.eth.client.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm174720-4000/1/nic.shm.client.1.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["7b95fdd8100c", "sync_pci=1 sync_eth=1", "exit main_time: 15743555627400"]}, "net.": {"class": "NS3DumbbellNet", "cmd": ["/home/hejingli/endhostsim-code/ns-3/cosim-run.sh", "cosim", "cosim-dumbbell-example", "--CosimPortLeft=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm174720-4000/1/nic.eth.server.0.", "--CosimPortLeft=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm174720-4000/1/nic.eth.server.1.", "--CosimPortRight=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm174720-4000/1/nic.eth.client.0.", "--CosimPortRight=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm174720-4000/1/nic.eth.client.1.", "--LinkRate=10Gb/s", "--LinkLatency=500ns", "--EcnTh=174720"], "stdout": [], "stderr": []}, "host.server.0": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm174720-4000/1/gem5-out.server.0", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm174720-4000/0/gem5-cp.server.0", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm174720-4000/1/cfg.server.0.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm174720-4000/1/nic.pci.server.0.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm174720-4000/1/nic.shm.server.0.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:15:01", "gem5 executing on spyder13, pid 51531", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm174720-4000/1/gem5-out.server.0 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm174720-4000/0/gem5-cp.server.0 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm174720-4000/1/cfg.server.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm174720-4000/1/nic.pci.server.0. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm174720-4000/1/nic.shm.server.0. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2230445095200", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.046891] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.046891] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.047891] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.047891] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.054890] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.054890] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.172872] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.173872] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.173872] i40e 0000:00:02.0: MAC address: f8:c1:d8:72:a5:73\r", "[ 1.174872] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.176872] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.255860] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.255860] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.255860] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.255860] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.351845] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 4000 up\r", "[ 1.359844] i40e 0000:00:02.0 eth0: changing MTU from 1500 to 4000\r", "[ 1.365843] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.1/24 dev eth0\r", "+ iperf -s -w 1M -Z dctcp\r", "------------------------------------------------------------\r", "Server listening on TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 5] local 192.168.64.1 port 5001 connected with 192.168.64.3 port 43538\r", "[ 2.582658] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 5] 0.0-10.0 sec 5.16 GBytes 4.43 Gbits/sec\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2230445085200. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2230445095200. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.server.1": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm174720-4000/1/gem5-out.server.1", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm174720-4000/0/gem5-cp.server.1", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm174720-4000/1/cfg.server.1.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm174720-4000/1/nic.pci.server.1.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm174720-4000/1/nic.shm.server.1.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:15:01", "gem5 executing on spyder13, pid 51546", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm174720-4000/1/gem5-out.server.1 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm174720-4000/0/gem5-cp.server.1 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm174720-4000/1/cfg.server.1.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm174720-4000/1/nic.pci.server.1. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm174720-4000/1/nic.shm.server.1. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2402633027600", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.081888] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.081888] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.081888] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.082887] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.089886] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.089886] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.207868] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.208868] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.208868] i40e 0000:00:02.0: MAC address: 98:d1:a5:5a:08:42\r", "[ 1.208868] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.210868] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.295855] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.295855] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.295855] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.295855] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.391841] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 4000 up\r", "[ 1.398839] i40e 0000:00:02.0 eth0: changing MTU from 1500 to 4000\r", "[ 1.404839] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.2/24 dev eth0\r", "+ iperf -s -w 1M -Z dctcp\r", "------------------------------------------------------------\r", "Server listening on TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 5] local 192.168.64.2 port 5001 connected with 192.168.64.4 port 52012\r", "[ 2.424683] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 5] 0.0-10.0 sec 5.47 GBytes 4.70 Gbits/sec\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2402633017600. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2402633027600. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.client.0": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm174720-4000/1/gem5-out.client.0", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm174720-4000/0/gem5-cp.client.0", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm174720-4000/1/cfg.client.0.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm174720-4000/1/nic.pci.client.0.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm174720-4000/1/nic.shm.client.0.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:15:01", "gem5 executing on spyder13, pid 51550", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm174720-4000/1/gem5-out.client.0 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm174720-4000/0/gem5-cp.client.0 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm174720-4000/1/cfg.client.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm174720-4000/1/nic.pci.client.0. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm174720-4000/1/nic.shm.client.0. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2406476825200", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.063891] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.063891] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.064890] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.064890] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.071889] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.071889] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.189871] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.190871] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.190871] i40e 0000:00:02.0: MAC address: 70:00:ed:45:32:2d\r", "[ 1.190871] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.192871] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.271859] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.271859] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.271859] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.271859] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.367844] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 4000 up\r", "[ 1.375843] i40e 0000:00:02.0 eth0: changing MTU from 1500 to 4000\r", "[ 1.381842] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.3/24 dev eth0\r", "+ sleep 1\r", "+ iperf -w 1M -c 192.168.64.1 -Z dctcp -i 1\r", "------------------------------------------------------------\r", "Client connecting to 192.168.64.1, TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 4] local 192.168.64.3 port 43538 connected with 192.168.64.1 port 5001\r", "[ 2.545665] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 4] 0.0- 1.0 sec 514 MBytes 4.31 Gbits/sec\r", "[ 4] 1.0- 2.0 sec 535 MBytes 4.49 Gbits/sec\r", "[ 4] 2.0- 3.0 sec 504 MBytes 4.22 Gbits/sec\r", "[ 4] 3.0- 4.0 sec 561 MBytes 4.70 Gbits/sec\r", "[ 4] 4.0- 5.0 sec 537 MBytes 4.51 Gbits/sec\r", "[ 4] 5.0- 6.0 sec 545 MBytes 4.57 Gbits/sec\r", "[ 4] 6.0- 7.0 sec 506 MBytes 4.24 Gbits/sec\r", "[ 4] 7.0- 8.0 sec 515 MBytes 4.32 Gbits/sec\r", "[ 4] 8.0- 9.0 sec 536 MBytes 4.50 Gbits/sec\r", "[ 4] 9.0-10.0 sec 529 MBytes 4.44 Gbits/sec\r", "[ 4] 0.0-10.0 sec 5.16 GBytes 4.43 Gbits/sec\r", "+ sleep 20\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2406476815200. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2406476825200. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14", "warn: PowerState: More than one power state change request encountered within the same simulation tick"]}, "host.client.1": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm174720-4000/1/gem5-out.client.1", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm174720-4000/0/gem5-cp.client.1", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm174720-4000/1/cfg.client.1.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm174720-4000/1/nic.pci.client.1.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm174720-4000/1/nic.shm.client.1.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:15:01", "gem5 executing on spyder13, pid 51556", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm174720-4000/1/gem5-out.client.1 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm174720-4000/0/gem5-cp.client.1 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm174720-4000/1/cfg.client.1.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm174720-4000/1/nic.pci.client.1. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm174720-4000/1/nic.shm.client.1. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2378637730800", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.062889] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.062889] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.062889] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.063889] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.070888] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.070888] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.188870] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.189870] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.189870] i40e 0000:00:02.0: MAC address: 0c:10:d8:fd:95:7b\r", "[ 1.189870] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.191870] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.271858] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.271858] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.271858] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.271858] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.367843] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 4000 up\r", "[ 1.375842] i40e 0000:00:02.0 eth0: changing MTU from 1500 to 4000\r", "[ 1.381841] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.4/24 dev eth0\r", "+ sleep 1\r", "+ iperf -w 1M -c 192.168.64.2 -Z dctcp -i 1\r", "------------------------------------------------------------\r", "Client connecting to 192.168.64.2, TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 4] local 192.168.64.4 port 52012 connected with 192.168.64.2 port 5001\r", "[ 2.586658] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 4] 0.0- 1.0 sec 570 MBytes 4.78 Gbits/sec\r", "[ 4] 1.0- 2.0 sec 554 MBytes 4.65 Gbits/sec\r", "[ 4] 2.0- 3.0 sec 585 MBytes 4.91 Gbits/sec\r", "[ 4] 3.0- 4.0 sec 522 MBytes 4.38 Gbits/sec\r", "[ 4] 4.0- 5.0 sec 548 MBytes 4.59 Gbits/sec\r", "[ 4] 5.0- 6.0 sec 542 MBytes 4.55 Gbits/sec\r", "[ 4] 6.0- 7.0 sec 581 MBytes 4.87 Gbits/sec\r", "[ 4] 7.0- 8.0 sec 575 MBytes 4.82 Gbits/sec\r", "[ 4] 8.0- 9.0 sec 556 MBytes 4.66 Gbits/sec\r", "[ 4] 9.0-10.0 sec 568 MBytes 4.76 Gbits/sec\r", "[ 4] 0.0-10.0 sec 5.47 GBytes 4.70 Gbits/sec\r", "+ sleep 2\r", "+ m5 exit\r", "Exiting @ tick 15743555214400 because m5_exit instruction encountered"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2378637720800. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2378637730800. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}}, "success": true}
\ No newline at end of file
results/paper_data/gt-ib-dumbbell-DCTCPm183040-1500-1.json 0 → 100644
View file @ 414f8b28
{"exp_name": "gt-ib-dumbbell-DCTCPm183040-1500", "start_time": 1607019296.2334647, "end_time": 1607060705.487919, "sims": {"nic.server.0.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm183040-1500/1/nic.pci.server.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm183040-1500/1/nic.eth.server.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm183040-1500/1/nic.shm.server.0.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["6a422b25e294", "sync_pci=1 sync_eth=1", "exit main_time: 15528847992000"]}, "nic.server.1.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm183040-1500/1/nic.pci.server.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm183040-1500/1/nic.eth.server.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm183040-1500/1/nic.shm.server.1.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["709013901d0", "sync_pci=1 sync_eth=1", "exit main_time: 15528848022955"]}, "nic.client.0.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm183040-1500/1/nic.pci.client.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm183040-1500/1/nic.eth.client.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm183040-1500/1/nic.shm.client.0.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["44e2a52716a0", "sync_pci=1 sync_eth=1", "exit main_time: 15528847992000"]}, "nic.client.1.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm183040-1500/1/nic.pci.client.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm183040-1500/1/nic.eth.client.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm183040-1500/1/nic.shm.client.1.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["2bccf4d2b74", "sync_pci=1 sync_eth=1", "exit main_time: 15528847255400"]}, "net.": {"class": "NS3DumbbellNet", "cmd": ["/home/hejingli/endhostsim-code/ns-3/cosim-run.sh", "cosim", "cosim-dumbbell-example", "--CosimPortLeft=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm183040-1500/1/nic.eth.server.0.", "--CosimPortLeft=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm183040-1500/1/nic.eth.server.1.", "--CosimPortRight=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm183040-1500/1/nic.eth.client.0.", "--CosimPortRight=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm183040-1500/1/nic.eth.client.1.", "--LinkRate=10Gb/s", "--LinkLatency=500ns", "--EcnTh=183040"], "stdout": [], "stderr": []}, "host.server.0": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm183040-1500/1/gem5-out.server.0", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm183040-1500/0/gem5-cp.server.0", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm183040-1500/1/cfg.server.0.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm183040-1500/1/nic.pci.server.0.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm183040-1500/1/nic.shm.server.0.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:58", "gem5 executing on spyder10, pid 56865", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm183040-1500/1/gem5-out.server.0 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm183040-1500/0/gem5-cp.server.0 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm183040-1500/1/cfg.server.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm183040-1500/1/nic.pci.server.0. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm183040-1500/1/nic.shm.server.0. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2175840180000", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.034894] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.034894] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.035894] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.035894] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.042892] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.042892] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.160875] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.161874] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.162874] i40e 0000:00:02.0: MAC address: 94:e2:25:2b:42:6a\r", "[ 1.162874] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.164874] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.247861] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.247861] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.247861] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.247861] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.343847] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 1500 up\r", "[ 1.357845] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.1/24 dev eth0\r", "+ iperf -s -w 1M -Z dctcp\r", "------------------------------------------------------------\r", "Server listening on TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 5] local 192.168.64.1 port 5001 connected with 192.168.64.3 port 34130\r", "[ 2.420683] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 5] 0.0-10.0 sec 4.42 GBytes 3.79 Gbits/sec\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2175840170000. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2175840180000. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.server.1": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm183040-1500/1/gem5-out.server.1", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm183040-1500/0/gem5-cp.server.1", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm183040-1500/1/cfg.server.1.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm183040-1500/1/nic.pci.server.1.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm183040-1500/1/nic.shm.server.1.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:58", "gem5 executing on spyder10, pid 56872", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm183040-1500/1/gem5-out.server.1 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm183040-1500/0/gem5-cp.server.1 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm183040-1500/1/cfg.server.1.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm183040-1500/1/nic.pci.server.1. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm183040-1500/1/nic.shm.server.1. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2089905455400", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.009896] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.009896] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.009896] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.009896] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.016895] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.016895] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.135877] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.136877] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.136877] i40e 0000:00:02.0: MAC address: d0:01:39:01:09:07\r", "[ 1.136877] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.138877] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.223864] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.223864] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.223864] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.223864] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.319849] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 1500 up\r", "[ 1.333847] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.2/24 dev eth0\r", "+ iperf -s -w 1M -Z dctcp\r", "------------------------------------------------------------\r", "Server listening on TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 5] local 192.168.64.2 port 5001 connected with 192.168.64.4 port 33676\r", "[ 2.445678] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 5] 0.0-10.0 sec 4.42 GBytes 3.80 Gbits/sec\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2089905445400. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2089905455400. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.client.0": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm183040-1500/1/gem5-out.client.0", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm183040-1500/0/gem5-cp.client.0", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm183040-1500/1/cfg.client.0.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm183040-1500/1/nic.pci.client.0.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm183040-1500/1/nic.shm.client.0.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:58", "gem5 executing on spyder10, pid 56876", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm183040-1500/1/gem5-out.client.0 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm183040-1500/0/gem5-cp.client.0 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm183040-1500/1/cfg.client.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm183040-1500/1/nic.pci.client.0. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm183040-1500/1/nic.shm.client.0. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2203147479800", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.044892] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.044892] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.044892] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.045891] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.052890] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.052890] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.170872] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.171872] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.171872] i40e 0000:00:02.0: MAC address: a0:16:27:a5:e2:44\r", "[ 1.171872] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.174872] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.255860] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.255860] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.255860] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.255860] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.351845] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 1500 up\r", "[ 1.365843] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.3/24 dev eth0\r", "+ sleep 1\r", "+ iperf -w 1M -c 192.168.64.1 -Z dctcp -i 1\r", "------------------------------------------------------------\r", "Client connecting to 192.168.64.1, TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 4] local 192.168.64.3 port 34130 connected with 192.168.64.1 port 5001\r", "[ 2.656647] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 4] 0.0- 1.0 sec 453 MBytes 3.80 Gbits/sec\r", "[ 4] 1.0- 2.0 sec 453 MBytes 3.80 Gbits/sec\r", "[ 4] 2.0- 3.0 sec 452 MBytes 3.79 Gbits/sec\r", "[ 4] 3.0- 4.0 sec 449 MBytes 3.77 Gbits/sec\r", "[ 4] 4.0- 5.0 sec 452 MBytes 3.79 Gbits/sec\r", "[ 4] 5.0- 6.0 sec 450 MBytes 3.78 Gbits/sec\r", "[ 4] 6.0- 7.0 sec 452 MBytes 3.79 Gbits/sec\r", "[ 4] 7.0- 8.0 sec 455 MBytes 3.81 Gbits/sec\r", "[ 4] 8.0- 9.0 sec 451 MBytes 3.78 Gbits/sec\r", "[ 4] 9.0-10.0 sec 458 MBytes 3.84 Gbits/sec\r", "[ 4] 0.0-10.0 sec 4.42 GBytes 3.79 Gbits/sec\r", "+ sleep 20\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2203147469800. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2203147479800. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.client.1": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm183040-1500/1/gem5-out.client.1", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm183040-1500/0/gem5-cp.client.1", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm183040-1500/1/cfg.client.1.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm183040-1500/1/nic.pci.client.1.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm183040-1500/1/nic.shm.client.1.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:58", "gem5 executing on spyder10, pid 56881", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm183040-1500/1/gem5-out.client.1 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm183040-1500/0/gem5-cp.client.1 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm183040-1500/1/cfg.client.1.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm183040-1500/1/nic.pci.client.1. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm183040-1500/1/nic.shm.client.1. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2162780215400", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.028894] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.028894] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.029894] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.029894] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.036893] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.036893] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.154875] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.155875] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.156874] i40e 0000:00:02.0: MAC address: 74:2b:4d:cf:bc:02\r", "[ 1.156874] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.158874] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.239862] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.239862] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.239862] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.239862] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.335847] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 1500 up\r", "[ 1.349845] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.4/24 dev eth0\r", "+ sleep 1\r", "+ iperf -w 1M -c 192.168.64.2 -Z dctcp -i 1\r", "------------------------------------------------------------\r", "Client connecting to 192.168.64.2, TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 4] local 192.168.64.4 port 33676 connected with 192.168.64.2 port 5001\r", "[ 2.640649] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 4] 0.0- 1.0 sec 448 MBytes 3.76 Gbits/sec\r", "[ 4] 1.0- 2.0 sec 455 MBytes 3.82 Gbits/sec\r", "[ 4] 2.0- 3.0 sec 453 MBytes 3.80 Gbits/sec\r", "[ 4] 3.0- 4.0 sec 453 MBytes 3.80 Gbits/sec\r", "[ 4] 4.0- 5.0 sec 456 MBytes 3.82 Gbits/sec\r", "[ 4] 5.0- 6.0 sec 457 MBytes 3.83 Gbits/sec\r", "[ 4] 6.0- 7.0 sec 452 MBytes 3.80 Gbits/sec\r", "[ 4] 7.0- 8.0 sec 454 MBytes 3.81 Gbits/sec\r", "[ 4] 8.0- 9.0 sec 455 MBytes 3.81 Gbits/sec\r", "[ 4] 9.0-10.0 sec 446 MBytes 3.74 Gbits/sec\r", "[ 4] 0.0-10.0 sec 4.42 GBytes 3.80 Gbits/sec\r", "+ sleep 2\r", "+ m5 exit\r", "Exiting @ tick 15528847042200 because m5_exit instruction encountered"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2162780205400. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2162780215400. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}}, "success": true}
\ No newline at end of file
results/paper_data/gt-ib-dumbbell-DCTCPm183040-4000-1.json 0 → 100644
View file @ 414f8b28
This source diff could not be displayed because it is too large. You can view the blob instead.
results/paper_data/gt-ib-dumbbell-DCTCPm191360-4000-1.json 0 → 100644
View file @ 414f8b28
{"exp_name": "gt-ib-dumbbell-DCTCPm191360-4000", "start_time": 1607019298.744208, "end_time": 1607055178.7810938, "sims": {"nic.server.0.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm191360-4000/1/nic.pci.server.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm191360-4000/1/nic.eth.server.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm191360-4000/1/nic.shm.server.0.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["5291cfefcc64", "sync_pci=1 sync_eth=1", "exit main_time: 15651348681000"]}, "nic.server.1.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm191360-4000/1/nic.pci.server.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm191360-4000/1/nic.eth.server.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm191360-4000/1/nic.shm.server.1.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["c1f2cbe0ad8", "sync_pci=1 sync_eth=1", "exit main_time: 15651348701000"]}, "nic.client.0.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm191360-4000/1/nic.pci.client.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm191360-4000/1/nic.eth.client.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm191360-4000/1/nic.shm.client.0.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["49f951441fac", "sync_pci=1 sync_eth=1", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed 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(t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed 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(t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed 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(t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "warn: nicsim_sync failed (t=230131010000)", "exit main_time: 15651348710000"]}, "nic.client.1.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm191360-4000/1/nic.pci.client.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm191360-4000/1/nic.eth.client.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm191360-4000/1/nic.shm.client.1.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["66bfa93f3ee4", "sync_pci=1 sync_eth=1", "exit main_time: 15651347823400"]}, "net.": {"class": "NS3DumbbellNet", "cmd": ["/home/hejingli/endhostsim-code/ns-3/cosim-run.sh", "cosim", "cosim-dumbbell-example", "--CosimPortLeft=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm191360-4000/1/nic.eth.server.0.", "--CosimPortLeft=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm191360-4000/1/nic.eth.server.1.", "--CosimPortRight=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm191360-4000/1/nic.eth.client.0.", "--CosimPortRight=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm191360-4000/1/nic.eth.client.1.", "--LinkRate=10Gb/s", "--LinkLatency=500ns", "--EcnTh=191360"], "stdout": [], "stderr": []}, "host.server.0": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm191360-4000/1/gem5-out.server.0", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm191360-4000/0/gem5-cp.server.0", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm191360-4000/1/cfg.server.0.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm191360-4000/1/nic.pci.server.0.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm191360-4000/1/nic.shm.server.0.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:15:01", "gem5 executing on spyder13, pid 51545", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm191360-4000/1/gem5-out.server.0 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm191360-4000/0/gem5-cp.server.0 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm191360-4000/1/cfg.server.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm191360-4000/1/nic.pci.server.0. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm191360-4000/1/nic.shm.server.0. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2282672091800", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.041892] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.041892] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.041892] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.041892] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.048891] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.048891] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.167873] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.168873] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.168873] i40e 0000:00:02.0: MAC address: 64:cc:ef:cf:91:52\r", "[ 1.168873] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.170873] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.255860] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.255860] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.255860] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.255860] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.351845] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 4000 up\r", "[ 1.359844] i40e 0000:00:02.0 eth0: changing MTU from 1500 to 4000\r", "[ 1.365843] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.1/24 dev eth0\r", "+ iperf -s -w 1M -Z dctcp\r", "------------------------------------------------------------\r", "Server listening on TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 5] local 192.168.64.1 port 5001 connected with 192.168.64.3 port 34244\r", "[ 2.417683] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 5] 0.0-10.0 sec 5.24 GBytes 4.50 Gbits/sec\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2282672081800. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2282672091800. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.server.1": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm191360-4000/1/gem5-out.server.1", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm191360-4000/0/gem5-cp.server.1", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm191360-4000/1/cfg.server.1.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm191360-4000/1/nic.pci.server.1.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm191360-4000/1/nic.shm.server.1.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:15:01", "gem5 executing on spyder13, pid 51554", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm191360-4000/1/gem5-out.server.1 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm191360-4000/0/gem5-cp.server.1 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm191360-4000/1/cfg.server.1.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm191360-4000/1/nic.pci.server.1. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm191360-4000/1/nic.shm.server.1. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2208241375200", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.038894] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.038894] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.038894] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.038894] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.046892] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.046892] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.164875] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.165874] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.165874] i40e 0000:00:02.0: MAC address: d8:0a:be:2c:1f:0c\r", "[ 1.165874] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.167874] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.247862] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.247862] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.247862] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.247862] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.343847] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 4000 up\r", "[ 1.351846] i40e 0000:00:02.0 eth0: changing MTU from 1500 to 4000\r", "[ 1.357845] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.2/24 dev eth0\r", "+ iperf -s -w 1M -Z dctcp\r", "------------------------------------------------------------\r", "Server listening on TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 5] local 192.168.64.2 port 5001 connected with 192.168.64.4 port 40078\r", "[ 2.480675] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 5] 0.0-10.0 sec 5.47 GBytes 4.69 Gbits/sec\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2208241365200. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2208241375200. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.client.0": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm191360-4000/1/gem5-out.client.0", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm191360-4000/0/gem5-cp.client.0", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm191360-4000/1/cfg.client.0.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm191360-4000/1/nic.pci.client.0.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm191360-4000/1/nic.shm.client.0.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:15:01", "gem5 executing on spyder13, pid 51560", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm191360-4000/1/gem5-out.client.0 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm191360-4000/0/gem5-cp.client.0 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm191360-4000/1/cfg.client.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm191360-4000/1/nic.pci.client.0. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm191360-4000/1/nic.shm.client.0. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2299675561200", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.071887] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.071887] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.071887] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.071887] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.079886] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.079886] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.197868] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.198868] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.198868] i40e 0000:00:02.0: MAC address: ac:1f:44:51:f9:49\r", "[ 1.198868] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.200868] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.279856] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.279856] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.279856] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.279856] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.375841] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 4000 up\r", "[ 1.383840] i40e 0000:00:02.0 eth0: changing MTU from 1500 to 4000\r", "[ 1.389839] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.3/24 dev eth0\r", "+ sleep 1\r", "+ iperf -w 1M -c 192.168.64.1 -Z dctcp -i 1\r", "------------------------------------------------------------\r", "Client connecting to 192.168.64.1, TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 4] local 192.168.64.3 port 34244 connected with 192.168.64.1 port 5001\r", "[ 2.567660] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 4] 0.0- 1.0 sec 493 MBytes 4.13 Gbits/sec\r", "[ 4] 1.0- 2.0 sec 535 MBytes 4.49 Gbits/sec\r", "[ 4] 2.0- 3.0 sec 508 MBytes 4.26 Gbits/sec\r", "[ 4] 3.0- 4.0 sec 502 MBytes 4.21 Gbits/sec\r", "[ 4] 4.0- 5.0 sec 613 MBytes 5.14 Gbits/sec\r", "[ 4] 5.0- 6.0 sec 596 MBytes 5.00 Gbits/sec\r", "[ 4] 6.0- 7.0 sec 556 MBytes 4.66 Gbits/sec\r", "[ 4] 7.0- 8.0 sec 508 MBytes 4.26 Gbits/sec\r", "[ 4] 8.0- 9.0 sec 502 MBytes 4.21 Gbits/sec\r", "[ 4] 9.0-10.0 sec 557 MBytes 4.67 Gbits/sec\r", "[ 4] 0.0-10.0 sec 5.24 GBytes 4.50 Gbits/sec\r", "+ sleep 20\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2299675551200. Starting simulation...", "info: Entering event queue @ 2299675561200. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2299675562200. Starting simulation...", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.client.1": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm191360-4000/1/gem5-out.client.1", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm191360-4000/0/gem5-cp.client.1", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm191360-4000/1/cfg.client.1.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm191360-4000/1/nic.pci.client.1.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm191360-4000/1/nic.shm.client.1.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:15:01", "gem5 executing on spyder13, pid 51561", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm191360-4000/1/gem5-out.client.1 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm191360-4000/0/gem5-cp.client.1 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm191360-4000/1/cfg.client.1.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm191360-4000/1/nic.pci.client.1. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm191360-4000/1/nic.shm.client.1. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2284449863400", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.069889] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.069889] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.069889] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.069889] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.076888] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.077888] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.195870] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.196870] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.196870] i40e 0000:00:02.0: MAC address: e4:3e:3f:a9:bf:66\r", "[ 1.196870] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.198870] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.279857] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.279857] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.279857] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.279857] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.375843] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 4000 up\r", "[ 1.383841] i40e 0000:00:02.0 eth0: changing MTU from 1500 to 4000\r", "[ 1.389841] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.4/24 dev eth0\r", "+ sleep 1\r", "+ iperf -w 1M -c 192.168.64.2 -Z dctcp -i 1\r", "------------------------------------------------------------\r", "Client connecting to 192.168.64.2, TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 4] local 192.168.64.4 port 40078 connected with 192.168.64.2 port 5001\r", "[ 2.597657] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 4] 0.0- 1.0 sec 605 MBytes 5.08 Gbits/sec\r", "[ 4] 1.0- 2.0 sec 564 MBytes 4.74 Gbits/sec\r", "[ 4] 2.0- 3.0 sec 589 MBytes 4.94 Gbits/sec\r", "[ 4] 3.0- 4.0 sec 593 MBytes 4.97 Gbits/sec\r", "[ 4] 4.0- 5.0 sec 484 MBytes 4.06 Gbits/sec\r", "[ 4] 5.0- 6.0 sec 496 MBytes 4.16 Gbits/sec\r", "[ 4] 6.0- 7.0 sec 545 MBytes 4.57 Gbits/sec\r", "[ 4] 7.0- 8.0 sec 586 MBytes 4.92 Gbits/sec\r", "[ 4] 8.0- 9.0 sec 596 MBytes 5.00 Gbits/sec\r", "[ 4] 9.0-10.0 sec 538 MBytes 4.52 Gbits/sec\r", "[ 4] 0.0-10.0 sec 5.47 GBytes 4.70 Gbits/sec\r", "+ sleep 2\r", "+ m5 exit\r", "Exiting @ tick 15651347414800 because m5_exit instruction encountered"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2284449853400. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2284449863400. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}}, "success": true}
\ No newline at end of file
results/paper_data/gt-ib-dumbbell-DCTCPm199680-1500-1.json 0 → 100644
View file @ 414f8b28
{"exp_name": "gt-ib-dumbbell-DCTCPm199680-1500", "start_time": 1607019296.247726, "end_time": 1607055317.778777, "sims": {"nic.server.0.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm199680-1500/1/nic.pci.server.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm199680-1500/1/nic.eth.server.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm199680-1500/1/nic.shm.server.0.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["556c4c6c116c", "sync_pci=1 sync_eth=1", "exit main_time: 15625347755000"]}, "nic.server.1.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm199680-1500/1/nic.pci.server.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm199680-1500/1/nic.eth.server.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm199680-1500/1/nic.shm.server.1.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["134630ca2640", "sync_pci=1 sync_eth=1", "exit main_time: 15625347797937"]}, "nic.client.0.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm199680-1500/1/nic.pci.client.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm199680-1500/1/nic.eth.client.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm199680-1500/1/nic.shm.client.0.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["61a984be35dc", "sync_pci=1 sync_eth=1", "exit main_time: 15625347767000"]}, "nic.client.1.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm199680-1500/1/nic.pci.client.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm199680-1500/1/nic.eth.client.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm199680-1500/1/nic.shm.client.1.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["512074503b10", "sync_pci=1 sync_eth=1", "exit main_time: 15625347257400"]}, "net.": {"class": "NS3DumbbellNet", "cmd": ["/home/hejingli/endhostsim-code/ns-3/cosim-run.sh", "cosim", "cosim-dumbbell-example", "--CosimPortLeft=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm199680-1500/1/nic.eth.server.0.", "--CosimPortLeft=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm199680-1500/1/nic.eth.server.1.", "--CosimPortRight=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm199680-1500/1/nic.eth.client.0.", "--CosimPortRight=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm199680-1500/1/nic.eth.client.1.", "--LinkRate=10Gb/s", "--LinkLatency=500ns", "--EcnTh=199680"], "stdout": [], "stderr": []}, "host.server.0": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm199680-1500/1/gem5-out.server.0", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm199680-1500/0/gem5-cp.server.0", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm199680-1500/1/cfg.server.0.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm199680-1500/1/nic.pci.server.0.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm199680-1500/1/nic.shm.server.0.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:58", "gem5 executing on spyder10, pid 56869", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm199680-1500/1/gem5-out.server.0 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm199680-1500/0/gem5-cp.server.0 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm199680-1500/1/cfg.server.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm199680-1500/1/nic.pci.server.0. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm199680-1500/1/nic.shm.server.0. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2296942756800", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.072888] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.072888] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.072888] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.072888] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.080886] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.080886] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.198868] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.199868] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.199868] i40e 0000:00:02.0: MAC address: 6c:11:6c:4c:6c:55\r", "[ 1.199868] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.201868] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.279856] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.279856] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.279856] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.279856] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.375842] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 1500 up\r", "[ 1.389840] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.1/24 dev eth0\r", "+ iperf -s -w 1M -Z dctcp\r", "------------------------------------------------------------\r", "Server listening on TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 5] local 192.168.64.1 port 5001 connected with 192.168.64.3 port 41196\r", "[ 2.421683] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 5] 0.0-10.0 sec 4.44 GBytes 3.81 Gbits/sec\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2296942746800. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2296942756800. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.server.1": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm199680-1500/1/gem5-out.server.1", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm199680-1500/0/gem5-cp.server.1", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm199680-1500/1/cfg.server.1.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm199680-1500/1/nic.pci.server.1.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm199680-1500/1/nic.shm.server.1.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:58", "gem5 executing on spyder10, pid 56875", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm199680-1500/1/gem5-out.server.1 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm199680-1500/0/gem5-cp.server.1 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm199680-1500/1/cfg.server.1.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm199680-1500/1/nic.pci.server.1. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm199680-1500/1/nic.shm.server.1. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2298270748000", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.064889] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.065889] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.065889] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.065889] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.072888] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.072888] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.190870] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.191870] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.191870] i40e 0000:00:02.0: MAC address: 40:26:ca:30:46:13\r", "[ 1.192870] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.194870] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.271858] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.271858] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.271858] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.271858] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.367843] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 1500 up\r", "[ 1.381841] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.2/24 dev eth0\r", "+ iperf -s -w 1M -Z dctcp\r", "------------------------------------------------------------\r", "Server listening on TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 5] local 192.168.64.2 port 5001 connected with 192.168.64.4 port 50806\r", "[ 2.387688] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 5] 0.0-10.0 sec 4.45 GBytes 3.82 Gbits/sec\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2298270738000. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2298270748000. Starting simulation...", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: instruction 'fwait' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.client.0": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm199680-1500/1/gem5-out.client.0", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm199680-1500/0/gem5-cp.client.0", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm199680-1500/1/cfg.client.0.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm199680-1500/1/nic.pci.client.0.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm199680-1500/1/nic.shm.client.0.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:58", "gem5 executing on spyder10, pid 56879", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm199680-1500/1/gem5-out.client.0 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm199680-1500/0/gem5-cp.client.0 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm199680-1500/1/cfg.client.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm199680-1500/1/nic.pci.client.0. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm199680-1500/1/nic.shm.client.0. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2284957807200", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.056890] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.056890] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.056890] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.056890] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.064889] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.064889] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.182871] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.183871] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.183871] i40e 0000:00:02.0: MAC address: dc:35:be:84:a9:61\r", "[ 1.183871] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.185871] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.263859] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.263859] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.263859] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.263859] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.359844] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 1500 up\r", "[ 1.373842] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.3/24 dev eth0\r", "+ sleep 1\r", "+ iperf -w 1M -c 192.168.64.1 -Z dctcp -i 1\r", "------------------------------------------------------------\r", "Client connecting to 192.168.64.1, TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 4] local 192.168.64.3 port 41196 connected with 192.168.64.1 port 5001\r", "[ 2.709639] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 4] 0.0- 1.0 sec 450 MBytes 3.78 Gbits/sec\r", "[ 4] 1.0- 2.0 sec 453 MBytes 3.80 Gbits/sec\r", "[ 4] 2.0- 3.0 sec 454 MBytes 3.81 Gbits/sec\r", "[ 4] 3.0- 4.0 sec 459 MBytes 3.85 Gbits/sec\r", "[ 4] 4.0- 5.0 sec 457 MBytes 3.83 Gbits/sec\r", "[ 4] 5.0- 6.0 sec 454 MBytes 3.81 Gbits/sec\r", "[ 4] 6.0- 7.0 sec 456 MBytes 3.83 Gbits/sec\r", "[ 4] 7.0- 8.0 sec 458 MBytes 3.84 Gbits/sec\r", "[ 4] 8.0- 9.0 sec 456 MBytes 3.82 Gbits/sec\r", "[ 4] 9.0-10.0 sec 452 MBytes 3.79 Gbits/sec\r", "[ 4] 0.0-10.0 sec 4.44 GBytes 3.82 Gbits/sec\r", "+ sleep 20\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2284957797200. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2284957807200. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.client.1": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm199680-1500/1/gem5-out.client.1", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm199680-1500/0/gem5-cp.client.1", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm199680-1500/1/cfg.client.1.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm199680-1500/1/nic.pci.client.1.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm199680-1500/1/nic.shm.client.1.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:58", "gem5 executing on spyder10, pid 56883", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm199680-1500/1/gem5-out.client.1 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm199680-1500/0/gem5-cp.client.1 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm199680-1500/1/cfg.client.1.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm199680-1500/1/nic.pci.client.1. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm199680-1500/1/nic.shm.client.1. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2259633357600", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.045891] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.045891] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.045891] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.045891] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.053890] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.053890] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.171872] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.172872] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.172872] i40e 0000:00:02.0: MAC address: 10:3b:50:74:20:51\r", "[ 1.172872] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.175872] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.255859] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.255859] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.255859] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.255859] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.351845] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 1500 up\r", "[ 1.364843] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.4/24 dev eth0\r", "+ sleep 1\r", "+ iperf -w 1M -c 192.168.64.2 -Z dctcp -i 1\r", "------------------------------------------------------------\r", "Client connecting to 192.168.64.2, TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 4] local 192.168.64.4 port 50806 connected with 192.168.64.2 port 5001\r", "[ 2.703639] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 4] 0.0- 1.0 sec 451 MBytes 3.78 Gbits/sec\r", "[ 4] 1.0- 2.0 sec 453 MBytes 3.80 Gbits/sec\r", "[ 4] 2.0- 3.0 sec 452 MBytes 3.80 Gbits/sec\r", "[ 4] 3.0- 4.0 sec 456 MBytes 3.82 Gbits/sec\r", "[ 4] 4.0- 5.0 sec 456 MBytes 3.83 Gbits/sec\r", "[ 4] 5.0- 6.0 sec 455 MBytes 3.82 Gbits/sec\r", "[ 4] 6.0- 7.0 sec 457 MBytes 3.83 Gbits/sec\r", "[ 4] 7.0- 8.0 sec 458 MBytes 3.84 Gbits/sec\r", "[ 4] 8.0- 9.0 sec 457 MBytes 3.84 Gbits/sec\r", "[ 4] 9.0-10.0 sec 456 MBytes 3.83 Gbits/sec\r", "[ 4] 0.0-10.0 sec 4.45 GBytes 3.82 Gbits/sec\r", "+ sleep 2\r", "+ m5 exit\r", "Exiting @ tick 15625346977400 because m5_exit instruction encountered"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2259633347600. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2259633357600. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}}, "success": true}
\ No newline at end of file
results/paper_data/gt-ib-dumbbell-DCTCPm199680-4000-1.json 0 → 100644
View file @ 414f8b28
{"exp_name": "gt-ib-dumbbell-DCTCPm199680-4000", "start_time": 1607019298.73545, "end_time": 1607055072.407593, "sims": {"nic.server.0.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm199680-4000/1/nic.pci.server.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm199680-4000/1/nic.eth.server.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm199680-4000/1/nic.shm.server.0.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["4654f1d9a7f4", "sync_pci=1 sync_eth=1", "exit main_time: 15563041278000"]}, "nic.server.1.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm199680-4000/1/nic.pci.server.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm199680-4000/1/nic.eth.server.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm199680-4000/1/nic.shm.server.1.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["317e92a2d6cc", "sync_pci=1 sync_eth=1", "exit main_time: 15563041324000"]}, "nic.client.0.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm199680-4000/1/nic.pci.client.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm199680-4000/1/nic.eth.client.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm199680-4000/1/nic.shm.client.0.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["106ba471e134", "sync_pci=1 sync_eth=1", "exit main_time: 15563041276000"]}, "nic.client.1.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm199680-4000/1/nic.pci.client.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm199680-4000/1/nic.eth.client.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm199680-4000/1/nic.shm.client.1.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["4e45f89bf608", "sync_pci=1 sync_eth=1", "exit main_time: 15563040624400"]}, "net.": {"class": "NS3DumbbellNet", "cmd": ["/home/hejingli/endhostsim-code/ns-3/cosim-run.sh", "cosim", "cosim-dumbbell-example", "--CosimPortLeft=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm199680-4000/1/nic.eth.server.0.", "--CosimPortLeft=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm199680-4000/1/nic.eth.server.1.", "--CosimPortRight=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm199680-4000/1/nic.eth.client.0.", "--CosimPortRight=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm199680-4000/1/nic.eth.client.1.", "--LinkRate=10Gb/s", "--LinkLatency=500ns", "--EcnTh=199680"], "stdout": [], "stderr": []}, "host.server.0": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm199680-4000/1/gem5-out.server.0", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm199680-4000/0/gem5-cp.server.0", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm199680-4000/1/cfg.server.0.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm199680-4000/1/nic.pci.server.0.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm199680-4000/1/nic.shm.server.0.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:15:01", "gem5 executing on spyder13, pid 51567", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm199680-4000/1/gem5-out.server.0 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm199680-4000/0/gem5-cp.server.0 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm199680-4000/1/cfg.server.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm199680-4000/1/nic.pci.server.0. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm199680-4000/1/nic.shm.server.0. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2257206581000", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.045892] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.045892] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.045892] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.045892] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.053891] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.053891] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.171873] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.172873] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.172873] i40e 0000:00:02.0: MAC address: f4:a7:d9:f1:54:46\r", "[ 1.172873] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.175872] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.255860] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.255860] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.255860] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.255860] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.351845] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 4000 up\r", "[ 1.359844] i40e 0000:00:02.0 eth0: changing MTU from 1500 to 4000\r", "[ 1.365843] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.1/24 dev eth0\r", "+ iperf -s -w 1M -Z dctcp\r", "------------------------------------------------------------\r", "Server listening on TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 5] local 192.168.64.1 port 5001 connected with 192.168.64.3 port 48838\r", "[ 2.346694] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 5] 0.0-10.0 sec 5.24 GBytes 4.50 Gbits/sec\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2257206571000. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2257206581000. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.server.1": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm199680-4000/1/gem5-out.server.1", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm199680-4000/0/gem5-cp.server.1", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm199680-4000/1/cfg.server.1.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm199680-4000/1/nic.pci.server.1.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm199680-4000/1/nic.shm.server.1.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:15:01", "gem5 executing on spyder13, pid 51569", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm199680-4000/1/gem5-out.server.1 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm199680-4000/0/gem5-cp.server.1 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm199680-4000/1/cfg.server.1.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm199680-4000/1/nic.pci.server.1. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm199680-4000/1/nic.shm.server.1. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2197803241000", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.032893] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.032893] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.032893] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.032893] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.039892] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.040892] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.158874] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.159874] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.159874] i40e 0000:00:02.0: MAC address: cc:d6:a2:92:7e:31\r", "[ 1.159874] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.161874] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.239862] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.239862] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.239862] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.239862] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.335847] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 4000 up\r", "[ 1.343846] i40e 0000:00:02.0 eth0: changing MTU from 1500 to 4000\r", "[ 1.349845] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.2/24 dev eth0\r", "+ iperf -s -w 1M -Z dctcp\r", "------------------------------------------------------------\r", "Server listening on TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 5] local 192.168.64.2 port 5001 connected with 192.168.64.4 port 33792\r", "[ 2.391687] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 5] 0.0-10.0 sec 5.46 GBytes 4.68 Gbits/sec\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2197803231000. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2197803241000. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.client.0": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm199680-4000/1/gem5-out.client.0", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm199680-4000/0/gem5-cp.client.0", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm199680-4000/1/cfg.client.0.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm199680-4000/1/nic.pci.client.0.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm199680-4000/1/nic.shm.client.0.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:15:01", "gem5 executing on spyder13, pid 51570", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm199680-4000/1/gem5-out.client.0 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm199680-4000/0/gem5-cp.client.0 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm199680-4000/1/cfg.client.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm199680-4000/1/nic.pci.client.0. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm199680-4000/1/nic.shm.client.0. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2197314367800", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.029893] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.029893] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.029893] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.029893] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.037892] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.037892] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.155874] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.156874] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.156874] i40e 0000:00:02.0: MAC address: 34:e1:71:a4:6b:10\r", "[ 1.156874] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.159873] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.239861] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.239861] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.239861] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.239861] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.335847] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 4000 up\r", "[ 1.343846] i40e 0000:00:02.0 eth0: changing MTU from 1500 to 4000\r", "[ 1.349845] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.3/24 dev eth0\r", "+ sleep 1\r", "+ iperf -w 1M -c 192.168.64.1 -Z dctcp -i 1\r", "------------------------------------------------------------\r", "Client connecting to 192.168.64.1, TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 4] local 192.168.64.3 port 48838 connected with 192.168.64.1 port 5001\r", "[ 2.529665] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 4] 0.0- 1.0 sec 534 MBytes 4.48 Gbits/sec\r", "[ 4] 1.0- 2.0 sec 503 MBytes 4.22 Gbits/sec\r", "[ 4] 2.0- 3.0 sec 537 MBytes 4.50 Gbits/sec\r", "[ 4] 3.0- 4.0 sec 528 MBytes 4.43 Gbits/sec\r", "[ 4] 4.0- 5.0 sec 522 MBytes 4.37 Gbits/sec\r", "[ 4] 5.0- 6.0 sec 534 MBytes 4.48 Gbits/sec\r", "[ 4] 6.0- 7.0 sec 576 MBytes 4.83 Gbits/sec\r", "[ 4] 7.0- 8.0 sec 501 MBytes 4.20 Gbits/sec\r", "[ 4] 8.0- 9.0 sec 534 MBytes 4.48 Gbits/sec\r", "[ 4] 9.0-10.0 sec 602 MBytes 5.05 Gbits/sec\r", "[ 4] 0.0-10.0 sec 5.24 GBytes 4.50 Gbits/sec\r", "+ sleep 20\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2197314357800. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2197314367800. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.client.1": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm199680-4000/1/gem5-out.client.1", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm199680-4000/0/gem5-cp.client.1", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm199680-4000/1/cfg.client.1.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm199680-4000/1/nic.pci.client.1.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm199680-4000/1/nic.shm.client.1.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:15:01", "gem5 executing on spyder13, pid 51571", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm199680-4000/1/gem5-out.client.1 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm199680-4000/0/gem5-cp.client.1 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm199680-4000/1/cfg.client.1.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm199680-4000/1/nic.pci.client.1. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm199680-4000/1/nic.shm.client.1. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2198185535200", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.022894] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.022894] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.023894] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.023894] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.030892] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.030892] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.148875] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.149874] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.149874] i40e 0000:00:02.0: MAC address: 08:f6:9b:f8:45:4e\r", "[ 1.149874] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.152874] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.231862] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.231862] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.231862] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.231862] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.327847] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 4000 up\r", "[ 1.335846] i40e 0000:00:02.0 eth0: changing MTU from 1500 to 4000\r", "[ 1.341845] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.4/24 dev eth0\r", "+ sleep 1\r", "+ iperf -w 1M -c 192.168.64.2 -Z dctcp -i 1\r", "------------------------------------------------------------\r", "Client connecting to 192.168.64.2, TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 4] local 192.168.64.4 port 33792 connected with 192.168.64.2 port 5001\r", "[ 2.553661] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 4] 0.0- 1.0 sec 556 MBytes 4.67 Gbits/sec\r", "[ 4] 1.0- 2.0 sec 590 MBytes 4.95 Gbits/sec\r", "[ 4] 2.0- 3.0 sec 558 MBytes 4.68 Gbits/sec\r", "[ 4] 3.0- 4.0 sec 568 MBytes 4.76 Gbits/sec\r", "[ 4] 4.0- 5.0 sec 576 MBytes 4.83 Gbits/sec\r", "[ 4] 5.0- 6.0 sec 568 MBytes 4.76 Gbits/sec\r", "[ 4] 6.0- 7.0 sec 526 MBytes 4.42 Gbits/sec\r", "[ 4] 7.0- 8.0 sec 592 MBytes 4.96 Gbits/sec\r", "[ 4] 8.0- 9.0 sec 560 MBytes 4.70 Gbits/sec\r", "[ 4] 9.0-10.0 sec 495 MBytes 4.15 Gbits/sec\r", "[ 4] 0.0-10.0 sec 5.46 GBytes 4.69 Gbits/sec\r", "+ sleep 2\r", "+ m5 exit\r", "Exiting @ tick 15563040522400 because m5_exit instruction encountered"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2198185525200. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2198185535200. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}}, "success": true}
\ No newline at end of file
results/paper_data/gt-ib-dumbbell-DCTCPm24960-1500-1.json 0 → 100644
View file @ 414f8b28
{"exp_name": "gt-ib-dumbbell-DCTCPm24960-1500", "start_time": 1607019295.0994222, "end_time": 1607055256.120892, "sims": {"nic.server.0.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm24960-1500/1/nic.pci.server.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm24960-1500/1/nic.eth.server.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm24960-1500/1/nic.shm.server.0.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["7e4a76ccaee4", "sync_pci=1 sync_eth=1", "exit main_time: 15670787421000"]}, "nic.server.1.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm24960-1500/1/nic.pci.server.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm24960-1500/1/nic.eth.server.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm24960-1500/1/nic.shm.server.1.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["50fa75ec94e0", "sync_pci=1 sync_eth=1", "exit main_time: 15670787419963"]}, "nic.client.0.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm24960-1500/1/nic.pci.client.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm24960-1500/1/nic.eth.client.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm24960-1500/1/nic.shm.client.0.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["11d060a4c2c4", "sync_pci=1 sync_eth=1", "exit main_time: 15670787439000"]}, "nic.client.1.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm24960-1500/1/nic.pci.client.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm24960-1500/1/nic.eth.client.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm24960-1500/1/nic.shm.client.1.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["64806385a8bc", "sync_pci=1 sync_eth=1", "exit main_time: 15670786594400"]}, "net.": {"class": "NS3DumbbellNet", "cmd": ["/home/hejingli/endhostsim-code/ns-3/cosim-run.sh", "cosim", "cosim-dumbbell-example", "--CosimPortLeft=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm24960-1500/1/nic.eth.server.0.", "--CosimPortLeft=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm24960-1500/1/nic.eth.server.1.", "--CosimPortRight=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm24960-1500/1/nic.eth.client.0.", "--CosimPortRight=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm24960-1500/1/nic.eth.client.1.", "--LinkRate=10Gb/s", "--LinkLatency=500ns", "--EcnTh=24960"], "stdout": [], "stderr": []}, "host.server.0": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm24960-1500/1/gem5-out.server.0", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm24960-1500/0/gem5-cp.server.0", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm24960-1500/1/cfg.server.0.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm24960-1500/1/nic.pci.server.0.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm24960-1500/1/nic.shm.server.0.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:57", "gem5 executing on spyder07, pid 46986", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm24960-1500/1/gem5-out.server.0 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm24960-1500/0/gem5-cp.server.0 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm24960-1500/1/cfg.server.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm24960-1500/1/nic.pci.server.0. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm24960-1500/1/nic.shm.server.0. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2283707562600", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.062889] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.062889] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.062889] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.062889] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.070888] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.070888] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.188870] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.189870] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.189870] i40e 0000:00:02.0: MAC address: e4:ae:cc:76:4a:7e\r", "[ 1.189870] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.191870] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.271857] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.271857] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.271857] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.271857] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.367843] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 1500 up\r", "[ 1.381841] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.1/24 dev eth0\r", "+ iperf -s -w 1M -Z dctcp\r", "------------------------------------------------------------\r", "Server listening on TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 5] local 192.168.64.1 port 5001 connected with 192.168.64.3 port 58188\r", "[ 2.503670] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 5] 0.0-10.0 sec 3.21 GBytes 2.75 Gbits/sec\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2283707552600. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2283707562600. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.server.1": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm24960-1500/1/gem5-out.server.1", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm24960-1500/0/gem5-cp.server.1", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm24960-1500/1/cfg.server.1.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm24960-1500/1/nic.pci.server.1.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm24960-1500/1/nic.shm.server.1.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:57", "gem5 executing on spyder07, pid 46995", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm24960-1500/1/gem5-out.server.1 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm24960-1500/0/gem5-cp.server.1 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm24960-1500/1/cfg.server.1.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm24960-1500/1/nic.pci.server.1. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm24960-1500/1/nic.shm.server.1. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2237035760800", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.044892] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.044892] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.045892] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.045892] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.052891] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.052891] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.170873] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.171872] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.171872] i40e 0000:00:02.0: MAC address: e0:94:ec:75:fa:50\r", "[ 1.171872] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.173872] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.255860] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.255860] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.255860] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.255860] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.351845] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 1500 up\r", "[ 1.365843] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.2/24 dev eth0\r", "+ iperf -s -w 1M -Z dctcp\r", "------------------------------------------------------------\r", "Server listening on TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 5] local 192.168.64.2 port 5001 connected with 192.168.64.4 port 51682\r", "[ 2.474675] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 5] 0.0-10.0 sec 3.22 GBytes 2.76 Gbits/sec\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2237035750800. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2237035760800. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.client.0": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm24960-1500/1/gem5-out.client.0", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm24960-1500/0/gem5-cp.client.0", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm24960-1500/1/cfg.client.0.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm24960-1500/1/nic.pci.client.0.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm24960-1500/1/nic.shm.client.0.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:57", "gem5 executing on spyder07, pid 47006", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm24960-1500/1/gem5-out.client.0 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm24960-1500/0/gem5-cp.client.0 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm24960-1500/1/cfg.client.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm24960-1500/1/nic.pci.client.0. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm24960-1500/1/nic.shm.client.0. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2363247774600", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.103885] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.103885] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.103885] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.103885] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.110884] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.110884] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.229866] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.230866] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.230866] i40e 0000:00:02.0: MAC address: c4:c2:a4:60:d0:11\r", "[ 1.230866] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.232866] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.311854] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.311854] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.311854] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.311854] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.407839] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 1500 up\r", "[ 1.421837] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.3/24 dev eth0\r", "+ sleep 1\r", "+ iperf -w 1M -c 192.168.64.1 -Z dctcp -i 1\r", "------------------------------------------------------------\r", "Client connecting to 192.168.64.1, TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 4] local 192.168.64.3 port 58188 connected with 192.168.64.1 port 5001\r", "[ 2.535668] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 4] 0.0- 1.0 sec 327 MBytes 2.75 Gbits/sec\r", "[ 4] 1.0- 2.0 sec 327 MBytes 2.74 Gbits/sec\r", "[ 4] 2.0- 3.0 sec 328 MBytes 2.75 Gbits/sec\r", "[ 4] 3.0- 4.0 sec 330 MBytes 2.77 Gbits/sec\r", "[ 4] 4.0- 5.0 sec 326 MBytes 2.74 Gbits/sec\r", "[ 4] 5.0- 6.0 sec 329 MBytes 2.76 Gbits/sec\r", "[ 4] 6.0- 7.0 sec 329 MBytes 2.76 Gbits/sec\r", "[ 4] 7.0- 8.0 sec 330 MBytes 2.77 Gbits/sec\r", "[ 4] 8.0- 9.0 sec 327 MBytes 2.74 Gbits/sec\r", "[ 4] 9.0-10.0 sec 330 MBytes 2.77 Gbits/sec\r", "[ 4] 0.0-10.0 sec 3.21 GBytes 2.75 Gbits/sec\r", "+ sleep 20\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2363247764600. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2363247774600. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.client.1": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm24960-1500/1/gem5-out.client.1", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm24960-1500/0/gem5-cp.client.1", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm24960-1500/1/cfg.client.1.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm24960-1500/1/nic.pci.client.1.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm24960-1500/1/nic.shm.client.1.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:57", "gem5 executing on spyder07, pid 47015", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm24960-1500/1/gem5-out.client.1 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm24960-1500/0/gem5-cp.client.1 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm24960-1500/1/cfg.client.1.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm24960-1500/1/nic.pci.client.1. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm24960-1500/1/nic.shm.client.1. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2305359576000", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.070888] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.070888] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.070888] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.070888] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.077887] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.077887] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.195869] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.196869] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.197869] i40e 0000:00:02.0: MAC address: bc:a8:85:63:80:64\r", "[ 1.197869] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.199869] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.279856] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.279856] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.279856] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.279856] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.375842] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 1500 up\r", "[ 1.389840] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.4/24 dev eth0\r", "+ sleep 1\r", "+ iperf -w 1M -c 192.168.64.2 -Z dctcp -i 1\r", "------------------------------------------------------------\r", "Client connecting to 192.168.64.2, TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 4] local 192.168.64.4 port 51682 connected with 192.168.64.2 port 5001\r", "[ 2.508670] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 4] 0.0- 1.0 sec 332 MBytes 2.79 Gbits/sec\r", "[ 4] 1.0- 2.0 sec 330 MBytes 2.77 Gbits/sec\r", "[ 4] 2.0- 3.0 sec 331 MBytes 2.77 Gbits/sec\r", "[ 4] 3.0- 4.0 sec 328 MBytes 2.76 Gbits/sec\r", "[ 4] 4.0- 5.0 sec 329 MBytes 2.76 Gbits/sec\r", "[ 4] 5.0- 6.0 sec 329 MBytes 2.76 Gbits/sec\r", "[ 4] 6.0- 7.0 sec 329 MBytes 2.76 Gbits/sec\r", "[ 4] 7.0- 8.0 sec 330 MBytes 2.76 Gbits/sec\r", "[ 4] 8.0- 9.0 sec 331 MBytes 2.77 Gbits/sec\r", "[ 4] 9.0-10.0 sec 329 MBytes 2.76 Gbits/sec\r", "[ 4] 0.0-10.0 sec 3.22 GBytes 2.77 Gbits/sec\r", "+ sleep 2\r", "+ m5 exit\r", "Exiting @ tick 15670786508600 because m5_exit instruction encountered"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2305359566000. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2305359576000. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}}, "success": true}
\ No newline at end of file
results/paper_data/gt-ib-dumbbell-DCTCPm24960-4000-1.json 0 → 100644
View file @ 414f8b28
{"exp_name": "gt-ib-dumbbell-DCTCPm24960-4000", "start_time": 1607019296.3214254, "end_time": 1607059001.76645, "sims": {"nic.server.0.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm24960-4000/1/nic.pci.server.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm24960-4000/1/nic.eth.server.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm24960-4000/1/nic.shm.server.0.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["668dde828c80", "sync_pci=1 sync_eth=1", "exit main_time: 15508951196000"]}, "nic.server.1.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm24960-4000/1/nic.pci.server.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm24960-4000/1/nic.eth.server.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm24960-4000/1/nic.shm.server.1.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["5604138891b4", "sync_pci=1 sync_eth=1", "exit main_time: 15508951251000"]}, "nic.client.0.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm24960-4000/1/nic.pci.client.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm24960-4000/1/nic.eth.client.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm24960-4000/1/nic.shm.client.0.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["457af97196e8", "sync_pci=1 sync_eth=1", "exit main_time: 15508951217000"]}, "nic.client.1.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm24960-4000/1/nic.pci.client.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm24960-4000/1/nic.eth.client.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm24960-4000/1/nic.shm.client.1.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["34f126979c1c", "sync_pci=1 sync_eth=1", "exit main_time: 15508950718400"]}, "net.": {"class": "NS3DumbbellNet", "cmd": ["/home/hejingli/endhostsim-code/ns-3/cosim-run.sh", "cosim", "cosim-dumbbell-example", "--CosimPortLeft=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm24960-4000/1/nic.eth.server.0.", "--CosimPortLeft=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm24960-4000/1/nic.eth.server.1.", "--CosimPortRight=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm24960-4000/1/nic.eth.client.0.", "--CosimPortRight=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm24960-4000/1/nic.eth.client.1.", "--LinkRate=10Gb/s", "--LinkLatency=500ns", "--EcnTh=24960"], "stdout": [], "stderr": []}, "host.server.0": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm24960-4000/1/gem5-out.server.0", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm24960-4000/0/gem5-cp.server.0", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm24960-4000/1/cfg.server.0.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm24960-4000/1/nic.pci.server.0.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm24960-4000/1/nic.shm.server.0.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:58", "gem5 executing on spyder10, pid 56903", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm24960-4000/1/gem5-out.server.0 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm24960-4000/0/gem5-cp.server.0 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm24960-4000/1/cfg.server.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm24960-4000/1/nic.pci.server.0. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm24960-4000/1/nic.shm.server.0. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2212237546600", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.028894] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.028894] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.028894] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.028894] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.035893] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.035893] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.153875] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.154875] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.155875] i40e 0000:00:02.0: MAC address: 80:8c:82:de:8d:66\r", "[ 1.155875] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.157875] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.239862] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.239862] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.239862] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.239862] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.335848] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 4000 up\r", "[ 1.343846] i40e 0000:00:02.0 eth0: changing MTU from 1500 to 4000\r", "[ 1.349846] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.1/24 dev eth0\r", "+ iperf -s -w 1M -Z dctcp\r", "------------------------------------------------------------\r", "Server listening on TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 5] local 192.168.64.1 port 5001 connected with 192.168.64.3 port 36328\r", "[ 2.771629] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 5] 0.0-10.0 sec 4.27 GBytes 3.67 Gbits/sec\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2212237536600. Starting simulation...", "info: Entering event queue @ 2212237546600. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2212237547600. Starting simulation...", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.server.1": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm24960-4000/1/gem5-out.server.1", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm24960-4000/0/gem5-cp.server.1", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm24960-4000/1/cfg.server.1.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm24960-4000/1/nic.pci.server.1.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm24960-4000/1/nic.shm.server.1.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:58", "gem5 executing on spyder10, pid 56906", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm24960-4000/1/gem5-out.server.1 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm24960-4000/0/gem5-cp.server.1 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm24960-4000/1/cfg.server.1.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm24960-4000/1/nic.pci.server.1. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm24960-4000/1/nic.shm.server.1. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2256412857800", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.038892] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.038892] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.038892] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.038892] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.046891] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.046891] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.164873] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.165873] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.165873] i40e 0000:00:02.0: MAC address: b4:91:88:13:04:56\r", "[ 1.165873] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.167873] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.247860] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.247860] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.247860] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.247860] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.343846] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 4000 up\r", "[ 1.351845] i40e 0000:00:02.0 eth0: changing MTU from 1500 to 4000\r", "[ 1.357844] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.2/24 dev eth0\r", "+ iperf -s -w 1M -Z dctcp\r", "------------------------------------------------------------\r", "Server listening on TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 5] local 192.168.64.2 port 5001 connected with 192.168.64.4 port 51462\r", "[ 2.287702] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 5] 0.0-10.0 sec 4.27 GBytes 3.66 Gbits/sec\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2256412847800. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2256412857800. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14", "warn: PowerState: More than one power state change request encountered within the same simulation tick", "warn: PowerState: More than one power state change request encountered within the same simulation tick"]}, "host.client.0": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm24960-4000/1/gem5-out.client.0", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm24960-4000/0/gem5-cp.client.0", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm24960-4000/1/cfg.client.0.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm24960-4000/1/nic.pci.client.0.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm24960-4000/1/nic.shm.client.0.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:58", "gem5 executing on spyder10, pid 56909", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm24960-4000/1/gem5-out.client.0 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm24960-4000/0/gem5-cp.client.0 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm24960-4000/1/cfg.client.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm24960-4000/1/nic.pci.client.0. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm24960-4000/1/nic.shm.client.0. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2593443296600", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.159878] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.159878] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.159878] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.159878] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.166877] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.166877] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.285858] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.285858] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.286858] i40e 0000:00:02.0: MAC address: e8:96:71:f9:7a:45\r", "[ 1.286858] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.288858] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.367846] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.367846] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.367846] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.367846] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.463831] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 4000 up\r", "[ 1.470830] i40e 0000:00:02.0 eth0: changing MTU from 1500 to 4000\r", "[ 1.476830] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.3/24 dev eth0\r", "+ sleep 1\r", "+ iperf -w 1M -c 192.168.64.1 -Z dctcp -i 1\r", "------------------------------------------------------------\r", "Client connecting to 192.168.64.1, TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 4] local 192.168.64.3 port 36328 connected with 192.168.64.1 port 5001\r", "[ 2.568664] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 4] 0.0- 1.0 sec 432 MBytes 3.63 Gbits/sec\r", "[ 4] 1.0- 2.0 sec 436 MBytes 3.66 Gbits/sec\r", "[ 4] 2.0- 3.0 sec 437 MBytes 3.66 Gbits/sec\r", "[ 4] 3.0- 4.0 sec 436 MBytes 3.66 Gbits/sec\r", "[ 4] 4.0- 5.0 sec 436 MBytes 3.66 Gbits/sec\r", "[ 4] 5.0- 6.0 sec 431 MBytes 3.62 Gbits/sec\r", "[ 4] 6.0- 7.0 sec 440 MBytes 3.69 Gbits/sec\r", "[ 4] 7.0- 8.0 sec 432 MBytes 3.63 Gbits/sec\r", "[ 4] 8.0- 9.0 sec 431 MBytes 3.62 Gbits/sec\r", "[ 4] 9.0-10.0 sec 462 MBytes 3.87 Gbits/sec\r", "[ 4] 0.0-10.0 sec 4.27 GBytes 3.67 Gbits/sec\r", "+ sleep 20\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2593443286600. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2593443296600. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.client.1": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm24960-4000/1/gem5-out.client.1", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm24960-4000/0/gem5-cp.client.1", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm24960-4000/1/cfg.client.1.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm24960-4000/1/nic.pci.client.1.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm24960-4000/1/nic.shm.client.1.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:58", "gem5 executing on spyder10, pid 56910", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm24960-4000/1/gem5-out.client.1 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm24960-4000/0/gem5-cp.client.1 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm24960-4000/1/cfg.client.1.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm24960-4000/1/nic.pci.client.1. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm24960-4000/1/nic.shm.client.1. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2142508620600", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.013895] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.013895] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.013895] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.013895] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.020894] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.020894] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.139876] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.140875] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.140875] i40e 0000:00:02.0: MAC address: 1c:9c:97:26:f1:34\r", "[ 1.140875] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.142875] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.223863] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.223863] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.223863] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.223863] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.319848] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 4000 up\r", "[ 1.327847] i40e 0000:00:02.0 eth0: changing MTU from 1500 to 4000\r", "[ 1.333846] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.4/24 dev eth0\r", "+ sleep 1\r", "+ iperf -w 1M -c 192.168.64.2 -Z dctcp -i 1\r", "------------------------------------------------------------\r", "Client connecting to 192.168.64.2, TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 4] local 192.168.64.4 port 51462 connected with 192.168.64.2 port 5001\r", "[ 2.434679] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 4] 0.0- 1.0 sec 460 MBytes 3.86 Gbits/sec\r", "[ 4] 1.0- 2.0 sec 436 MBytes 3.66 Gbits/sec\r", "[ 4] 2.0- 3.0 sec 429 MBytes 3.60 Gbits/sec\r", "[ 4] 3.0- 4.0 sec 435 MBytes 3.65 Gbits/sec\r", "[ 4] 4.0- 5.0 sec 429 MBytes 3.60 Gbits/sec\r", "[ 4] 5.0- 6.0 sec 437 MBytes 3.66 Gbits/sec\r", "[ 4] 6.0- 7.0 sec 437 MBytes 3.67 Gbits/sec\r", "[ 4] 7.0- 8.0 sec 437 MBytes 3.67 Gbits/sec\r", "[ 4] 8.0- 9.0 sec 436 MBytes 3.66 Gbits/sec\r", "[ 4] 9.0-10.0 sec 437 MBytes 3.66 Gbits/sec\r", "[ 4] 0.0-10.0 sec 4.27 GBytes 3.67 Gbits/sec\r", "+ sleep 2\r", "+ m5 exit\r", "Exiting @ tick 15508950255600 because m5_exit instruction encountered"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2142508610600. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2142508620600. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14", "warn: PowerState: More than one power state change request encountered within the same simulation tick", "warn: PowerState: More than one power state change request encountered within the same simulation tick", "warn: PowerState: More than one power state change request encountered within the same simulation tick", "warn: PowerState: More than one power state change request encountered within the same simulation tick", "warn: PowerState: More than one power state change request encountered within the same simulation tick", "warn: PowerState: More than one power state change request encountered within the same simulation tick"]}}, "success": true}
\ No newline at end of file
results/paper_data/gt-ib-dumbbell-DCTCPm33280-1500-1.json 0 → 100644
View file @ 414f8b28
{"exp_name": "gt-ib-dumbbell-DCTCPm33280-1500", "start_time": 1607019295.0941317, "end_time": 1607055502.4083138, "sims": {"nic.server.0.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm33280-1500/1/nic.pci.server.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm33280-1500/1/nic.eth.server.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm33280-1500/1/nic.shm.server.0.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["3c242d6ac3b8", "sync_pci=1 sync_eth=1", "exit main_time: 15670465421000"]}, "nic.server.1.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm33280-1500/1/nic.pci.server.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm33280-1500/1/nic.eth.server.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm33280-1500/1/nic.shm.server.1.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["2fe76e399f48", "sync_pci=1 sync_eth=1", "exit main_time: 15670465416000"]}, "nic.client.0.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm33280-1500/1/nic.pci.client.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm33280-1500/1/nic.eth.client.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm33280-1500/1/nic.shm.client.0.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["60339759d260", "sync_pci=1 sync_eth=1", "exit main_time: 15670465420000"]}, "nic.client.1.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm33280-1500/1/nic.pci.client.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm33280-1500/1/nic.eth.client.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm33280-1500/1/nic.shm.client.1.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["32e31399b85c", "sync_pci=1 sync_eth=1", "exit main_time: 15670464621400"]}, "net.": {"class": "NS3DumbbellNet", "cmd": ["/home/hejingli/endhostsim-code/ns-3/cosim-run.sh", "cosim", "cosim-dumbbell-example", "--CosimPortLeft=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm33280-1500/1/nic.eth.server.0.", "--CosimPortLeft=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm33280-1500/1/nic.eth.server.1.", "--CosimPortRight=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm33280-1500/1/nic.eth.client.0.", "--CosimPortRight=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm33280-1500/1/nic.eth.client.1.", "--LinkRate=10Gb/s", "--LinkLatency=500ns", "--EcnTh=33280"], "stdout": [], "stderr": []}, "host.server.0": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm33280-1500/1/gem5-out.server.0", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm33280-1500/0/gem5-cp.server.0", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm33280-1500/1/cfg.server.0.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm33280-1500/1/nic.pci.server.0.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm33280-1500/1/nic.shm.server.0.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:57", "gem5 executing on spyder07, pid 46984", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm33280-1500/1/gem5-out.server.0 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm33280-1500/0/gem5-cp.server.0 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm33280-1500/1/cfg.server.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm33280-1500/1/nic.pci.server.0. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm33280-1500/1/nic.shm.server.0. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2240733296200", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.056890] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.056890] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.056890] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.056890] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.064888] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.064888] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.182870] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.183870] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.183870] i40e 0000:00:02.0: MAC address: b8:c3:6a:2d:24:3c\r", "[ 1.183870] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.185870] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.263858] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.263858] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.263858] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.263858] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.359844] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 1500 up\r", "[ 1.373842] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.1/24 dev eth0\r", "+ iperf -s -w 1M -Z dctcp\r", "------------------------------------------------------------\r", "Server listening on TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 5] local 192.168.64.1 port 5001 connected with 192.168.64.3 port 37674\r", "[ 2.482673] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 5] 0.0-10.0 sec 3.30 GBytes 2.83 Gbits/sec\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2240733286200. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2240733296200. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14", "warn: PowerState: More than one power state change request encountered within the same simulation tick", "warn: PowerState: More than one power state change request encountered within the same simulation tick"]}, "host.server.1": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm33280-1500/1/gem5-out.server.1", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm33280-1500/0/gem5-cp.server.1", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm33280-1500/1/cfg.server.1.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm33280-1500/1/nic.pci.server.1.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm33280-1500/1/nic.shm.server.1.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:57", "gem5 executing on spyder07, pid 46994", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm33280-1500/1/gem5-out.server.1 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm33280-1500/0/gem5-cp.server.1 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm33280-1500/1/cfg.server.1.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm33280-1500/1/nic.pci.server.1. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm33280-1500/1/nic.shm.server.1. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2324508654200", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.075888] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.075888] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.075888] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.075888] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.082887] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.082887] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.200869] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.201869] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.202869] i40e 0000:00:02.0: MAC address: 48:9f:39:6e:e7:2f\r", "[ 1.202869] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.204868] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.287856] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.287856] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.287856] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.287856] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.383841] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 1500 up\r", "[ 1.397839] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.2/24 dev eth0\r", "+ iperf -s -w 1M -Z dctcp\r", "------------------------------------------------------------\r", "Server listening on TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 5] local 192.168.64.2 port 5001 connected with 192.168.64.4 port 39320\r", "[ 2.418684] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 5] 0.0-10.0 sec 3.34 GBytes 2.87 Gbits/sec\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2324508644200. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2324508654200. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14", "warn: PowerState: More than one power state change request encountered within the same simulation tick"]}, "host.client.0": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm33280-1500/1/gem5-out.client.0", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm33280-1500/0/gem5-cp.client.0", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm33280-1500/1/cfg.client.0.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm33280-1500/1/nic.pci.client.0.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm33280-1500/1/nic.shm.client.0.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:57", "gem5 executing on spyder07, pid 47000", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm33280-1500/1/gem5-out.client.0 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm33280-1500/0/gem5-cp.client.0 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm33280-1500/1/cfg.client.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm33280-1500/1/nic.pci.client.0. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm33280-1500/1/nic.shm.client.0. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2306933333200", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.071889] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.071889] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.071889] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.071889] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.078888] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.078888] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.197870] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.198870] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.198870] i40e 0000:00:02.0: MAC address: 60:d2:59:97:33:60\r", "[ 1.198870] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.200870] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.279858] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.279858] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.279858] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.279858] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.375843] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 1500 up\r", "[ 1.389841] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.3/24 dev eth0\r", "+ sleep 1\r", "+ iperf -w 1M -c 192.168.64.1 -Z dctcp -i 1\r", "------------------------------------------------------------\r", "Client connecting to 192.168.64.1, TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 4] local 192.168.64.3 port 37674 connected with 192.168.64.1 port 5001\r", "[ 2.526668] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 4] 0.0- 1.0 sec 338 MBytes 2.83 Gbits/sec\r", "[ 4] 1.0- 2.0 sec 335 MBytes 2.81 Gbits/sec\r", "[ 4] 2.0- 3.0 sec 335 MBytes 2.81 Gbits/sec\r", "[ 4] 3.0- 4.0 sec 338 MBytes 2.84 Gbits/sec\r", "[ 4] 4.0- 5.0 sec 341 MBytes 2.86 Gbits/sec\r", "[ 4] 5.0- 6.0 sec 341 MBytes 2.86 Gbits/sec\r", "[ 4] 6.0- 7.0 sec 339 MBytes 2.84 Gbits/sec\r", "[ 4] 7.0- 8.0 sec 340 MBytes 2.85 Gbits/sec\r", "[ 4] 8.0- 9.0 sec 337 MBytes 2.83 Gbits/sec\r", "[ 4] 9.0-10.0 sec 338 MBytes 2.83 Gbits/sec\r", "[ 4] 0.0-10.0 sec 3.30 GBytes 2.84 Gbits/sec\r", "+ sleep 20\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2306933323200. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2306933333200. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.client.1": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm33280-1500/1/gem5-out.client.1", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm33280-1500/0/gem5-cp.client.1", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm33280-1500/1/cfg.client.1.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm33280-1500/1/nic.pci.client.1.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm33280-1500/1/nic.shm.client.1.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:57", "gem5 executing on spyder07, pid 47008", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm33280-1500/1/gem5-out.client.1 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm33280-1500/0/gem5-cp.client.1 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm33280-1500/1/cfg.client.1.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm33280-1500/1/nic.pci.client.1. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm33280-1500/1/nic.shm.client.1. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2307945742400", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.080887] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.080887] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.080887] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.080887] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.087886] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.087886] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.206868] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.207868] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.207868] i40e 0000:00:02.0: MAC address: 5c:b8:99:13:e3:32\r", "[ 1.207868] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.209868] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.287856] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.287856] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.287856] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.287856] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.383841] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 1500 up\r", "[ 1.397839] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.4/24 dev eth0\r", "+ sleep 1\r", "+ iperf -w 1M -c 192.168.64.2 -Z dctcp -i 1\r", "------------------------------------------------------------\r", "Client connecting to 192.168.64.2, TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 4] local 192.168.64.4 port 39320 connected with 192.168.64.2 port 5001\r", "[ 2.515669] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 4] 0.0- 1.0 sec 341 MBytes 2.86 Gbits/sec\r", "[ 4] 1.0- 2.0 sec 346 MBytes 2.90 Gbits/sec\r", "[ 4] 2.0- 3.0 sec 347 MBytes 2.91 Gbits/sec\r", "[ 4] 3.0- 4.0 sec 344 MBytes 2.88 Gbits/sec\r", "[ 4] 4.0- 5.0 sec 338 MBytes 2.84 Gbits/sec\r", "[ 4] 5.0- 6.0 sec 341 MBytes 2.86 Gbits/sec\r", "[ 4] 6.0- 7.0 sec 343 MBytes 2.88 Gbits/sec\r", "[ 4] 7.0- 8.0 sec 340 MBytes 2.85 Gbits/sec\r", "[ 4] 8.0- 9.0 sec 342 MBytes 2.87 Gbits/sec\r", "[ 4] 9.0-10.0 sec 342 MBytes 2.87 Gbits/sec\r", "[ 4] 0.0-10.0 sec 3.34 GBytes 2.87 Gbits/sec\r", "+ sleep 2\r", "+ m5 exit\r", "Exiting @ tick 15670464319400 because m5_exit instruction encountered"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2307945732400. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2307945742400. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}}, "success": true}
\ No newline at end of file
results/paper_data/gt-ib-dumbbell-DCTCPm33280-4000-1.json 0 → 100644
View file @ 414f8b28
{"exp_name": "gt-ib-dumbbell-DCTCPm33280-4000", "start_time": 1607019298.4593778, "end_time": 1607058869.5145528, "sims": {"nic.server.0.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm33280-4000/1/nic.pci.server.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm33280-4000/1/nic.eth.server.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm33280-4000/1/nic.shm.server.0.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["9db7e4f2ec8", "sync_pci=1 sync_eth=1", "exit main_time: 15633576968000"]}, "nic.server.1.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm33280-4000/1/nic.pci.server.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm33280-4000/1/nic.eth.server.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm33280-4000/1/nic.shm.server.1.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["2aee40da2460", "sync_pci=1 sync_eth=1", "exit main_time: 15633576944000"]}, "nic.client.0.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm33280-4000/1/nic.pci.client.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm33280-4000/1/nic.eth.client.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm33280-4000/1/nic.shm.client.0.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["1a64a9402994", "sync_pci=1 sync_eth=1", "exit main_time: 15633576932000"]}, "nic.client.1.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm33280-4000/1/nic.pci.client.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm33280-4000/1/nic.eth.client.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm33280-4000/1/nic.shm.client.1.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["47b52aa14398", "sync_pci=1 sync_eth=1", "exit main_time: 15633576092400"]}, "net.": {"class": "NS3DumbbellNet", "cmd": ["/home/hejingli/endhostsim-code/ns-3/cosim-run.sh", "cosim", "cosim-dumbbell-example", "--CosimPortLeft=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm33280-4000/1/nic.eth.server.0.", "--CosimPortLeft=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm33280-4000/1/nic.eth.server.1.", "--CosimPortRight=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm33280-4000/1/nic.eth.client.0.", "--CosimPortRight=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm33280-4000/1/nic.eth.client.1.", "--LinkRate=10Gb/s", "--LinkLatency=500ns", "--EcnTh=33280"], "stdout": [], "stderr": []}, "host.server.0": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm33280-4000/1/gem5-out.server.0", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm33280-4000/0/gem5-cp.server.0", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm33280-4000/1/cfg.server.0.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm33280-4000/1/nic.pci.server.0.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm33280-4000/1/nic.shm.server.0.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:15:00", "gem5 executing on spyder11, pid 51340", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm33280-4000/1/gem5-out.server.0 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm33280-4000/0/gem5-cp.server.0 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm33280-4000/1/cfg.server.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm33280-4000/1/nic.pci.server.0. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm33280-4000/1/nic.shm.server.0. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2332632398200", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.063891] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.063891] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.063891] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.063891] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.070889] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.070889] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.189871] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.190871] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.190871] i40e 0000:00:02.0: MAC address: c8:2e:4f:7e:db:09\r", "[ 1.190871] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.192871] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.271859] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.271859] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.271859] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.271859] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.367844] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 4000 up\r", "[ 1.375843] i40e 0000:00:02.0 eth0: changing MTU from 1500 to 4000\r", "[ 1.381842] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.1/24 dev eth0\r", "+ iperf -s -w 1M -Z dctcp\r", "------------------------------------------------------------\r", "Server listening on TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 5] local 192.168.64.1 port 5001 connected with 192.168.64.3 port 57788\r", "[ 2.357694] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 5] 0.0-10.0 sec 4.42 GBytes 3.79 Gbits/sec\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2332632388200. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2332632398200. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14", "warn: PowerState: More than one power state change request encountered within the same simulation tick"]}, "host.server.1": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm33280-4000/1/gem5-out.server.1", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm33280-4000/0/gem5-cp.server.1", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm33280-4000/1/cfg.server.1.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm33280-4000/1/nic.pci.server.1.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm33280-4000/1/nic.shm.server.1.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:15:00", "gem5 executing on spyder11, pid 51344", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm33280-4000/1/gem5-out.server.1 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm33280-4000/0/gem5-cp.server.1 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm33280-4000/1/cfg.server.1.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm33280-4000/1/nic.pci.server.1. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm33280-4000/1/nic.shm.server.1. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2297697049400", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.055890] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.055890] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.055890] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.055890] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.062889] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.062889] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.180871] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.181871] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.182871] i40e 0000:00:02.0: MAC address: 60:24:da:40:ee:2a\r", "[ 1.182871] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.184871] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.263859] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.263859] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.263859] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.263859] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.359844] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 4000 up\r", "[ 1.367843] i40e 0000:00:02.0 eth0: changing MTU from 1500 to 4000\r", "[ 1.373842] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.2/24 dev eth0\r", "+ iperf -s -w 1M -Z dctcp\r", "------------------------------------------------------------\r", "Server listening on TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 5] local 192.168.64.2 port 5001 connected with 192.168.64.4 port 41042\r", "[ 2.393687] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 5] 0.0-10.0 sec 4.45 GBytes 3.82 Gbits/sec\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2297697039400. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2297697049400. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.client.0": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm33280-4000/1/gem5-out.client.0", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm33280-4000/0/gem5-cp.client.0", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm33280-4000/1/cfg.client.0.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm33280-4000/1/nic.pci.client.0.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm33280-4000/1/nic.shm.client.0.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:15:00", "gem5 executing on spyder11, pid 51348", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm33280-4000/1/gem5-out.client.0 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm33280-4000/0/gem5-cp.client.0 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm33280-4000/1/cfg.client.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm33280-4000/1/nic.pci.client.0. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm33280-4000/1/nic.shm.client.0. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2260005048000", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.041891] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.042891] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.042891] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.042891] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.049890] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.049890] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.167872] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.168872] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.168872] i40e 0000:00:02.0: MAC address: 94:29:40:a9:64:1a\r", "[ 1.169872] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.171871] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.255858] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.255858] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.255858] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.255858] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.351844] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 4000 up\r", "[ 1.359843] i40e 0000:00:02.0 eth0: changing MTU from 1500 to 4000\r", "[ 1.365842] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.3/24 dev eth0\r", "+ sleep 1\r", "+ iperf -w 1M -c 192.168.64.1 -Z dctcp -i 1\r", "------------------------------------------------------------\r", "Client connecting to 192.168.64.1, TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 4] local 192.168.64.3 port 57788 connected with 192.168.64.1 port 5001\r", "[ 2.466674] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 4] 0.0- 1.0 sec 452 MBytes 3.79 Gbits/sec\r", "[ 4] 1.0- 2.0 sec 452 MBytes 3.79 Gbits/sec\r", "[ 4] 2.0- 3.0 sec 452 MBytes 3.79 Gbits/sec\r", "[ 4] 3.0- 4.0 sec 455 MBytes 3.82 Gbits/sec\r", "[ 4] 4.0- 5.0 sec 452 MBytes 3.79 Gbits/sec\r", "[ 4] 5.0- 6.0 sec 451 MBytes 3.78 Gbits/sec\r", "[ 4] 6.0- 7.0 sec 455 MBytes 3.81 Gbits/sec\r", "[ 4] 7.0- 8.0 sec 447 MBytes 3.75 Gbits/sec\r", "[ 4] 8.0- 9.0 sec 453 MBytes 3.80 Gbits/sec\r", "[ 4] 9.0-10.0 sec 455 MBytes 3.81 Gbits/sec\r", "[ 4] 0.0-10.0 sec 4.42 GBytes 3.79 Gbits/sec\r", "+ sleep 20\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2260005038000. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2260005048000. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.client.1": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm33280-4000/1/gem5-out.client.1", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm33280-4000/0/gem5-cp.client.1", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm33280-4000/1/cfg.client.1.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm33280-4000/1/nic.pci.client.1.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm33280-4000/1/nic.shm.client.1.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:15:00", "gem5 executing on spyder11, pid 51350", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm33280-4000/1/gem5-out.client.1 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm33280-4000/0/gem5-cp.client.1 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm33280-4000/1/cfg.client.1.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm33280-4000/1/nic.pci.client.1. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm33280-4000/1/nic.shm.client.1. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2273533070000", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.063890] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.063890] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.063890] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.063890] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.071888] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.071888] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.189870] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.190870] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.190870] i40e 0000:00:02.0: MAC address: 98:43:a1:2a:b5:47\r", "[ 1.190870] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.192870] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.271858] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.271858] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.271858] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.271858] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.367843] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 4000 up\r", "[ 1.375842] i40e 0000:00:02.0 eth0: changing MTU from 1500 to 4000\r", "[ 1.381841] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.4/24 dev eth0\r", "+ sleep 1\r", "+ iperf -w 1M -c 192.168.64.2 -Z dctcp -i 1\r", "------------------------------------------------------------\r", "Client connecting to 192.168.64.2, TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 4] local 192.168.64.4 port 41042 connected with 192.168.64.2 port 5001\r", "[ 2.487673] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 4] 0.0- 1.0 sec 458 MBytes 3.84 Gbits/sec\r", "[ 4] 1.0- 2.0 sec 454 MBytes 3.81 Gbits/sec\r", "[ 4] 2.0- 3.0 sec 456 MBytes 3.83 Gbits/sec\r", "[ 4] 3.0- 4.0 sec 453 MBytes 3.80 Gbits/sec\r", "[ 4] 4.0- 5.0 sec 456 MBytes 3.82 Gbits/sec\r", "[ 4] 5.0- 6.0 sec 458 MBytes 3.84 Gbits/sec\r", "[ 4] 6.0- 7.0 sec 456 MBytes 3.83 Gbits/sec\r", "[ 4] 7.0- 8.0 sec 461 MBytes 3.87 Gbits/sec\r", "[ 4] 8.0- 9.0 sec 453 MBytes 3.80 Gbits/sec\r", "[ 4] 9.0-10.0 sec 456 MBytes 3.82 Gbits/sec\r", "[ 4] 0.0-10.0 sec 4.45 GBytes 3.82 Gbits/sec\r", "+ sleep 2\r", "+ m5 exit\r", "Exiting @ tick 15633575675600 because m5_exit instruction encountered"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2273533060000. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2273533070000. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}}, "success": true}
\ No newline at end of file
results/paper_data/gt-ib-dumbbell-DCTCPm41600-1500-1.json 0 → 100644
View file @ 414f8b28
{"exp_name": "gt-ib-dumbbell-DCTCPm41600-1500", "start_time": 1607019295.099503, "end_time": 1607057320.119776, "sims": {"nic.server.0.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm41600-1500/1/nic.pci.server.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm41600-1500/1/nic.eth.server.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm41600-1500/1/nic.shm.server.0.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["ed4284aa9b0", "sync_pci=1 sync_eth=1", "exit main_time: 15500631947000"]}, "nic.server.1.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm41600-1500/1/nic.pci.server.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm41600-1500/1/nic.eth.server.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm41600-1500/1/nic.shm.server.1.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["3f20fdc4dccc", "sync_pci=1 sync_eth=1", "exit main_time: 15500631952000"]}, "nic.client.0.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm41600-1500/1/nic.pci.client.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm41600-1500/1/nic.eth.client.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm41600-1500/1/nic.shm.client.0.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["436cd4f0b328", "sync_pci=1 sync_eth=1", "exit main_time: 15500631976000"]}, "nic.client.1.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm41600-1500/1/nic.pci.client.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm41600-1500/1/nic.eth.client.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm41600-1500/1/nic.shm.client.1.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["372fe6a58eb8", "sync_pci=1 sync_eth=1", "exit main_time: 15500631392400"]}, "net.": {"class": "NS3DumbbellNet", "cmd": ["/home/hejingli/endhostsim-code/ns-3/cosim-run.sh", "cosim", "cosim-dumbbell-example", "--CosimPortLeft=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm41600-1500/1/nic.eth.server.0.", "--CosimPortLeft=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm41600-1500/1/nic.eth.server.1.", "--CosimPortRight=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm41600-1500/1/nic.eth.client.0.", "--CosimPortRight=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm41600-1500/1/nic.eth.client.1.", "--LinkRate=10Gb/s", "--LinkLatency=500ns", "--EcnTh=41600"], "stdout": [], "stderr": []}, "host.server.0": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm41600-1500/1/gem5-out.server.0", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm41600-1500/0/gem5-cp.server.0", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm41600-1500/1/cfg.server.0.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm41600-1500/1/nic.pci.server.0.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm41600-1500/1/nic.shm.server.0.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:57", "gem5 executing on spyder07, pid 47014", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm41600-1500/1/gem5-out.server.0 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm41600-1500/0/gem5-cp.server.0 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm41600-1500/1/cfg.server.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm41600-1500/1/nic.pci.server.0. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm41600-1500/1/nic.shm.server.0. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2110267910200", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.006896] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.006896] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.006896] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.006896] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.013895] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.013895] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.132877] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.133877] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.133877] i40e 0000:00:02.0: MAC address: b0:a9:4a:28:d4:0e\r", "[ 1.133877] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.135877] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.215865] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.215865] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.215865] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.215865] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.311850] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 1500 up\r", "[ 1.325848] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.1/24 dev eth0\r", "+ iperf -s -w 1M -Z dctcp\r", "------------------------------------------------------------\r", "Server listening on TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 5] local 192.168.64.1 port 5001 connected with 192.168.64.3 port 38812\r", "[ 3.125574] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 5] 0.0-10.0 sec 3.46 GBytes 2.97 Gbits/sec\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2110267900200. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2110267910200. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.server.1": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm41600-1500/1/gem5-out.server.1", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm41600-1500/0/gem5-cp.server.1", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm41600-1500/1/cfg.server.1.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm41600-1500/1/nic.pci.server.1.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm41600-1500/1/nic.shm.server.1.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:57", "gem5 executing on spyder07, pid 47022", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm41600-1500/1/gem5-out.server.1 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm41600-1500/0/gem5-cp.server.1 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm41600-1500/1/cfg.server.1.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm41600-1500/1/nic.pci.server.1. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm41600-1500/1/nic.shm.server.1. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2122551834800", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.031894] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.031894] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.031894] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.031894] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.038893] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.038893] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.157875] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.158875] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.158875] i40e 0000:00:02.0: MAC address: cc:dc:c4:fd:20:3f\r", "[ 1.158875] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.160874] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.239862] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.239862] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.239862] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.239862] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.335848] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 1500 up\r", "[ 1.349846] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.2/24 dev eth0\r", "+ iperf -s -w 1M -Z dctcp\r", "------------------------------------------------------------\r", "Server listening on TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 5] local 192.168.64.2 port 5001 connected with 192.168.64.4 port 59470\r", "[ 2.403685] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 5] 0.0-10.0 sec 3.44 GBytes 2.95 Gbits/sec\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2122551824800. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2122551834800. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.client.0": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm41600-1500/1/gem5-out.client.0", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm41600-1500/0/gem5-cp.client.0", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm41600-1500/1/cfg.client.0.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm41600-1500/1/nic.pci.client.0.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm41600-1500/1/nic.shm.client.0.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:57", "gem5 executing on spyder07, pid 47025", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm41600-1500/1/gem5-out.client.0 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm41600-1500/0/gem5-cp.client.0 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm41600-1500/1/cfg.client.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm41600-1500/1/nic.pci.client.0. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm41600-1500/1/nic.shm.client.0. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2865173956200", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.219869] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.219869] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.219869] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.220869] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.226868] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.226868] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.345850] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.346850] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.346850] i40e 0000:00:02.0: MAC address: 28:b3:f0:d4:6c:43\r", "[ 1.346850] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.348849] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.431837] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.431837] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.431837] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.431837] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.527822] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 1500 up\r", "[ 1.539820] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.3/24 dev eth0\r", "+ sleep 1\r", "+ iperf -w 1M -c 192.168.64.1 -Z dctcp -i 1\r", "------------------------------------------------------------\r", "Client connecting to 192.168.64.1, TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 4] local 192.168.64.3 port 38812 connected with 192.168.64.1 port 5001\r", "[ 2.670648] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 4] 0.0- 1.0 sec 350 MBytes 2.94 Gbits/sec\r", "[ 4] 1.0- 2.0 sec 350 MBytes 2.94 Gbits/sec\r", "[ 4] 2.0- 3.0 sec 352 MBytes 2.95 Gbits/sec\r", "[ 4] 3.0- 4.0 sec 349 MBytes 2.93 Gbits/sec\r", "[ 4] 4.0- 5.0 sec 349 MBytes 2.93 Gbits/sec\r", "[ 4] 5.0- 6.0 sec 354 MBytes 2.97 Gbits/sec\r", "[ 4] 6.0- 7.0 sec 354 MBytes 2.97 Gbits/sec\r", "[ 4] 7.0- 8.0 sec 352 MBytes 2.95 Gbits/sec\r", "[ 4] 8.0- 9.0 sec 352 MBytes 2.95 Gbits/sec\r", "[ 4] 9.0-10.0 sec 386 MBytes 3.23 Gbits/sec\r", "[ 4] 0.0-10.0 sec 3.46 GBytes 2.97 Gbits/sec\r", "+ sleep 20\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2865173946200. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2865173956200. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.client.1": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm41600-1500/1/gem5-out.client.1", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm41600-1500/0/gem5-cp.client.1", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm41600-1500/1/cfg.client.1.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm41600-1500/1/nic.pci.client.1.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm41600-1500/1/nic.shm.client.1.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:57", "gem5 executing on spyder07, pid 47026", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm41600-1500/1/gem5-out.client.1 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm41600-1500/0/gem5-cp.client.1 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm41600-1500/1/cfg.client.1.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm41600-1500/1/nic.pci.client.1. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm41600-1500/1/nic.shm.client.1. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2134423754200", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.029894] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.029894] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.029894] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.029894] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.036893] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.037893] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.155875] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.156875] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.156875] i40e 0000:00:02.0: MAC address: b8:8e:a5:e6:2f:37\r", "[ 1.156875] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.158875] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.239863] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.239863] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.239863] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.239863] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.335848] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 1500 up\r", "[ 1.349846] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.4/24 dev eth0\r", "+ sleep 1\r", "+ iperf -w 1M -c 192.168.64.2 -Z dctcp -i 1\r", "------------------------------------------------------------\r", "Client connecting to 192.168.64.2, TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 4] local 192.168.64.4 port 59470 connected with 192.168.64.2 port 5001\r", "[ 2.500671] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 4] 0.0- 1.0 sec 382 MBytes 3.20 Gbits/sec\r", "[ 4] 1.0- 2.0 sec 350 MBytes 2.93 Gbits/sec\r", "[ 4] 2.0- 3.0 sec 349 MBytes 2.93 Gbits/sec\r", "[ 4] 3.0- 4.0 sec 351 MBytes 2.94 Gbits/sec\r", "[ 4] 4.0- 5.0 sec 350 MBytes 2.93 Gbits/sec\r", "[ 4] 5.0- 6.0 sec 352 MBytes 2.95 Gbits/sec\r", "[ 4] 6.0- 7.0 sec 346 MBytes 2.90 Gbits/sec\r", "[ 4] 7.0- 8.0 sec 349 MBytes 2.92 Gbits/sec\r", "[ 4] 8.0- 9.0 sec 347 MBytes 2.91 Gbits/sec\r", "[ 4] 9.0-10.0 sec 348 MBytes 2.92 Gbits/sec\r", "[ 4] 0.0-10.0 sec 3.44 GBytes 2.95 Gbits/sec\r", "+ sleep 2\r", "+ m5 exit\r", "Exiting @ tick 15500631015200 because m5_exit instruction encountered"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2134423744200. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2134423754200. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}}, "success": true}
\ No newline at end of file
results/paper_data/gt-ib-dumbbell-DCTCPm41600-4000-1.json 0 → 100644
View file @ 414f8b28
{"exp_name": "gt-ib-dumbbell-DCTCPm41600-4000", "start_time": 1607019298.4170265, "end_time": 1607054638.7164066, "sims": {"nic.server.0.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm41600-4000/1/nic.pci.server.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm41600-4000/1/nic.eth.server.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm41600-4000/1/nic.shm.server.0.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["21ad58aa1904", "sync_pci=1 sync_eth=1", "exit main_time: 15663714804000"]}, "nic.server.1.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm41600-4000/1/nic.pci.server.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm41600-4000/1/nic.eth.server.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm41600-4000/1/nic.shm.server.1.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["2deab8783d70", "sync_pci=1 sync_eth=1", "exit main_time: 15663714751000"]}, "nic.client.0.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm41600-4000/1/nic.pci.client.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm41600-4000/1/nic.eth.client.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm41600-4000/1/nic.shm.client.0.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["6bc46dd25244", "sync_pci=1 sync_eth=1", "exit main_time: 15663714734000"]}, "nic.client.1.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm41600-4000/1/nic.pci.client.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm41600-4000/1/nic.eth.client.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm41600-4000/1/nic.shm.client.1.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["5b3abb785778", "sync_pci=1 sync_eth=1", "exit main_time: 15663713913400"]}, "net.": {"class": "NS3DumbbellNet", "cmd": ["/home/hejingli/endhostsim-code/ns-3/cosim-run.sh", "cosim", "cosim-dumbbell-example", "--CosimPortLeft=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm41600-4000/1/nic.eth.server.0.", "--CosimPortLeft=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm41600-4000/1/nic.eth.server.1.", "--CosimPortRight=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm41600-4000/1/nic.eth.client.0.", "--CosimPortRight=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm41600-4000/1/nic.eth.client.1.", "--LinkRate=10Gb/s", "--LinkLatency=500ns", "--EcnTh=41600"], "stdout": [], "stderr": []}, "host.server.0": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm41600-4000/1/gem5-out.server.0", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm41600-4000/0/gem5-cp.server.0", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm41600-4000/1/cfg.server.0.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm41600-4000/1/nic.pci.server.0.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm41600-4000/1/nic.shm.server.0.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:15:00", "gem5 executing on spyder11, pid 51320", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm41600-4000/1/gem5-out.server.0 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm41600-4000/0/gem5-cp.server.0 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm41600-4000/1/cfg.server.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm41600-4000/1/nic.pci.server.0. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm41600-4000/1/nic.shm.server.0. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2199304936600", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.053891] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.053891] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.053891] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.053891] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.061890] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.061890] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.179872] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.180872] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.180872] i40e 0000:00:02.0: MAC address: 04:19:aa:58:ad:21\r", "[ 1.180872] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.182872] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.263859] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.263859] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.263859] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.263859] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.359845] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 4000 up\r", "[ 1.367844] i40e 0000:00:02.0 eth0: changing MTU from 1500 to 4000\r", "[ 1.373843] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.1/24 dev eth0\r", "+ iperf -s -w 1M -Z dctcp\r", "------------------------------------------------------------\r", "Server listening on TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 5] local 192.168.64.1 port 5001 connected with 192.168.64.3 port 57842\r", "[ 2.483674] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 5] 0.0-10.0 sec 4.59 GBytes 3.94 Gbits/sec\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2199304926600. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2199304936600. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14", "warn: PowerState: More than one power state change request encountered within the same simulation tick"]}, "host.server.1": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm41600-4000/1/gem5-out.server.1", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm41600-4000/0/gem5-cp.server.1", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm41600-4000/1/cfg.server.1.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm41600-4000/1/nic.pci.server.1.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm41600-4000/1/nic.shm.server.1.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:15:00", "gem5 executing on spyder11, pid 51325", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm41600-4000/1/gem5-out.server.1 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm41600-4000/0/gem5-cp.server.1 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm41600-4000/1/cfg.server.1.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm41600-4000/1/nic.pci.server.1. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm41600-4000/1/nic.shm.server.1. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2325148023600", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.067890] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.067890] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.068889] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.068889] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.075888] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.075888] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.193870] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.194870] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.194870] i40e 0000:00:02.0: MAC address: 70:3d:78:b8:ea:2d\r", "[ 1.194870] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.197870] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.279857] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.279857] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.279857] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.279857] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.375843] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 4000 up\r", "[ 1.383842] i40e 0000:00:02.0 eth0: changing MTU from 1500 to 4000\r", "[ 1.389841] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.2/24 dev eth0\r", "+ iperf -s -w 1M -Z dctcp\r", "------------------------------------------------------------\r", "Server listening on TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 5] local 192.168.64.2 port 5001 connected with 192.168.64.4 port 47148\r", "[ 2.403687] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 5] 0.0-10.0 sec 4.57 GBytes 3.92 Gbits/sec\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2325148013600. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2325148023600. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.client.0": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm41600-4000/1/gem5-out.client.0", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm41600-4000/0/gem5-cp.client.0", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm41600-4000/1/cfg.client.0.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm41600-4000/1/nic.pci.client.0.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm41600-4000/1/nic.shm.client.0.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:15:00", "gem5 executing on spyder11, pid 51333", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm41600-4000/1/gem5-out.client.0 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm41600-4000/0/gem5-cp.client.0 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm41600-4000/1/cfg.client.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm41600-4000/1/nic.pci.client.0. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm41600-4000/1/nic.shm.client.0. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2269292039200", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.053891] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.053891] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.053891] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.053891] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.060890] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.060890] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.179872] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.179872] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.180872] i40e 0000:00:02.0: MAC address: 44:52:d2:6d:c4:6b\r", "[ 1.180872] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.182871] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.263859] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.263859] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.263859] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.263859] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.359844] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 4000 up\r", "[ 1.367843] i40e 0000:00:02.0 eth0: changing MTU from 1500 to 4000\r", "[ 1.373842] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.3/24 dev eth0\r", "+ sleep 1\r", "+ iperf -w 1M -c 192.168.64.1 -Z dctcp -i 1\r", "------------------------------------------------------------\r", "Client connecting to 192.168.64.1, TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 4] local 192.168.64.3 port 57842 connected with 192.168.64.1 port 5001\r", "[ 2.483673] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 4] 0.0- 1.0 sec 473 MBytes 3.97 Gbits/sec\r", "[ 4] 1.0- 2.0 sec 465 MBytes 3.90 Gbits/sec\r", "[ 4] 2.0- 3.0 sec 471 MBytes 3.95 Gbits/sec\r", "[ 4] 3.0- 4.0 sec 471 MBytes 3.95 Gbits/sec\r", "[ 4] 4.0- 5.0 sec 467 MBytes 3.92 Gbits/sec\r", "[ 4] 5.0- 6.0 sec 468 MBytes 3.92 Gbits/sec\r", "[ 4] 6.0- 7.0 sec 473 MBytes 3.97 Gbits/sec\r", "[ 4] 7.0- 8.0 sec 471 MBytes 3.95 Gbits/sec\r", "[ 4] 8.0- 9.0 sec 465 MBytes 3.90 Gbits/sec\r", "[ 4] 9.0-10.0 sec 474 MBytes 3.98 Gbits/sec\r", "[ 4] 0.0-10.0 sec 4.59 GBytes 3.94 Gbits/sec\r", "+ sleep 20\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2269292029200. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2269292039200. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.client.1": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm41600-4000/1/gem5-out.client.1", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm41600-4000/0/gem5-cp.client.1", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm41600-4000/1/cfg.client.1.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm41600-4000/1/nic.pci.client.1.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm41600-4000/1/nic.shm.client.1.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:15:00", "gem5 executing on spyder11, pid 51338", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm41600-4000/1/gem5-out.client.1 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm41600-4000/0/gem5-cp.client.1 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm41600-4000/1/cfg.client.1.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm41600-4000/1/nic.pci.client.1. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm41600-4000/1/nic.shm.client.1. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2296156594200", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.068890] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.068890] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.068890] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.068890] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.075889] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.075889] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.193871] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.194871] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.194871] i40e 0000:00:02.0: MAC address: 78:57:78:bb:3a:5b\r", "[ 1.194871] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.197870] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.279858] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.279858] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.279858] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.279858] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.375843] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 4000 up\r", "[ 1.383842] i40e 0000:00:02.0 eth0: changing MTU from 1500 to 4000\r", "[ 1.389841] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.4/24 dev eth0\r", "+ sleep 1\r", "+ iperf -w 1M -c 192.168.64.2 -Z dctcp -i 1\r", "------------------------------------------------------------\r", "Client connecting to 192.168.64.2, TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 4] local 192.168.64.4 port 47148 connected with 192.168.64.2 port 5001\r", "[ 2.494673] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 4] 0.0- 1.0 sec 465 MBytes 3.90 Gbits/sec\r", "[ 4] 1.0- 2.0 sec 473 MBytes 3.97 Gbits/sec\r", "[ 4] 2.0- 3.0 sec 465 MBytes 3.90 Gbits/sec\r", "[ 4] 3.0- 4.0 sec 465 MBytes 3.90 Gbits/sec\r", "[ 4] 4.0- 5.0 sec 470 MBytes 3.94 Gbits/sec\r", "[ 4] 5.0- 6.0 sec 470 MBytes 3.94 Gbits/sec\r", "[ 4] 6.0- 7.0 sec 468 MBytes 3.92 Gbits/sec\r", "[ 4] 7.0- 8.0 sec 466 MBytes 3.91 Gbits/sec\r", "[ 4] 8.0- 9.0 sec 470 MBytes 3.95 Gbits/sec\r", "[ 4] 9.0-10.0 sec 468 MBytes 3.92 Gbits/sec\r", "[ 4] 0.0-10.0 sec 4.57 GBytes 3.92 Gbits/sec\r", "+ sleep 2\r", "+ m5 exit\r", "Exiting @ tick 15663713835400 because m5_exit instruction encountered"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2296156584200. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2296156594200. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14", "warn: PowerState: More than one power state change request encountered within the same simulation tick"]}}, "success": true}
\ No newline at end of file
results/paper_data/gt-ib-dumbbell-DCTCPm49920-1500-1.json 0 → 100644
View file @ 414f8b28
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results/paper_data/gt-ib-dumbbell-DCTCPm49920-4000-1.json 0 → 100644
View file @ 414f8b28
{"exp_name": "gt-ib-dumbbell-DCTCPm49920-4000", "start_time": 1607019298.4105203, "end_time": 1607060989.6461651, "sims": {"nic.server.0.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm49920-4000/1/nic.pci.server.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm49920-4000/1/nic.eth.server.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm49920-4000/1/nic.shm.server.0.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["470ce22ae4f4", "sync_pci=1 sync_eth=1", "exit main_time: 15680548817000"]}, "nic.server.1.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm49920-4000/1/nic.pci.server.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm49920-4000/1/nic.eth.server.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm49920-4000/1/nic.shm.server.1.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["42c0ffe70e98", "sync_pci=1 sync_eth=1", "exit main_time: 15680548828000"]}, "nic.client.0.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm49920-4000/1/nic.pci.client.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm49920-4000/1/nic.eth.client.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm49920-4000/1/nic.shm.client.0.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["9a0a79236c", "sync_pci=1 sync_eth=1", "exit main_time: 15680548813000"]}, "nic.client.1.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm49920-4000/1/nic.pci.client.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm49920-4000/1/nic.eth.client.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm49920-4000/1/nic.shm.client.1.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["3e741293383c", "sync_pci=1 sync_eth=1", "exit main_time: 15680548302400"]}, "net.": {"class": "NS3DumbbellNet", "cmd": ["/home/hejingli/endhostsim-code/ns-3/cosim-run.sh", "cosim", "cosim-dumbbell-example", "--CosimPortLeft=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm49920-4000/1/nic.eth.server.0.", "--CosimPortLeft=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm49920-4000/1/nic.eth.server.1.", "--CosimPortRight=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm49920-4000/1/nic.eth.client.0.", "--CosimPortRight=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm49920-4000/1/nic.eth.client.1.", "--LinkRate=10Gb/s", "--LinkLatency=500ns", "--EcnTh=49920"], "stdout": [], "stderr": []}, "host.server.0": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm49920-4000/1/gem5-out.server.0", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm49920-4000/0/gem5-cp.server.0", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm49920-4000/1/cfg.server.0.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm49920-4000/1/nic.pci.server.0.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm49920-4000/1/nic.shm.server.0.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:15:00", "gem5 executing on spyder11, pid 51317", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm49920-4000/1/gem5-out.server.0 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm49920-4000/0/gem5-cp.server.0 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm49920-4000/1/cfg.server.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm49920-4000/1/nic.pci.server.0. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm49920-4000/1/nic.shm.server.0. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2179399558000", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.028894] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.028894] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.028894] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.028894] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.035893] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.035893] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.154875] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.155875] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.155875] i40e 0000:00:02.0: MAC address: f4:e4:2a:e2:0c:47\r", "[ 1.155875] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.157874] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.239862] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.239862] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.239862] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.239862] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.335847] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 4000 up\r", "[ 1.343846] i40e 0000:00:02.0 eth0: changing MTU from 1500 to 4000\r", "[ 1.349845] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.1/24 dev eth0\r", "+ iperf -s -w 1M -Z dctcp\r", "------------------------------------------------------------\r", "Server listening on TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 5] local 192.168.64.1 port 5001 connected with 192.168.64.3 port 36330\r", "[ 2.507669] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 5] 0.0-10.0 sec 4.70 GBytes 4.03 Gbits/sec\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2179399548000. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2179399558000. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.server.1": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm49920-4000/1/gem5-out.server.1", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm49920-4000/0/gem5-cp.server.1", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm49920-4000/1/cfg.server.1.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm49920-4000/1/nic.pci.server.1.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm49920-4000/1/nic.shm.server.1.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:15:00", "gem5 executing on spyder11, pid 51324", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm49920-4000/1/gem5-out.server.1 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm49920-4000/0/gem5-cp.server.1 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm49920-4000/1/cfg.server.1.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm49920-4000/1/nic.pci.server.1. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm49920-4000/1/nic.shm.server.1. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2329817696400", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.071889] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.071889] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.071889] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.071889] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.078888] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.078888] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.197870] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.198870] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.198870] i40e 0000:00:02.0: MAC address: 98:0e:e7:ff:c0:42\r", "[ 1.198870] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.200869] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.279857] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.279857] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.279857] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.279857] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.375843] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 4000 up\r", "[ 1.383841] i40e 0000:00:02.0 eth0: changing MTU from 1500 to 4000\r", "[ 1.389841] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.2/24 dev eth0\r", "+ iperf -s -w 1M -Z dctcp\r", "------------------------------------------------------------\r", "Server listening on TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 5] local 192.168.64.2 port 5001 connected with 192.168.64.4 port 59142\r", "[ 2.423683] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 5] 0.0-10.0 sec 4.70 GBytes 4.03 Gbits/sec\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2329817686400. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2329817696400. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.client.0": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm49920-4000/1/gem5-out.client.0", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm49920-4000/0/gem5-cp.client.0", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm49920-4000/1/cfg.client.0.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm49920-4000/1/nic.pci.client.0.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm49920-4000/1/nic.shm.client.0.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:15:00", "gem5 executing on spyder11, pid 51330", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm49920-4000/1/gem5-out.client.0 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm49920-4000/0/gem5-cp.client.0 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm49920-4000/1/cfg.client.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm49920-4000/1/nic.pci.client.0. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm49920-4000/1/nic.shm.client.0. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2300404143200", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.055892] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.055892] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.055892] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.055892] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.062891] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.062891] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.180873] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.181873] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.182873] i40e 0000:00:02.0: MAC address: 6c:23:79:0a:9a:00\r", "[ 1.182873] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.184872] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.263860] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.263860] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.263860] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.263860] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.359846] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 4000 up\r", "[ 1.367845] i40e 0000:00:02.0 eth0: changing MTU from 1500 to 4000\r", "[ 1.373844] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.3/24 dev eth0\r", "+ sleep 1\r", "+ iperf -w 1M -c 192.168.64.1 -Z dctcp -i 1\r", "------------------------------------------------------------\r", "Client connecting to 192.168.64.1, TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 4] local 192.168.64.3 port 36330 connected with 192.168.64.1 port 5001\r", "[ 2.487675] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 4] 0.0- 1.0 sec 490 MBytes 4.11 Gbits/sec\r", "[ 4] 1.0- 2.0 sec 481 MBytes 4.03 Gbits/sec\r", "[ 4] 2.0- 3.0 sec 479 MBytes 4.01 Gbits/sec\r", "[ 4] 3.0- 4.0 sec 477 MBytes 4.00 Gbits/sec\r", "[ 4] 4.0- 5.0 sec 478 MBytes 4.01 Gbits/sec\r", "[ 4] 5.0- 6.0 sec 479 MBytes 4.02 Gbits/sec\r", "[ 4] 6.0- 7.0 sec 488 MBytes 4.10 Gbits/sec\r", "[ 4] 7.0- 8.0 sec 485 MBytes 4.07 Gbits/sec\r", "[ 4] 8.0- 9.0 sec 475 MBytes 3.99 Gbits/sec\r", "[ 4] 9.0-10.0 sec 481 MBytes 4.04 Gbits/sec\r", "[ 4] 0.0-10.0 sec 4.70 GBytes 4.04 Gbits/sec\r", "+ sleep 20\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2300404133200. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2300404143200. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14", "warn: PowerState: More than one power state change request encountered within the same simulation tick", "warn: PowerState: More than one power state change request encountered within the same simulation tick", "warn: PowerState: More than one power state change request encountered within the same simulation tick"]}, "host.client.1": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm49920-4000/1/gem5-out.client.1", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm49920-4000/0/gem5-cp.client.1", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm49920-4000/1/cfg.client.1.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm49920-4000/1/nic.pci.client.1.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm49920-4000/1/nic.shm.client.1.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:15:00", "gem5 executing on spyder11, pid 51337", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm49920-4000/1/gem5-out.client.1 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm49920-4000/0/gem5-cp.client.1 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm49920-4000/1/cfg.client.1.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm49920-4000/1/nic.pci.client.1. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm49920-4000/1/nic.shm.client.1. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2316651875600", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.067890] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.067890] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.067890] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.067890] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.075889] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.075889] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.193871] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.194871] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.194871] i40e 0000:00:02.0: MAC address: 3c:38:93:12:74:3e\r", "[ 1.194871] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.196870] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.279858] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.279858] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.279858] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.279858] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.375843] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 4000 up\r", "[ 1.383842] i40e 0000:00:02.0 eth0: changing MTU from 1500 to 4000\r", "[ 1.389841] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.4/24 dev eth0\r", "+ sleep 1\r", "+ iperf -w 1M -c 192.168.64.2 -Z dctcp -i 1\r", "------------------------------------------------------------\r", "Client connecting to 192.168.64.2, TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 4] local 192.168.64.4 port 59142 connected with 192.168.64.2 port 5001\r", "[ 2.500672] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 4] 0.0- 1.0 sec 472 MBytes 3.96 Gbits/sec\r", "[ 4] 1.0- 2.0 sec 484 MBytes 4.06 Gbits/sec\r", "[ 4] 2.0- 3.0 sec 482 MBytes 4.04 Gbits/sec\r", "[ 4] 3.0- 4.0 sec 483 MBytes 4.05 Gbits/sec\r", "[ 4] 4.0- 5.0 sec 482 MBytes 4.04 Gbits/sec\r", "[ 4] 5.0- 6.0 sec 483 MBytes 4.05 Gbits/sec\r", "[ 4] 6.0- 7.0 sec 479 MBytes 4.01 Gbits/sec\r", "[ 4] 7.0- 8.0 sec 480 MBytes 4.02 Gbits/sec\r", "[ 4] 8.0- 9.0 sec 484 MBytes 4.06 Gbits/sec\r", "[ 4] 9.0-10.0 sec 482 MBytes 4.05 Gbits/sec\r", "[ 4] 0.0-10.0 sec 4.70 GBytes 4.03 Gbits/sec\r", "+ sleep 2\r", "+ m5 exit\r", "Exiting @ tick 15680547880800 because m5_exit instruction encountered"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2316651865600. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2316651875600. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14", "warn: PowerState: More than one power state change request encountered within the same simulation tick"]}}, "success": true}
\ No newline at end of file
results/paper_data/gt-ib-dumbbell-DCTCPm58240-1500-1.json 0 → 100644
View file @ 414f8b28
{"exp_name": "gt-ib-dumbbell-DCTCPm58240-1500", "start_time": 1607019295.1188, "end_time": 1607078367.346571, "sims": {"nic.server.0.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm58240-1500/1/nic.pci.server.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm58240-1500/1/nic.eth.server.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm58240-1500/1/nic.shm.server.0.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["26a6466f93ec", "sync_pci=1 sync_eth=1", "exit main_time: 15617781412000"]}, "nic.server.1.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm58240-1500/1/nic.pci.server.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm58240-1500/1/nic.eth.server.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm58240-1500/1/nic.shm.server.1.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["68cc6ef17f18", "sync_pci=1 sync_eth=1", "exit main_time: 15617781454000"]}, "nic.client.0.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm58240-1500/1/nic.pci.client.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm58240-1500/1/nic.eth.client.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm58240-1500/1/nic.shm.client.0.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["9dfe9c674b0", "sync_pci=1 sync_eth=1", "exit main_time: 15617781408000"]}, "nic.client.1.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm58240-1500/1/nic.pci.client.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm58240-1500/1/nic.eth.client.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm58240-1500/1/nic.shm.client.1.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["2af29a5b6a48", "sync_pci=1 sync_eth=1", "exit main_time: 15617780586400"]}, "net.": {"class": "NS3DumbbellNet", "cmd": ["/home/hejingli/endhostsim-code/ns-3/cosim-run.sh", "cosim", "cosim-dumbbell-example", "--CosimPortLeft=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm58240-1500/1/nic.eth.server.0.", "--CosimPortLeft=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm58240-1500/1/nic.eth.server.1.", "--CosimPortRight=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm58240-1500/1/nic.eth.client.0.", "--CosimPortRight=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm58240-1500/1/nic.eth.client.1.", "--LinkRate=10Gb/s", "--LinkLatency=500ns", "--EcnTh=58240"], "stdout": [], "stderr": []}, "host.server.0": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm58240-1500/1/gem5-out.server.0", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm58240-1500/0/gem5-cp.server.0", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm58240-1500/1/cfg.server.0.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm58240-1500/1/nic.pci.server.0.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm58240-1500/1/nic.shm.server.0.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:57", "gem5 executing on spyder07, pid 47003", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm58240-1500/1/gem5-out.server.0 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm58240-1500/0/gem5-cp.server.0 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm58240-1500/1/cfg.server.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm58240-1500/1/nic.pci.server.0. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm58240-1500/1/nic.shm.server.0. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2214412815800", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.050890] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.050890] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.051890] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.051890] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.058889] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.058889] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.176871] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.177871] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.177871] i40e 0000:00:02.0: MAC address: ec:93:6f:46:a6:26\r", "[ 1.177871] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.179871] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.263858] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.263858] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.263858] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.263858] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.359843] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 1500 up\r", "[ 1.373841] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.1/24 dev eth0\r", "+ iperf -s -w 1M -Z dctcp\r", "------------------------------------------------------------\r", "Server listening on TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 5] local 192.168.64.1 port 5001 connected with 192.168.64.3 port 52908\r", "[ 2.419682] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 5] 0.0-10.0 sec 3.63 GBytes 3.12 Gbits/sec\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2214412805800. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2214412815800. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14", "warn: PowerState: More than one power state change request encountered within the same simulation tick"]}, "host.server.1": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm58240-1500/1/gem5-out.server.1", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm58240-1500/0/gem5-cp.server.1", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm58240-1500/1/cfg.server.1.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm58240-1500/1/nic.pci.server.1.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm58240-1500/1/nic.shm.server.1.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:57", "gem5 executing on spyder07, pid 47013", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm58240-1500/1/gem5-out.server.1 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm58240-1500/0/gem5-cp.server.1 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm58240-1500/1/cfg.server.1.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm58240-1500/1/nic.pci.server.1. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm58240-1500/1/nic.shm.server.1. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2250599184400", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.056890] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.056890] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.056890] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.057890] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.064889] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.064889] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.182871] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.183870] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.183870] i40e 0000:00:02.0: MAC address: 18:7f:f1:6e:cc:68\r", "[ 1.183870] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.185870] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.263858] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.263858] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.263858] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.263858] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.359844] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 1500 up\r", "[ 1.373842] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.2/24 dev eth0\r", "+ iperf -s -w 1M -Z dctcp\r", "------------------------------------------------------------\r", "Server listening on TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 5] local 192.168.64.2 port 5001 connected with 192.168.64.4 port 37596\r", "[ 2.421682] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 5] 0.0-10.0 sec 3.57 GBytes 3.07 Gbits/sec\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2250599174400. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2250599184400. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14", "warn: PowerState: More than one power state change request encountered within the same simulation tick"]}, "host.client.0": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm58240-1500/1/gem5-out.client.0", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm58240-1500/0/gem5-cp.client.0", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm58240-1500/1/cfg.client.0.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm58240-1500/1/nic.pci.client.0.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm58240-1500/1/nic.shm.client.0.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:57", "gem5 executing on spyder07, pid 47021", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm58240-1500/1/gem5-out.client.0 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm58240-1500/0/gem5-cp.client.0 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm58240-1500/1/cfg.client.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm58240-1500/1/nic.pci.client.0. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm58240-1500/1/nic.shm.client.0. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2224130151000", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.044891] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.045891] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.045891] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.045891] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.052890] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.052890] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.170872] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.171872] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.172872] i40e 0000:00:02.0: MAC address: b0:74:c6:e9:df:09\r", "[ 1.172872] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.174871] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.255859] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.255859] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.255859] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.255859] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.351844] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 1500 up\r", "[ 1.365842] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.3/24 dev eth0\r", "+ sleep 1\r", "+ iperf -w 1M -c 192.168.64.1 -Z dctcp -i 1\r", "------------------------------------------------------------\r", "Client connecting to 192.168.64.1, TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 4] local 192.168.64.3 port 52908 connected with 192.168.64.1 port 5001\r", "[ 2.534665] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 4] 0.0- 1.0 sec 374 MBytes 3.13 Gbits/sec\r", "[ 4] 1.0- 2.0 sec 371 MBytes 3.11 Gbits/sec\r", "[ 4] 2.0- 3.0 sec 377 MBytes 3.16 Gbits/sec\r", "[ 4] 3.0- 4.0 sec 364 MBytes 3.05 Gbits/sec\r", "[ 4] 4.0- 5.0 sec 374 MBytes 3.14 Gbits/sec\r", "[ 4] 5.0- 6.0 sec 376 MBytes 3.16 Gbits/sec\r", "[ 4] 6.0- 7.0 sec 371 MBytes 3.11 Gbits/sec\r", "[ 4] 7.0- 8.0 sec 370 MBytes 3.11 Gbits/sec\r", "[ 4] 8.0- 9.0 sec 367 MBytes 3.08 Gbits/sec\r", "[ 4] 9.0-10.0 sec 373 MBytes 3.13 Gbits/sec\r", "[ 4] 0.0-10.0 sec 3.63 GBytes 3.12 Gbits/sec\r", "+ sleep 20\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2224130141000. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2224130151000. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.client.1": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm58240-1500/1/gem5-out.client.1", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm58240-1500/0/gem5-cp.client.1", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm58240-1500/1/cfg.client.1.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm58240-1500/1/nic.pci.client.1.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm58240-1500/1/nic.shm.client.1.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:57", "gem5 executing on spyder07, pid 47024", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm58240-1500/1/gem5-out.client.1 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm58240-1500/0/gem5-cp.client.1 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm58240-1500/1/cfg.client.1.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm58240-1500/1/nic.pci.client.1. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm58240-1500/1/nic.shm.client.1. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2249178541400", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.067888] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.067888] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.067888] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.068888] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.075887] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.075887] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.193869] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.194869] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.194869] i40e 0000:00:02.0: MAC address: 48:6a:5b:9a:f2:2a\r", "[ 1.194869] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.196868] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.279856] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.279856] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.279856] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.279856] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.375841] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 1500 up\r", "[ 1.389839] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.4/24 dev eth0\r", "+ sleep 1\r", "+ iperf -w 1M -c 192.168.64.2 -Z dctcp -i 1\r", "------------------------------------------------------------\r", "Client connecting to 192.168.64.2, TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 4] local 192.168.64.4 port 37596 connected with 192.168.64.2 port 5001\r", "[ 2.541664] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 4] 0.0- 1.0 sec 367 MBytes 3.08 Gbits/sec\r", "[ 4] 1.0- 2.0 sec 365 MBytes 3.06 Gbits/sec\r", "[ 4] 2.0- 3.0 sec 363 MBytes 3.05 Gbits/sec\r", "[ 4] 3.0- 4.0 sec 373 MBytes 3.13 Gbits/sec\r", "[ 4] 4.0- 5.0 sec 360 MBytes 3.02 Gbits/sec\r", "[ 4] 5.0- 6.0 sec 362 MBytes 3.03 Gbits/sec\r", "[ 4] 6.0- 7.0 sec 366 MBytes 3.07 Gbits/sec\r", "[ 4] 7.0- 8.0 sec 364 MBytes 3.06 Gbits/sec\r", "[ 4] 8.0- 9.0 sec 369 MBytes 3.10 Gbits/sec\r", "[ 4] 9.0-10.0 sec 368 MBytes 3.09 Gbits/sec\r", "[ 4] 0.0-10.0 sec 3.57 GBytes 3.07 Gbits/sec\r", "+ sleep 2\r", "+ m5 exit\r", "Exiting @ tick 15617780114600 because m5_exit instruction encountered"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2249178531400. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2249178541400. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}}, "success": true}
\ No newline at end of file
results/paper_data/gt-ib-dumbbell-DCTCPm58240-4000-1.json 0 → 100644
View file @ 414f8b28
{"exp_name": "gt-ib-dumbbell-DCTCPm58240-4000", "start_time": 1607019298.4034534, "end_time": 1607055806.2054276, "sims": {"nic.server.0.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm58240-4000/1/nic.pci.server.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm58240-4000/1/nic.eth.server.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm58240-4000/1/nic.shm.server.0.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["78a9937fd558", "sync_pci=1 sync_eth=1", "exit main_time: 15628720406000"]}, "nic.server.1.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm58240-4000/1/nic.pci.server.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm58240-4000/1/nic.eth.server.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm58240-4000/1/nic.shm.server.1.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["745d674bfefc", "sync_pci=1 sync_eth=1", "exit main_time: 15628720450000"]}, "nic.client.0.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm58240-4000/1/nic.pci.client.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm58240-4000/1/nic.eth.client.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm58240-4000/1/nic.shm.client.0.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["534a0d790964", "sync_pci=1 sync_eth=1", "exit main_time: 15628720392000"]}, "nic.client.1.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm58240-4000/1/nic.pci.client.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm58240-4000/1/nic.eth.client.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm58240-4000/1/nic.shm.client.1.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["112397931e38", "sync_pci=1 sync_eth=1", "exit main_time: 15628719947400"]}, "net.": {"class": "NS3DumbbellNet", "cmd": ["/home/hejingli/endhostsim-code/ns-3/cosim-run.sh", "cosim", "cosim-dumbbell-example", "--CosimPortLeft=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm58240-4000/1/nic.eth.server.0.", "--CosimPortLeft=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm58240-4000/1/nic.eth.server.1.", "--CosimPortRight=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm58240-4000/1/nic.eth.client.0.", "--CosimPortRight=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm58240-4000/1/nic.eth.client.1.", "--LinkRate=10Gb/s", "--LinkLatency=500ns", "--EcnTh=58240"], "stdout": [], "stderr": []}, "host.server.0": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm58240-4000/1/gem5-out.server.0", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm58240-4000/0/gem5-cp.server.0", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm58240-4000/1/cfg.server.0.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm58240-4000/1/nic.pci.server.0.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm58240-4000/1/nic.shm.server.0.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:15:00", "gem5 executing on spyder11, pid 51311", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm58240-4000/1/gem5-out.server.0 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm58240-4000/0/gem5-cp.server.0 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm58240-4000/1/cfg.server.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm58240-4000/1/nic.pci.server.0. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm58240-4000/1/nic.shm.server.0. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2271989554400", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.072887] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.072887] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.073887] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.073887] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.080886] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.080886] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.198868] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.199868] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.199868] i40e 0000:00:02.0: MAC address: 58:d5:7f:93:a9:78\r", "[ 1.199868] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.202868] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.279856] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.279856] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.279856] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.279856] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.375841] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 4000 up\r", "[ 1.383840] i40e 0000:00:02.0 eth0: changing MTU from 1500 to 4000\r", "[ 1.389839] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.1/24 dev eth0\r", "+ iperf -s -w 1M -Z dctcp\r", "------------------------------------------------------------\r", "Server listening on TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 5] local 192.168.64.1 port 5001 connected with 192.168.64.3 port 33180\r", "[ 2.435680] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 5] 0.0-10.0 sec 4.78 GBytes 4.11 Gbits/sec\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2271989544400. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2271989554400. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14", "warn: PowerState: More than one power state change request encountered within the same simulation tick"]}, "host.server.1": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm58240-4000/1/gem5-out.server.1", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm58240-4000/0/gem5-cp.server.1", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm58240-4000/1/cfg.server.1.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm58240-4000/1/nic.pci.server.1.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm58240-4000/1/nic.shm.server.1.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:15:00", "gem5 executing on spyder11, pid 51322", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm58240-4000/1/gem5-out.server.1 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm58240-4000/0/gem5-cp.server.1 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm58240-4000/1/cfg.server.1.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm58240-4000/1/nic.pci.server.1. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm58240-4000/1/nic.shm.server.1. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2262671856400", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.053892] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.053892] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.054892] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.054892] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.061891] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.061891] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.179873] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.180873] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.180873] i40e 0000:00:02.0: MAC address: fc:fe:4b:67:5d:74\r", "[ 1.181872] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.183872] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.263860] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.263860] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.263860] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.263860] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.359845] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 4000 up\r", "[ 1.367844] i40e 0000:00:02.0 eth0: changing MTU from 1500 to 4000\r", "[ 1.373843] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.2/24 dev eth0\r", "+ iperf -s -w 1M -Z dctcp\r", "------------------------------------------------------------\r", "Server listening on TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 5] local 192.168.64.2 port 5001 connected with 192.168.64.4 port 60770\r", "[ 2.411685] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 5] 0.0-10.0 sec 4.77 GBytes 4.09 Gbits/sec\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2262671846400. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2262671856400. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14", "warn: PowerState: More than one power state change request encountered within the same simulation tick"]}, "host.client.0": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm58240-4000/1/gem5-out.client.0", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm58240-4000/0/gem5-cp.client.0", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm58240-4000/1/cfg.client.0.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm58240-4000/1/nic.pci.client.0.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm58240-4000/1/nic.shm.client.0.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:15:00", "gem5 executing on spyder11, pid 51327", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm58240-4000/1/gem5-out.client.0 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm58240-4000/0/gem5-cp.client.0 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm58240-4000/1/cfg.client.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm58240-4000/1/nic.pci.client.0. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm58240-4000/1/nic.shm.client.0. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2268715396400", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.049891] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.049891] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.050891] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.050891] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.057890] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.057890] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.175872] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.176872] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.176872] i40e 0000:00:02.0: MAC address: 64:09:79:0d:4a:53\r", "[ 1.176872] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.178871] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.263858] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.263858] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.263858] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.263858] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.359844] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 4000 up\r", "[ 1.367843] i40e 0000:00:02.0 eth0: changing MTU from 1500 to 4000\r", "[ 1.373842] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.3/24 dev eth0\r", "+ sleep 1\r", "+ iperf -w 1M -c 192.168.64.1 -Z dctcp -i 1\r", "------------------------------------------------------------\r", "Client connecting to 192.168.64.1, TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 4] local 192.168.64.3 port 33180 connected with 192.168.64.1 port 5001\r", "[ 2.490672] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 4] 0.0- 1.0 sec 491 MBytes 4.12 Gbits/sec\r", "[ 4] 1.0- 2.0 sec 497 MBytes 4.17 Gbits/sec\r", "[ 4] 2.0- 3.0 sec 489 MBytes 4.11 Gbits/sec\r", "[ 4] 3.0- 4.0 sec 494 MBytes 4.15 Gbits/sec\r", "[ 4] 4.0- 5.0 sec 486 MBytes 4.07 Gbits/sec\r", "[ 4] 5.0- 6.0 sec 480 MBytes 4.03 Gbits/sec\r", "[ 4] 6.0- 7.0 sec 487 MBytes 4.09 Gbits/sec\r", "[ 4] 7.0- 8.0 sec 486 MBytes 4.07 Gbits/sec\r", "[ 4] 8.0- 9.0 sec 491 MBytes 4.12 Gbits/sec\r", "[ 4] 9.0-10.0 sec 497 MBytes 4.17 Gbits/sec\r", "[ 4] 0.0-10.0 sec 4.78 GBytes 4.11 Gbits/sec\r", "+ sleep 20\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2268715386400. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2268715396400. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.client.1": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm58240-4000/1/gem5-out.client.1", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm58240-4000/0/gem5-cp.client.1", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm58240-4000/1/cfg.client.1.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm58240-4000/1/nic.pci.client.1.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm58240-4000/1/nic.shm.client.1.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:15:00", "gem5 executing on spyder11, pid 51332", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm58240-4000/1/gem5-out.client.1 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm58240-4000/0/gem5-cp.client.1 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm58240-4000/1/cfg.client.1.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm58240-4000/1/nic.pci.client.1. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm58240-4000/1/nic.shm.client.1. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2260150567600", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.053890] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.053890] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.053890] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.053890] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.060889] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.060889] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.178871] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.179871] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.180871] i40e 0000:00:02.0: MAC address: 38:1e:93:97:23:11\r", "[ 1.180871] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.182871] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.263858] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.263858] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.263858] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.263858] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.359844] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 4000 up\r", "[ 1.367843] i40e 0000:00:02.0 eth0: changing MTU from 1500 to 4000\r", "[ 1.373842] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.4/24 dev eth0\r", "+ sleep 1\r", "+ iperf -w 1M -c 192.168.64.2 -Z dctcp -i 1\r", "------------------------------------------------------------\r", "Client connecting to 192.168.64.2, TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 4] local 192.168.64.4 port 60770 connected with 192.168.64.2 port 5001\r", "[ 2.490672] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 4] 0.0- 1.0 sec 491 MBytes 4.12 Gbits/sec\r", "[ 4] 1.0- 2.0 sec 480 MBytes 4.03 Gbits/sec\r", "[ 4] 2.0- 3.0 sec 487 MBytes 4.09 Gbits/sec\r", "[ 4] 3.0- 4.0 sec 485 MBytes 4.07 Gbits/sec\r", "[ 4] 4.0- 5.0 sec 492 MBytes 4.13 Gbits/sec\r", "[ 4] 5.0- 6.0 sec 492 MBytes 4.13 Gbits/sec\r", "[ 4] 6.0- 7.0 sec 492 MBytes 4.13 Gbits/sec\r", "[ 4] 7.0- 8.0 sec 493 MBytes 4.13 Gbits/sec\r", "[ 4] 8.0- 9.0 sec 491 MBytes 4.12 Gbits/sec\r", "[ 4] 9.0-10.0 sec 482 MBytes 4.05 Gbits/sec\r", "[ 4] 0.0-10.0 sec 4.77 GBytes 4.10 Gbits/sec\r", "+ sleep 2\r", "+ m5 exit\r", "Exiting @ tick 15628719538400 because m5_exit instruction encountered"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2260150557600. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2260150567600. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}}, "success": true}
\ No newline at end of file
results/paper_data/gt-ib-dumbbell-DCTCPm66560-1500-1.json 0 → 100644
View file @ 414f8b28
{"exp_name": "gt-ib-dumbbell-DCTCPm66560-1500", "start_time": 1607019295.164469, "end_time": 1607066380.3229187, "sims": {"nic.server.0.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm66560-1500/1/nic.pci.server.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm66560-1500/1/nic.eth.server.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm66560-1500/1/nic.shm.server.0.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["118b7ebb0364", "sync_pci=1 sync_eth=1", "exit main_time: 15609939993000"]}, "nic.server.1.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm66560-1500/1/nic.pci.server.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm66560-1500/1/nic.eth.server.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm66560-1500/1/nic.shm.server.1.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["2214829cfe30", "sync_pci=1 sync_eth=1", "exit main_time: 15609939934902"]}, "nic.client.0.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm66560-1500/1/nic.pci.client.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm66560-1500/1/nic.eth.client.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm66560-1500/1/nic.shm.client.0.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["329e65f5f8fc", "sync_pci=1 sync_eth=1", "exit main_time: 15609939998000"]}, "nic.client.1.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm66560-1500/1/nic.pci.client.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm66560-1500/1/nic.eth.client.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm66560-1500/1/nic.shm.client.1.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["4327d76ff3c8", "sync_pci=1 sync_eth=1", "exit main_time: 15609939240400"]}, "net.": {"class": "NS3DumbbellNet", "cmd": ["/home/hejingli/endhostsim-code/ns-3/cosim-run.sh", "cosim", "cosim-dumbbell-example", "--CosimPortLeft=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm66560-1500/1/nic.eth.server.0.", "--CosimPortLeft=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm66560-1500/1/nic.eth.server.1.", "--CosimPortRight=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm66560-1500/1/nic.eth.client.0.", "--CosimPortRight=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm66560-1500/1/nic.eth.client.1.", "--LinkRate=10Gb/s", "--LinkLatency=500ns", "--EcnTh=66560"], "stdout": [], "stderr": []}, "host.server.0": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm66560-1500/1/gem5-out.server.0", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm66560-1500/0/gem5-cp.server.0", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm66560-1500/1/cfg.server.0.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm66560-1500/1/nic.pci.server.0.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm66560-1500/1/nic.shm.server.0.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:56", "gem5 executing on spyder08, pid 63118", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm66560-1500/1/gem5-out.server.0 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm66560-1500/0/gem5-cp.server.0 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm66560-1500/1/cfg.server.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm66560-1500/1/nic.pci.server.0. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm66560-1500/1/nic.shm.server.0. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2238699962600", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.054890] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.054890] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.055889] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.055889] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.062888] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.062888] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.180870] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.181870] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.181870] i40e 0000:00:02.0: MAC address: 64:03:bb:7e:8b:11\r", "[ 1.181870] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.184870] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.263858] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.263858] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.263858] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.263858] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.359843] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 1500 up\r", "[ 1.373841] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.1/24 dev eth0\r", "+ iperf -s -w 1M -Z dctcp\r", "------------------------------------------------------------\r", "Server listening on TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 5] local 192.168.64.1 port 5001 connected with 192.168.64.3 port 46342\r", "[ 2.514668] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 5] 0.0-10.0 sec 3.67 GBytes 3.15 Gbits/sec\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2238699952600. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2238699962600. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.server.1": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm66560-1500/1/gem5-out.server.1", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm66560-1500/0/gem5-cp.server.1", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm66560-1500/1/cfg.server.1.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm66560-1500/1/nic.pci.server.1.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm66560-1500/1/nic.shm.server.1.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:56", "gem5 executing on spyder08, pid 63125", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm66560-1500/1/gem5-out.server.1 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm66560-1500/0/gem5-cp.server.1 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm66560-1500/1/cfg.server.1.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm66560-1500/1/nic.pci.server.1. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm66560-1500/1/nic.shm.server.1. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2176334740800", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.043892] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.043892] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.043892] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.043892] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.051891] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.051891] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.169873] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.170873] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.170873] i40e 0000:00:02.0: MAC address: 30:fe:9c:82:14:22\r", "[ 1.170873] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.173872] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.255860] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.255860] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.255860] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.255860] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.351845] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 1500 up\r", "[ 1.365843] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.2/24 dev eth0\r", "+ iperf -s -w 1M -Z dctcp\r", "------------------------------------------------------------\r", "Server listening on TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 5] local 192.168.64.2 port 5001 connected with 192.168.64.4 port 41440\r", "[ 2.473675] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 5] 0.0-10.0 sec 3.70 GBytes 3.18 Gbits/sec\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2176334730800. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2176334740800. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.client.0": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm66560-1500/1/gem5-out.client.0", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm66560-1500/0/gem5-cp.client.0", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm66560-1500/1/cfg.client.0.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm66560-1500/1/nic.pci.client.0.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm66560-1500/1/nic.shm.client.0.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:56", "gem5 executing on spyder08, pid 63126", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm66560-1500/1/gem5-out.client.0 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm66560-1500/0/gem5-cp.client.0 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm66560-1500/1/cfg.client.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm66560-1500/1/nic.pci.client.0. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm66560-1500/1/nic.shm.client.0. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2335799447800", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.078889] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.079888] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.079888] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.079888] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.086887] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.086887] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.204869] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.205869] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.205869] i40e 0000:00:02.0: MAC address: fc:f8:f5:65:9e:32\r", "[ 1.205869] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.208869] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.287857] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.287857] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.287857] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.287857] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.383842] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 1500 up\r", "[ 1.396840] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.3/24 dev eth0\r", "+ sleep 1\r", "+ iperf -w 1M -c 192.168.64.1 -Z dctcp -i 1\r", "------------------------------------------------------------\r", "Client connecting to 192.168.64.1, TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 4] local 192.168.64.3 port 46342 connected with 192.168.64.1 port 5001\r", "[ 2.560663] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 4] 0.0- 1.0 sec 374 MBytes 3.14 Gbits/sec\r", "[ 4] 1.0- 2.0 sec 374 MBytes 3.13 Gbits/sec\r", "[ 4] 2.0- 3.0 sec 371 MBytes 3.12 Gbits/sec\r", "[ 4] 3.0- 4.0 sec 377 MBytes 3.17 Gbits/sec\r", "[ 4] 4.0- 5.0 sec 376 MBytes 3.16 Gbits/sec\r", "[ 4] 5.0- 6.0 sec 372 MBytes 3.12 Gbits/sec\r", "[ 4] 6.0- 7.0 sec 372 MBytes 3.12 Gbits/sec\r", "[ 4] 7.0- 8.0 sec 382 MBytes 3.20 Gbits/sec\r", "[ 4] 8.0- 9.0 sec 371 MBytes 3.11 Gbits/sec\r", "[ 4] 9.0-10.0 sec 383 MBytes 3.21 Gbits/sec\r", "[ 4] 0.0-10.0 sec 3.67 GBytes 3.15 Gbits/sec\r", "+ sleep 20\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2335799437800. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2335799447800. Starting simulation...", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: instruction 'fwait' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14", "warn: PowerState: More than one power state change request encountered within the same simulation tick"]}, "host.client.1": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm66560-1500/1/gem5-out.client.1", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm66560-1500/0/gem5-cp.client.1", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm66560-1500/1/cfg.client.1.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm66560-1500/1/nic.pci.client.1.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm66560-1500/1/nic.shm.client.1.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:56", "gem5 executing on spyder08, pid 63131", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm66560-1500/1/gem5-out.client.1 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm66560-1500/0/gem5-cp.client.1 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm66560-1500/1/cfg.client.1.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm66560-1500/1/nic.pci.client.1. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm66560-1500/1/nic.shm.client.1. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2246952208800", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.048891] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.048891] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.048891] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.049891] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.056890] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.056890] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.174872] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.175872] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.175872] i40e 0000:00:02.0: MAC address: c8:f3:6f:d7:27:43\r", "[ 1.175872] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.178872] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.255860] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.255860] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.255860] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.255860] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.351845] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 1500 up\r", "[ 1.365843] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.4/24 dev eth0\r", "+ sleep 1\r", "+ iperf -w 1M -c 192.168.64.2 -Z dctcp -i 1\r", "------------------------------------------------------------\r", "Client connecting to 192.168.64.2, TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 4] local 192.168.64.4 port 41440 connected with 192.168.64.2 port 5001\r", "[ 2.582658] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 4] 0.0- 1.0 sec 384 MBytes 3.22 Gbits/sec\r", "[ 4] 1.0- 2.0 sec 377 MBytes 3.16 Gbits/sec\r", "[ 4] 2.0- 3.0 sec 383 MBytes 3.21 Gbits/sec\r", "[ 4] 3.0- 4.0 sec 379 MBytes 3.18 Gbits/sec\r", "[ 4] 4.0- 5.0 sec 374 MBytes 3.14 Gbits/sec\r", "[ 4] 5.0- 6.0 sec 379 MBytes 3.18 Gbits/sec\r", "[ 4] 6.0- 7.0 sec 383 MBytes 3.21 Gbits/sec\r", "[ 4] 7.0- 8.0 sec 376 MBytes 3.16 Gbits/sec\r", "[ 4] 8.0- 9.0 sec 382 MBytes 3.20 Gbits/sec\r", "[ 4] 9.0-10.0 sec 376 MBytes 3.15 Gbits/sec\r", "[ 4] 0.0-10.0 sec 3.70 GBytes 3.18 Gbits/sec\r", "+ sleep 2\r", "+ m5 exit\r", "Exiting @ tick 15609939109400 because m5_exit instruction encountered"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2246952198800. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2246952208800. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}}, "success": true}
\ No newline at end of file
results/paper_data/gt-ib-dumbbell-DCTCPm66560-4000-1.json 0 → 100644
View file @ 414f8b28
{"exp_name": "gt-ib-dumbbell-DCTCPm66560-4000", "start_time": 1607019298.407249, "end_time": 1607055915.7407353, "sims": {"nic.server.0.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm66560-4000/1/nic.pci.server.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm66560-4000/1/nic.eth.server.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm66560-4000/1/nic.shm.server.0.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["19bce10acaf0", "sync_pci=1 sync_eth=1", "exit main_time: 15662783777000"]}, "nic.server.1.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm66560-4000/1/nic.pci.server.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm66560-4000/1/nic.eth.server.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm66560-4000/1/nic.shm.server.1.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["323740ac13cc", "sync_pci=1 sync_eth=1", "exit main_time: 15662783771000"]}, "nic.client.0.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm66560-4000/1/nic.pci.client.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm66560-4000/1/nic.eth.client.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm66560-4000/1/nic.shm.client.0.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["5f874f8c2dd4", "sync_pci=1 sync_eth=1", "exit main_time: 15662783756000"]}, "nic.client.1.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm66560-4000/1/nic.pci.client.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm66560-4000/1/nic.eth.client.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm66560-4000/1/nic.shm.client.1.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["4efdddb53308", "sync_pci=1 sync_eth=1", "exit main_time: 15662782850400"]}, "net.": {"class": "NS3DumbbellNet", "cmd": ["/home/hejingli/endhostsim-code/ns-3/cosim-run.sh", "cosim", "cosim-dumbbell-example", "--CosimPortLeft=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm66560-4000/1/nic.eth.server.0.", "--CosimPortLeft=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm66560-4000/1/nic.eth.server.1.", "--CosimPortRight=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm66560-4000/1/nic.eth.client.0.", "--CosimPortRight=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm66560-4000/1/nic.eth.client.1.", "--LinkRate=10Gb/s", "--LinkLatency=500ns", "--EcnTh=66560"], "stdout": [], "stderr": []}, "host.server.0": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm66560-4000/1/gem5-out.server.0", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm66560-4000/0/gem5-cp.server.0", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm66560-4000/1/cfg.server.0.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm66560-4000/1/nic.pci.server.0.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm66560-4000/1/nic.shm.server.0.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:15:00", "gem5 executing on spyder11, pid 51315", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm66560-4000/1/gem5-out.server.0 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm66560-4000/0/gem5-cp.server.0 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm66560-4000/1/cfg.server.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm66560-4000/1/nic.pci.server.0. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm66560-4000/1/nic.shm.server.0. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2222482175000", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.035892] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.035892] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.036892] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.036892] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.043891] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.043891] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.161873] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.162873] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.162873] i40e 0000:00:02.0: MAC address: f0:ca:0a:e1:bc:19\r", "[ 1.163873] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.165872] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.247860] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.247860] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.247860] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.247860] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.343845] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 4000 up\r", "[ 1.351844] i40e 0000:00:02.0 eth0: changing MTU from 1500 to 4000\r", "[ 1.357843] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.1/24 dev eth0\r", "+ iperf -s -w 1M -Z dctcp\r", "------------------------------------------------------------\r", "Server listening on TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 5] local 192.168.64.1 port 5001 connected with 192.168.64.3 port 45236\r", "[ 2.491671] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 5] 0.0-10.0 sec 4.84 GBytes 4.15 Gbits/sec\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2222482165000. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2222482175000. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.server.1": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm66560-4000/1/gem5-out.server.1", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm66560-4000/0/gem5-cp.server.1", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm66560-4000/1/cfg.server.1.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm66560-4000/1/nic.pci.server.1.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm66560-4000/1/nic.shm.server.1.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:15:00", "gem5 executing on spyder11, pid 51323", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm66560-4000/1/gem5-out.server.1 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm66560-4000/0/gem5-cp.server.1 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm66560-4000/1/cfg.server.1.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm66560-4000/1/nic.pci.server.1. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm66560-4000/1/nic.shm.server.1. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2292620814600", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.059890] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.059890] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.059890] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.059890] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.066889] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.066889] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.184871] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.185870] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.186870] i40e 0000:00:02.0: MAC address: cc:13:ac:40:37:32\r", "[ 1.186870] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.188870] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.271857] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.271857] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.271857] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.271857] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.367843] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 4000 up\r", "[ 1.375842] i40e 0000:00:02.0 eth0: changing MTU from 1500 to 4000\r", "[ 1.381841] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.2/24 dev eth0\r", "+ iperf -s -w 1M -Z dctcp\r", "------------------------------------------------------------\r", "Server listening on TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 5] local 192.168.64.2 port 5001 connected with 192.168.64.4 port 50512\r", "[ 2.423682] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 5] 0.0-10.0 sec 4.88 GBytes 4.19 Gbits/sec\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2292620804600. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2292620814600. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.client.0": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm66560-4000/1/gem5-out.client.0", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm66560-4000/0/gem5-cp.client.0", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm66560-4000/1/cfg.client.0.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm66560-4000/1/nic.pci.client.0.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm66560-4000/1/nic.shm.client.0.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:15:00", "gem5 executing on spyder11, pid 51328", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm66560-4000/1/gem5-out.client.0 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm66560-4000/0/gem5-cp.client.0 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm66560-4000/1/cfg.client.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm66560-4000/1/nic.pci.client.0. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm66560-4000/1/nic.shm.client.0. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2318393240000", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.063889] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.063889] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.063889] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.063889] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.070888] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.071888] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.189870] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.190870] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.190870] i40e 0000:00:02.0: MAC address: d4:2d:8c:4f:87:5f\r", "[ 1.190870] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.192869] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.271857] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.271857] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.271857] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.271857] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.367843] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 4000 up\r", "[ 1.375841] i40e 0000:00:02.0 eth0: changing MTU from 1500 to 4000\r", "[ 1.381841] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.3/24 dev eth0\r", "+ sleep 1\r", "+ iperf -w 1M -c 192.168.64.1 -Z dctcp -i 1\r", "------------------------------------------------------------\r", "Client connecting to 192.168.64.1, TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 4] local 192.168.64.3 port 45236 connected with 192.168.64.1 port 5001\r", "[ 2.499671] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 4] 0.0- 1.0 sec 490 MBytes 4.11 Gbits/sec\r", "[ 4] 1.0- 2.0 sec 490 MBytes 4.11 Gbits/sec\r", "[ 4] 2.0- 3.0 sec 501 MBytes 4.20 Gbits/sec\r", "[ 4] 3.0- 4.0 sec 494 MBytes 4.14 Gbits/sec\r", "[ 4] 4.0- 5.0 sec 500 MBytes 4.19 Gbits/sec\r", "[ 4] 5.0- 6.0 sec 493 MBytes 4.14 Gbits/sec\r", "[ 4] 6.0- 7.0 sec 493 MBytes 4.13 Gbits/sec\r", "[ 4] 7.0- 8.0 sec 495 MBytes 4.16 Gbits/sec\r", "[ 4] 8.0- 9.0 sec 496 MBytes 4.16 Gbits/sec\r", "[ 4] 9.0-10.0 sec 502 MBytes 4.21 Gbits/sec\r", "[ 4] 0.0-10.0 sec 4.84 GBytes 4.16 Gbits/sec\r", "+ sleep 20\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2318393230000. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2318393240000. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14", "warn: PowerState: More than one power state change request encountered within the same simulation tick", "warn: PowerState: More than one power state change request encountered within the same simulation tick", "warn: PowerState: More than one power state change request encountered within the same simulation tick", "warn: PowerState: More than one power state change request encountered within the same simulation tick"]}, "host.client.1": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm66560-4000/1/gem5-out.client.1", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm66560-4000/0/gem5-cp.client.1", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm66560-4000/1/cfg.client.1.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm66560-4000/1/nic.pci.client.1.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm66560-4000/1/nic.shm.client.1.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:15:00", "gem5 executing on spyder11, pid 51334", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm66560-4000/1/gem5-out.client.1 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm66560-4000/0/gem5-cp.client.1 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm66560-4000/1/cfg.client.1.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm66560-4000/1/nic.pci.client.1. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm66560-4000/1/nic.shm.client.1. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2295816024000", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.077889] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.077889] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.077889] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.077889] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.084888] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.084888] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.203870] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.204870] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.204870] i40e 0000:00:02.0: MAC address: 08:33:b5:dd:fd:4e\r", "[ 1.204870] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.206870] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.287857] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.287857] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.287857] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.287857] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.383843] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 4000 up\r", "[ 1.391841] i40e 0000:00:02.0 eth0: changing MTU from 1500 to 4000\r", "[ 1.397841] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.4/24 dev eth0\r", "+ sleep 1\r", "+ iperf -w 1M -c 192.168.64.2 -Z dctcp -i 1\r", "------------------------------------------------------------\r", "Client connecting to 192.168.64.2, TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 4] local 192.168.64.4 port 50512 connected with 192.168.64.2 port 5001\r", "[ 2.525669] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 4] 0.0- 1.0 sec 507 MBytes 4.25 Gbits/sec\r", "[ 4] 1.0- 2.0 sec 503 MBytes 4.22 Gbits/sec\r", "[ 4] 2.0- 3.0 sec 498 MBytes 4.18 Gbits/sec\r", "[ 4] 3.0- 4.0 sec 500 MBytes 4.20 Gbits/sec\r", "[ 4] 4.0- 5.0 sec 498 MBytes 4.18 Gbits/sec\r", "[ 4] 5.0- 6.0 sec 500 MBytes 4.19 Gbits/sec\r", "[ 4] 6.0- 7.0 sec 503 MBytes 4.22 Gbits/sec\r", "[ 4] 7.0- 8.0 sec 502 MBytes 4.21 Gbits/sec\r", "[ 4] 8.0- 9.0 sec 495 MBytes 4.15 Gbits/sec\r", "[ 4] 9.0-10.0 sec 495 MBytes 4.15 Gbits/sec\r", "[ 4] 0.0-10.0 sec 4.88 GBytes 4.20 Gbits/sec\r", "+ sleep 2\r", "+ m5 exit\r", "Exiting @ tick 15662782507400 because m5_exit instruction encountered"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2295816014000. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2295816024000. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14", "warn: PowerState: More than one power state change request encountered within the same simulation tick"]}}, "success": true}
\ No newline at end of file
results/paper_data/gt-ib-dumbbell-DCTCPm74880-1500-1.json 0 → 100644
View file @ 414f8b28
{"exp_name": "gt-ib-dumbbell-DCTCPm74880-1500", "start_time": 1607019296.1355238, "end_time": 1607057891.7637382, "sims": {"nic.server.0.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm74880-1500/1/nic.pci.server.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm74880-1500/1/nic.eth.server.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm74880-1500/1/nic.shm.server.0.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["355feabc308", "sync_pci=1 sync_eth=1", "exit main_time: 15589677147000"]}, "nic.server.1.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm74880-1500/1/nic.pci.server.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm74880-1500/1/nic.eth.server.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm74880-1500/1/nic.shm.server.1.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["412fa6c1d7dc", "sync_pci=1 sync_eth=1", "exit main_time: 15589677225955"]}, "nic.client.0.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm74880-1500/1/nic.pci.client.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm74880-1500/1/nic.eth.client.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm74880-1500/1/nic.shm.client.0.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["5ca6398939cc", "sync_pci=1 sync_eth=1", "exit main_time: 15589677228000"]}, "nic.client.1.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm74880-1500/1/nic.pci.client.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm74880-1500/1/nic.eth.client.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm74880-1500/1/nic.shm.client.1.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["9f686ea53d4", "sync_pci=1 sync_eth=1", "exit main_time: 15589676473400"]}, "net.": {"class": "NS3DumbbellNet", "cmd": ["/home/hejingli/endhostsim-code/ns-3/cosim-run.sh", "cosim", "cosim-dumbbell-example", "--CosimPortLeft=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm74880-1500/1/nic.eth.server.0.", "--CosimPortLeft=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm74880-1500/1/nic.eth.server.1.", "--CosimPortRight=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm74880-1500/1/nic.eth.client.0.", "--CosimPortRight=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm74880-1500/1/nic.eth.client.1.", "--LinkRate=10Gb/s", "--LinkLatency=500ns", "--EcnTh=74880"], "stdout": [], "stderr": []}, "host.server.0": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm74880-1500/1/gem5-out.server.0", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm74880-1500/0/gem5-cp.server.0", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm74880-1500/1/cfg.server.0.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm74880-1500/1/nic.pci.server.0.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm74880-1500/1/nic.shm.server.0.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:57", "gem5 executing on spyder08, pid 63210", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm74880-1500/1/gem5-out.server.0 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm74880-1500/0/gem5-cp.server.0 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm74880-1500/1/cfg.server.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm74880-1500/1/nic.pci.server.0. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm74880-1500/1/nic.shm.server.0. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2324024051200", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.071888] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.071888] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.071888] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.071888] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.078887] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.079887] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.197869] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.198869] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.198869] i40e 0000:00:02.0: MAC address: 08:c3:ab:fe:55:03\r", "[ 1.198869] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.200868] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.279856] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.279856] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.279856] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.279856] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.375842] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 1500 up\r", "[ 1.388840] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.1/24 dev eth0\r", "+ iperf -s -w 1M -Z dctcp\r", "------------------------------------------------------------\r", "Server listening on TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 5] local 192.168.64.1 port 5001 connected with 192.168.64.3 port 53070\r", "[ 2.446679] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 5] 0.0-10.0 sec 3.77 GBytes 3.23 Gbits/sec\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2324024041200. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2324024051200. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.server.1": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm74880-1500/1/gem5-out.server.1", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm74880-1500/0/gem5-cp.server.1", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm74880-1500/1/cfg.server.1.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm74880-1500/1/nic.pci.server.1.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm74880-1500/1/nic.shm.server.1.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:57", "gem5 executing on spyder08, pid 63215", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm74880-1500/1/gem5-out.server.1 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm74880-1500/0/gem5-cp.server.1 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm74880-1500/1/cfg.server.1.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm74880-1500/1/nic.pci.server.1. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm74880-1500/1/nic.shm.server.1. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2321947557400", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.078887] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.078887] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.078887] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.078887] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.086886] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.086886] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.204868] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.205868] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.205868] i40e 0000:00:02.0: MAC address: dc:d7:c1:a6:2f:41\r", "[ 1.205868] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.207868] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.287856] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.287856] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.287856] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.287856] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.383841] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 1500 up\r", "[ 1.397839] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.2/24 dev eth0\r", "+ iperf -s -w 1M -Z dctcp\r", "------------------------------------------------------------\r", "Server listening on TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 5] local 192.168.64.2 port 5001 connected with 192.168.64.4 port 48054\r", "[ 2.343695] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 5] 0.0-10.0 sec 3.68 GBytes 3.16 Gbits/sec\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2321947547400. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2321947557400. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.client.0": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm74880-1500/1/gem5-out.client.0", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm74880-1500/0/gem5-cp.client.0", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm74880-1500/1/cfg.client.0.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm74880-1500/1/nic.pci.client.0.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm74880-1500/1/nic.shm.client.0.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:57", "gem5 executing on spyder08, pid 63217", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm74880-1500/1/gem5-out.client.0 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm74880-1500/0/gem5-cp.client.0 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm74880-1500/1/cfg.client.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm74880-1500/1/nic.pci.client.0. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm74880-1500/1/nic.shm.client.0. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2333265152800", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.083886] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.083886] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.083886] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.083886] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.091885] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.091885] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.209867] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.210867] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.210867] i40e 0000:00:02.0: MAC address: cc:39:89:39:a6:5c\r", "[ 1.210867] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.212867] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.295854] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.295854] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.295854] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.295854] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.391839] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 1500 up\r", "[ 1.405837] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.3/24 dev eth0\r", "+ sleep 1\r", "+ iperf -w 1M -c 192.168.64.1 -Z dctcp -i 1\r", "------------------------------------------------------------\r", "Client connecting to 192.168.64.1, TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 4] local 192.168.64.3 port 53070 connected with 192.168.64.1 port 5001\r", "[ 2.565661] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 4] 0.0- 1.0 sec 385 MBytes 3.23 Gbits/sec\r", "[ 4] 1.0- 2.0 sec 383 MBytes 3.21 Gbits/sec\r", "[ 4] 2.0- 3.0 sec 382 MBytes 3.21 Gbits/sec\r", "[ 4] 3.0- 4.0 sec 386 MBytes 3.24 Gbits/sec\r", "[ 4] 4.0- 5.0 sec 380 MBytes 3.18 Gbits/sec\r", "[ 4] 5.0- 6.0 sec 390 MBytes 3.27 Gbits/sec\r", "[ 4] 6.0- 7.0 sec 388 MBytes 3.25 Gbits/sec\r", "[ 4] 7.0- 8.0 sec 388 MBytes 3.26 Gbits/sec\r", "[ 4] 8.0- 9.0 sec 382 MBytes 3.20 Gbits/sec\r", "[ 4] 9.0-10.0 sec 391 MBytes 3.28 Gbits/sec\r", "[ 4] 0.0-10.0 sec 3.77 GBytes 3.23 Gbits/sec\r", "+ sleep 20\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2333265142800. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2333265152800. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.client.1": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm74880-1500/1/gem5-out.client.1", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm74880-1500/0/gem5-cp.client.1", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm74880-1500/1/cfg.client.1.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm74880-1500/1/nic.pci.client.1.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm74880-1500/1/nic.shm.client.1.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System. http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec 3 2020 17:56:02", "gem5 started Dec 3 2020 19:14:57", "gem5 executing on spyder08, pid 63220", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm74880-1500/1/gem5-out.client.1 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm74880-1500/0/gem5-cp.client.1 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm74880-1500/1/cfg.client.1.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm74880-1500/1/nic.pci.client.1. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm74880-1500/1/nic.shm.client.1. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", " 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2222805117200", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[ 1.060891] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[ 1.060891] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[ 1.061891] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[ 1.061891] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[ 1.068890] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[ 1.068890] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[ 1.186872] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[ 1.187872] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[ 1.187872] i40e 0000:00:02.0: MAC address: d4:53:ea:86:f6:09\r", "[ 1.187872] i40e 0000:00:02.0: FW LLDP is enabled\r", "[ 1.190871] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[ 1.271859] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[ 1.271859] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[ 1.271859] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[ 1.271859] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[ 1.367844] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 1500 up\r", "[ 1.381842] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.4/24 dev eth0\r", "+ sleep 1\r", "+ iperf -w 1M -c 192.168.64.2 -Z dctcp -i 1\r", "------------------------------------------------------------\r", "Client connecting to 192.168.64.2, TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[ 4] local 192.168.64.4 port 48054 connected with 192.168.64.2 port 5001\r", "[ 2.624653] random: crng init done\r", "[ ID] Interval Transfer Bandwidth\r", "[ 4] 0.0- 1.0 sec 383 MBytes 3.21 Gbits/sec\r", "[ 4] 1.0- 2.0 sec 381 MBytes 3.20 Gbits/sec\r", "[ 4] 2.0- 3.0 sec 378 MBytes 3.18 Gbits/sec\r", "[ 4] 3.0- 4.0 sec 372 MBytes 3.12 Gbits/sec\r", "[ 4] 4.0- 5.0 sec 382 MBytes 3.20 Gbits/sec\r", "[ 4] 5.0- 6.0 sec 377 MBytes 3.16 Gbits/sec\r", "[ 4] 6.0- 7.0 sec 372 MBytes 3.12 Gbits/sec\r", "[ 4] 7.0- 8.0 sec 370 MBytes 3.10 Gbits/sec\r", "[ 4] 8.0- 9.0 sec 376 MBytes 3.16 Gbits/sec\r", "[ 4] 9.0-10.0 sec 376 MBytes 3.15 Gbits/sec\r", "[ 4] 0.0-10.0 sec 3.68 GBytes 3.16 Gbits/sec\r", "+ sleep 2\r", "+ m5 exit\r", "Exiting @ tick 15589676202800 because m5_exit instruction encountered"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000 pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2222805107200. Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2222805117200. Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}}, "success": true}
\ No newline at end of file
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