i40e: add glstat and pfint_dyn_ctl0 registers

i40e_bm/i40e_bm.cc

@@ -219,6 +219,9 @@ uint32_t i40e_bm::reg_mem_read32(uint64_t addr)
             case I40E_GLGEN_RSTCTL:
                 val = regs.glgen_rstctl;
                 break;
+            case I40E_GLGEN_STAT:
+                val = regs.glgen_stat;
+                break;
 
             case I40E_GLVFGEN_TIMER:
                 val = runner->time_ps() / 1000000;
@@ -238,6 +241,10 @@ uint32_t i40e_bm::reg_mem_read32(uint64_t addr)
                 regs.pfint_icr0 = 0;
                 break;
 
+            case I40E_PFINT_DYN_CTL0:
+                val = regs.pfint_dyn_ctl0;
+                break;
+
             case I40E_GLPCI_CNF2:
                 val = ((NUM_PFINTS - 2) << I40E_GLPCI_CNF2_MSI_X_PF_N_SHIFT) |
                     (2 << I40E_GLPCI_CNF2_MSI_X_VF_N_SHIFT); /* that is ugly,
@@ -478,6 +485,9 @@ void i40e_bm::reg_mem_write32(uint64_t addr, uint32_t val)
             case I40E_PFINT_ICR0:
                 regs.pfint_icr0 = val;
                 break;
+            case I40E_PFINT_DYN_CTL0:
+                regs.pfint_dyn_ctl0 = val;
+                break;
 
             case I40E_PFHMC_SDCMD:
                 regs.pfhmc_sdcmd = val;

i40e_bm/i40e_bm.h

@@ -446,11 +446,13 @@ protected:
 
     struct i40e_regs {
         uint32_t glgen_rstctl;
+        uint32_t glgen_stat;
         uint32_t gllan_rctl_0;
         uint32_t pfint_lnklst0;
         uint32_t pfint_icr0_ena;
         uint32_t pfint_icr0;
 
+        uint32_t pfint_dyn_ctl0;
         uint32_t pfint_dyn_ctln[NUM_PFINTS - 1];
         uint32_t pfint_lnklstn[NUM_PFINTS - 1];
         uint32_t pfint_raten[NUM_PFINTS - 1];

i40e_bm/i40e_lan.cc

@@ -141,16 +141,23 @@ void lan_queue_base::disable()
 void lan_queue_base::interrupt()
 {
     uint32_t qctl = reg_intqctl;
+    uint32_t gctl = lanmgr.dev.regs.pfint_dyn_ctl0;
 #ifdef DEBUG_LAN
-    log << " interrupt intctl=" << qctl << logger::endl;
+    log << " interrupt qctl=" << qctl << " gctl=" << gctl << logger::endl;
 #endif
 
     uint16_t msix_idx = (qctl & I40E_QINT_TQCTL_MSIX_INDX_MASK) >>
         I40E_QINT_TQCTL_ITR_INDX_SHIFT;
     uint8_t msix0_idx = (qctl & I40E_QINT_TQCTL_MSIX0_INDX_MASK) >>
         I40E_QINT_TQCTL_MSIX0_INDX_SHIFT;
-    bool cause_ena = !!(qctl & I40E_QINT_TQCTL_CAUSE_ENA_MASK);
 
+    if (msix_idx != 0) {
+        log << "TODO: only int 0 is supported" << logger::endl;
+        abort();
+    }
+
+    bool cause_ena = !!(qctl & I40E_QINT_TQCTL_CAUSE_ENA_MASK) &&
+      !!(gctl & I40E_PFINT_DYN_CTL0_INTENA_MASK);
     if (!cause_ena) {
 #ifdef DEBUG_LAN
         log << " interrupt cause disabled" << logger::endl;
@@ -158,11 +165,6 @@ void lan_queue_base::interrupt()
         return;
     }
 
-    if (msix_idx != 0) {
-        log << "TODO: only int 0 is supported" << logger::endl;
-        abort();
-    }
-
     // TODO throttling?
 #ifdef DEBUG_LAN
     log << "   setting int0.qidx=" << msix0_idx << logger::endl;