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ycai
simbricks
Commits
25de59cb
Commit
25de59cb
authored
Jun 11, 2020
by
Antoine Kaufmann
Browse files
corundum: attempt at larger DMAs
parent
e22013e6
Changes
1
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1 changed file
with
35 additions
and
14 deletions
+35
-14
corundum/mem.cpp
corundum/mem.cpp
+35
-14
No files found.
corundum/mem.cpp
View file @
25de59cb
...
@@ -22,21 +22,27 @@ void MemWriter::step()
...
@@ -22,21 +22,27 @@ void MemWriter::step()
p
.
mem_valid
=
0
;
p
.
mem_valid
=
0
;
p
.
mem_be
[
0
]
=
p
.
mem_be
[
1
]
=
p
.
mem_be
[
2
]
=
p
.
mem_be
[
3
]
=
0
;
p
.
mem_be
[
0
]
=
p
.
mem_be
[
1
]
=
p
.
mem_be
[
2
]
=
p
.
mem_be
[
3
]
=
0
;
cur
->
engine
->
mem_op_complete
(
cur
);
if
(
cur_off
==
cur
->
len
)
{
/* operation is done */
pending
.
pop_front
();
cur
->
engine
->
mem_op_complete
(
cur
);
cur_off
=
0
;
}
else
{
/* operation is not done yet, we'll pick it back up */
}
cur
=
0
;
cur
=
0
;
}
else
if
(
!
cur
&&
!
pending
.
empty
())
{
}
else
if
(
!
cur
&&
!
pending
.
empty
())
{
cur
=
pending
.
front
();
cur
=
pending
.
front
();
pending
.
pop_front
();
//std::cerr << "issuing write to " << cur->ram_addr << std::endl;
//std::cerr << "issuing write to " << cur->ram_addr << std::endl;
size_t
data_byte_width
=
DATA_WIDTH
/
8
;
size_t
data_byte_width
=
DATA_WIDTH
/
8
;
size_t
data_offset
=
cur
->
ram_addr
%
data_byte_width
;
size_t
data_offset
=
(
cur
->
ram_addr
+
cur_off
)
%
data_byte_width
;
if
(
cur
->
len
>
data_byte_width
-
data_offset
)
{
/*
if (cur->len > data_byte_width - data_offset) {
std::cerr << "MemWriter::step: cannot be written in one cycle TODO" << std::endl;
std::cerr << "MemWriter::step: cannot be written in one cycle TODO" << std::endl;
throw "unsupported";
throw "unsupported";
}
}
*/
/* first reset everything */
/* first reset everything */
p
.
mem_sel
=
0
;
p
.
mem_sel
=
0
;
...
@@ -47,7 +53,9 @@ void MemWriter::step()
...
@@ -47,7 +53,9 @@ void MemWriter::step()
/* put data bytes in the right places */
/* put data bytes in the right places */
size_t
off
=
data_offset
;
size_t
off
=
data_offset
;
for
(
size_t
i
=
0
;
i
<
cur
->
len
;
i
++
,
off
++
)
{
size_t
cur_len
=
(
cur
->
len
-
cur_off
>
data_byte_width
-
data_offset
?
data_byte_width
-
data_offset
:
cur
->
len
-
cur_off
);
for
(
size_t
i
=
0
;
i
<
cur_len
;
i
++
,
off
++
)
{
size_t
byte_off
=
off
%
4
;
size_t
byte_off
=
off
%
4
;
// first clear data byte
// first clear data byte
p
.
mem_data
[
off
/
4
]
&=
~
(
0xffu
<<
(
byte_off
*
8
));
p
.
mem_data
[
off
/
4
]
&=
~
(
0xffu
<<
(
byte_off
*
8
));
...
@@ -57,7 +65,7 @@ void MemWriter::step()
...
@@ -57,7 +65,7 @@ void MemWriter::step()
p
.
mem_valid
|=
(
1
<<
(
off
/
(
SEG_WIDTH
/
8
)));
p
.
mem_valid
|=
(
1
<<
(
off
/
(
SEG_WIDTH
/
8
)));
}
}
uint64_t
seg_addr
=
cur
->
ram_addr
/
data_byte_width
;
uint64_t
seg_addr
=
(
cur
->
ram_addr
+
cur_off
)
/
data_byte_width
;
size_t
seg_addr_bits
=
12
;
size_t
seg_addr_bits
=
12
;
// iterate over the address bit by bit
// iterate over the address bit by bit
...
@@ -69,6 +77,8 @@ void MemWriter::step()
...
@@ -69,6 +77,8 @@ void MemWriter::step()
p
.
mem_addr
[
dst_bit
/
32
]
|=
(
bit
<<
(
dst_bit
%
32
));
p
.
mem_addr
[
dst_bit
/
32
]
|=
(
bit
<<
(
dst_bit
%
32
));
}
}
}
}
cur_off
+=
cur_len
;
}
}
}
}
...
@@ -96,21 +106,28 @@ void MemReader::step()
...
@@ -96,21 +106,28 @@ void MemReader::step()
cur
->
data
[
i
]
=
(
p
.
mem_data
[
off
/
4
]
>>
(
byte_off
*
8
))
&
0xff
;
cur
->
data
[
i
]
=
(
p
.
mem_data
[
off
/
4
]
>>
(
byte_off
*
8
))
&
0xff
;
}
}
cur
->
engine
->
mem_op_complete
(
cur
);
if
(
cur_off
==
cur
->
len
)
{
/* operation is done */
pending
.
pop_front
();
cur
->
engine
->
mem_op_complete
(
cur
);
cur_off
=
0
;
}
else
{
/* operation is not done yet, we'll pick it back up */
}
cur
=
0
;
cur
=
0
;
}
else
if
(
!
cur
&&
!
pending
.
empty
())
{
}
else
if
(
!
cur
&&
!
pending
.
empty
())
{
cur
=
pending
.
front
();
cur
=
pending
.
front
();
pending
.
pop_front
();
std
::
cerr
<<
"issuing read from "
<<
std
::
hex
<<
cur
->
ram_addr
<<
std
::
endl
;
std
::
cerr
<<
"issuing read from "
<<
std
::
hex
<<
cur
->
ram_addr
<<
std
::
endl
;
size_t
data_offset
=
cur
->
ram_addr
%
data_byte_width
;
size_t
data_offset
=
(
cur
->
ram_addr
+
cur_off
)
%
data_byte_width
;
std
::
cerr
<<
" off="
<<
data_offset
<<
std
::
endl
;
std
::
cerr
<<
" off="
<<
data_offset
<<
std
::
endl
;
if
(
cur
->
len
>
data_byte_width
-
data_offset
)
{
/*
if (cur->len > data_byte_width - data_offset) {
std::cerr << "MemReader::step: cannot be written in one cycle TODO" << std::endl;
std::cerr << "MemReader::step: cannot be written in one cycle TODO" << std::endl;
throw "unsupported";
throw "unsupported";
}
}
*/
/* first reset everything */
/* first reset everything */
p
.
mem_sel
=
0
;
p
.
mem_sel
=
0
;
...
@@ -120,13 +137,15 @@ void MemReader::step()
...
@@ -120,13 +137,15 @@ void MemReader::step()
/* put data bytes in the right places */
/* put data bytes in the right places */
size_t
off
=
data_offset
;
size_t
off
=
data_offset
;
for
(
size_t
i
=
0
;
i
<
cur
->
len
;
i
++
,
off
++
)
{
size_t
cur_len
=
(
cur
->
len
-
cur_off
>
data_byte_width
-
data_offset
?
data_byte_width
-
data_offset
:
cur
->
len
-
cur_off
);
for
(
size_t
i
=
0
;
i
<
cur_len
;
i
++
,
off
++
)
{
size_t
byte_off
=
off
%
4
;
size_t
byte_off
=
off
%
4
;
p
.
mem_valid
|=
(
1
<<
(
off
/
(
SEG_WIDTH
/
8
)));
p
.
mem_valid
|=
(
1
<<
(
off
/
(
SEG_WIDTH
/
8
)));
}
}
p
.
mem_resready
=
p
.
mem_valid
;
p
.
mem_resready
=
p
.
mem_valid
;
uint64_t
seg_addr
=
cur
->
ram_addr
/
data_byte_width
;
uint64_t
seg_addr
=
(
cur
->
ram_addr
+
cur_off
)
/
data_byte_width
;
size_t
seg_addr_bits
=
12
;
size_t
seg_addr_bits
=
12
;
// iterate over the address bit by bit
// iterate over the address bit by bit
...
@@ -142,6 +161,8 @@ void MemReader::step()
...
@@ -142,6 +161,8 @@ void MemReader::step()
/*for (size_t i = 0; i < 3; i++)
/*for (size_t i = 0; i < 3; i++)
std::cerr << " addr = " << p.mem_addr[i] << std::endl;
std::cerr << " addr = " << p.mem_addr[i] << std::endl;
std::cerr << " mem_valid = " << (unsigned) p.mem_valid << std::endl;*/
std::cerr << " mem_valid = " << (unsigned) p.mem_valid << std::endl;*/
cur_off
+=
cur_len
;
}
}
}
}
...
...
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