i40e: add plumbing for hmc

i40e_bm/Makefile

@@ -3,7 +3,7 @@ CPPFLAGS += -I../libnicbm/include/
 CFLAGS += -Wall -Wextra -Wno-unused-parameter -O3 -g
 LDFLGAS = -g
 
-OBJS := i40e_bm.o i40e_queues.o i40e_adminq.o
+OBJS := i40e_bm.o i40e_queues.o i40e_adminq.o i40e_hmc.o
 
 all: i40e_bm
 

i40e_bm/i40e_bm.cc

@@ -13,7 +13,7 @@ namespace i40e {
 
 i40e_bm::i40e_bm()
     : pf_atq(*this, regs.pf_atqba, regs.pf_atqlen, regs.pf_atqh, regs.pf_atqt),
-    shram(*this)
+    hmc(*this), shram(*this)
 {
     memset(&regs, 0, sizeof(regs));
 }
@@ -248,6 +248,25 @@ uint32_t i40e_bm::reg_mem_read32(uint64_t addr)
                 val = 0;
                 break;
 
+            case I40E_PFHMC_SDCMD:
+                val = regs.pfhmc_sdcmd;
+                break;
+            case I40E_PFHMC_SDDATALOW:
+                val = regs.pfhmc_sddatalow;
+                break;
+            case I40E_PFHMC_SDDATAHIGH:
+                val = regs.pfhmc_sddatahigh;
+                break;
+            case I40E_PFHMC_PDINV:
+                val = regs.pfhmc_pdinv;
+                break;
+            case I40E_PFHMC_ERRORINFO:
+                val = regs.pfhmc_errorinfo;
+                break;
+            case I40E_PFHMC_ERRORDATA:
+                val = regs.pfhmc_errordata;
+                break;
+
             case I40E_PF_ATQBAL:
                 val = regs.pf_atqba;
                 break;
@@ -365,6 +384,23 @@ void i40e_bm::reg_mem_write32(uint64_t addr, uint32_t val)
                 regs.pfint_icr0_ena = val;
                 break;
 
+            case I40E_PFHMC_SDCMD:
+                regs.pfhmc_sdcmd = val;
+                hmc.reg_updated(addr);
+                break;
+            case I40E_PFHMC_SDDATALOW:
+                regs.pfhmc_sddatalow = val;
+                hmc.reg_updated(addr);
+                break;
+            case I40E_PFHMC_SDDATAHIGH:
+                regs.pfhmc_sddatahigh = val;
+                hmc.reg_updated(addr);
+                break;
+            case I40E_PFHMC_PDINV:
+                regs.pfhmc_pdinv = val;
+                hmc.reg_updated(addr);
+                break;
+
             case I40E_PF_ATQBAL:
                 regs.pf_atqba = val | (regs.pf_atqba & 0xffffffff00000000ULL);
                 pf_atq.reg_updated();

i40e_bm/i40e_bm.h

@@ -124,6 +124,26 @@ class queue_admin_tx : public queue_base {
         void reg_updated();
 };
 
+// host memory cache
+class host_mem_cache {
+    protected:
+        static const uint16_t MAX_SEGMENTS = 0x1000;
+
+        struct segment {
+            uint64_t pdir_addr;
+            uint16_t pgcount;
+            bool valid;
+            bool direct;
+        };
+
+        i40e_bm &dev;
+        segment segs[MAX_SEGMENTS];
+    public:
+        host_mem_cache(i40e_bm &dev);
+        void reg_updated(uint64_t addr);
+};
+
+
 class shadow_ram {
     protected:
         i40e_bm &dev;
@@ -166,6 +186,13 @@ protected:
         uint32_t qint_rqctl[NUM_QUEUES];
         uint32_t qrx_ena[NUM_QUEUES];
 
+        uint32_t pfhmc_sdcmd;
+        uint32_t pfhmc_sddatalow;
+        uint32_t pfhmc_sddatahigh;
+        uint32_t pfhmc_pdinv;
+        uint32_t pfhmc_errorinfo;
+        uint32_t pfhmc_errordata;
+
         uint64_t pf_atqba;
         uint32_t pf_atqlen;
         uint32_t pf_atqh;
@@ -195,6 +222,7 @@ public:
 protected:
     i40e_regs regs;
     queue_admin_tx pf_atq;
+    host_mem_cache hmc;
     shadow_ram shram;
 
     /** Read from the I/O bar */

i40e_bm/i40e_hmc.cc

+#include <stdlib.h>
+#include <string.h>
+#include <cassert>
+#include <iostream>
+
+#include "i40e_bm.h"
+
+#include "i40e_base_wrapper.h"
+
+using namespace i40e;
+
+extern nicbm::Runner *runner;
+
+host_mem_cache::host_mem_cache(i40e_bm &dev_)
+    : dev(dev_)
+{
+    for (size_t i = 0; i < MAX_SEGMENTS; i++) {
+        segs[i].pdir_addr = 0;
+        segs[i].pgcount = 0;
+        segs[i].valid = false;
+        segs[i].direct = false;
+    }
+}
+
+void host_mem_cache::reg_updated(uint64_t addr)
+{
+    std::cerr << "hmc reg updated " << addr << std::endl;
+}