pcilat-gt-cb-switch-500-1.json

{"exp_name": "pcilat-gt-cb-switch-500", "metadata": {}, "start_time": 1607556578.3852181, "end_time": 1607575577.8011544, "sims": {"nic.server.0.": {"class": "CorundumBMNIC", "cmd": ["/DS/endhost-networking/work/sim/antoine/endhostsim-code/corundum_bm/corundum_bm", "/local/var/tmp/antoinek-work/pcilat-gt-cb-switch-500/1/nic.pci.server.0.", "/local/var/tmp/antoinek-work/pcilat-gt-cb-switch-500/1/nic.eth.server.0.", "/local/var/tmp/antoinek-work/pcilat-gt-cb-switch-500/1/nic.shm.server.0.", "0", "0", "200", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["33da202e8cf0", "sync_pci=1 sync_eth=1", "warn: nicsim_sync failed (t=171625210000)", "warn: nicsim_sync failed (t=171625210000)", "warn: nicsim_sync failed (t=171625210000)", "warn: nicsim_sync failed (t=171625210000)", "warn: nicsim_sync failed (t=171625210000)", "warn: nicsim_sync failed (t=171625210000)", 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nicsim_sync failed (t=1724694810000)", "warn: nicsim_sync failed (t=1724694810000)", "warn: nicsim_sync failed (t=1724694810000)", "exit main_time: 19099236769808"]}, "nic.client.0.": {"class": "CorundumBMNIC", "cmd": ["/DS/endhost-networking/work/sim/antoine/endhostsim-code/corundum_bm/corundum_bm", "/local/var/tmp/antoinek-work/pcilat-gt-cb-switch-500/1/nic.pci.client.0.", "/local/var/tmp/antoinek-work/pcilat-gt-cb-switch-500/1/nic.eth.client.0.", "/local/var/tmp/antoinek-work/pcilat-gt-cb-switch-500/1/nic.shm.client.0.", "0", "0", "200", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["50a17a49ac2c", "sync_pci=1 sync_eth=1", "warn: nicsim_sync failed (t=67367010000)", "warn: nicsim_sync failed (t=67367010000)", "warn: nicsim_sync failed (t=67367010000)", "warn: nicsim_sync failed (t=67367010000)", "warn: nicsim_sync failed (t=67367010000)", "warn: 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(t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=976849810000)", "warn: nicsim_sync failed (t=1360282210000)", "warn: nicsim_sync failed (t=1360282210000)", "warn: nicsim_sync failed (t=1360282210000)", "warn: nicsim_sync failed (t=1360282210000)", "warn: nicsim_sync failed (t=1360282210000)", "warn: nicsim_sync failed (t=1360282210000)", "warn: nicsim_sync failed (t=1360282210000)", "warn: nicsim_sync failed (t=1360282210000)", "warn: nicsim_sync failed (t=1360282210000)", "warn: nicsim_sync failed (t=1360282210000)", "warn: nicsim_sync failed (t=1360282210000)", "warn: nicsim_sync failed (t=1360282210000)", "warn: nicsim_sync failed (t=1360282210000)", "warn: nicsim_sync failed (t=1360282210000)", "warn: nicsim_sync failed (t=1360282210000)", "warn: nicsim_sync failed (t=1360282210000)", "warn: nicsim_sync failed (t=1360282210000)", "warn: nicsim_sync failed (t=1360282210000)", "warn: nicsim_sync failed (t=1360282210000)", "warn: nicsim_sync failed (t=1360282210000)", "warn: nicsim_sync failed (t=1360282210000)", "warn: nicsim_sync failed (t=1360282210000)", "warn: nicsim_sync failed (t=1360282210000)", "warn: nicsim_sync failed (t=1360282210000)", "warn: nicsim_sync failed (t=1360282210000)", "warn: nicsim_sync failed (t=1360282210000)", "warn: nicsim_sync failed (t=1360282210000)", "warn: nicsim_sync failed (t=1360282210000)", "warn: nicsim_sync failed (t=1360282210000)", "warn: nicsim_sync failed (t=1360282210000)", "warn: nicsim_sync failed (t=1620051410000)", "warn: nicsim_sync failed (t=1620051410000)", "warn: nicsim_sync failed (t=1620051410000)", "warn: nicsim_sync failed (t=1620051410000)", "warn: nicsim_sync failed (t=1620051410000)", "warn: nicsim_sync failed (t=1620051410000)", "warn: nicsim_sync failed (t=1620051410000)", "warn: nicsim_sync failed (t=1620051410000)", "warn: nicsim_sync failed (t=1620051410000)", "warn: nicsim_sync failed (t=1620051410000)", "warn: nicsim_sync failed (t=1620051410000)", "warn: nicsim_sync failed (t=1620051410000)", "warn: nicsim_sync failed (t=1620051410000)", "warn: nicsim_sync failed (t=1620051410000)", "warn: nicsim_sync failed (t=1620051410000)", "warn: nicsim_sync failed (t=1620051410000)", "exit main_time: 19099235889808"]}, "net.": {"class": "SwitchNet", "cmd": ["/DS/endhost-networking/work/sim/antoine/endhostsim-code/net_switch/net_switch", "-m", "0", "-S", "200", "-E", "500", "-s", "/local/var/tmp/antoinek-work/pcilat-gt-cb-switch-500/1/nic.eth.server.0.", "-s", "/local/var/tmp/antoinek-work/pcilat-gt-cb-switch-500/1/nic.eth.client.0."], "stdout": ["start polling"], "stderr": []}, "host.server.0": {"class": "Gem5Host", "cmd": ["/DS/endhost-networking/work/sim/antoine/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/antoinek-work/pcilat-gt-cb-switch-500/1/gem5-out.server.0", "/DS/endhost-networking/work/sim/antoine/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=3GHz", "--sys-clock=1GHz", "--checkpoint-dir=/DS/endhost-networking/work/sim/antoine/endhostsim-code/experiments/checkpoints/pcilat-gt-cb-switch-500/0/gem5-cp.server.0", "--kernel=/DS/endhost-networking/work/sim/antoine/endhostsim-code/images/vmlinux", "--disk-image=/DS/endhost-networking/work/sim/antoine/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/antoinek-work/pcilat-gt-cb-switch-500/1/cfg.server.0.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/antoinek-work/pcilat-gt-cb-switch-500/1/nic.pci.server.0.", "--cosim-shm=/local/var/tmp/antoinek-work/pcilat-gt-cb-switch-500/1/nic.shm.server.0.", "--cosim-sync", "--cosim-pci-lat=500", "--cosim-sync-int=200"], "stdout": ["gem5 Simulator System.  http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec  9 2020 23:42:29", "gem5 started Dec 10 2020 00:29:39", "gem5 executing on spyder07, pid 840", "command line: /DS/endhost-networking/work/sim/antoine/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/antoinek-work/pcilat-gt-cb-switch-500/1/gem5-out.server.0 /DS/endhost-networking/work/sim/antoine/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=3GHz --sys-clock=1GHz --checkpoint-dir=/DS/endhost-networking/work/sim/antoine/endhostsim-code/experiments/checkpoints/pcilat-gt-cb-switch-500/0/gem5-cp.server.0 --kernel=/DS/endhost-networking/work/sim/antoine/endhostsim-code/images/vmlinux --disk-image=/DS/endhost-networking/work/sim/antoine/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/antoinek-work/pcilat-gt-cb-switch-500/1/cfg.server.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/antoinek-work/pcilat-gt-cb-switch-500/1/nic.pci.server.0. --cosim-shm=/local/var/tmp/antoinek-work/pcilat-gt-cb-switch-500/1/nic.shm.server.0. --cosim-sync --cosim-pci-lat=500 --cosim-sync-int=200", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", "      0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan  1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 1938805295302", "switching cpus", "**** REAL SIMULATION ****", "+ insmod /tmp/guest/mqnic.ko\r", "[    0.862920] mqnic: loading out-of-tree module taints kernel.\r", "[    0.863920] mqnic 0000:00:02.0: mqnic probe\r", "[    0.863920] mqnic 0000:00:02.0: enabling device (0000 -> 0002)\r", "[    0.863920] mqnic 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[    0.863920] mqnic 0000:00:02.0: FW ID: 0x00000020\r", "[    0.863920] mqnic 0000:00:02.0: FW version: 0.1\r", "[    0.863920] mqnic 0000:00:02.0: Board ID: 0x43215678\r", "[    0.863920] mqnic 0000:00:02.0: Board version: 0.1\r", "[    0.863920] mqnic 0000:00:02.0: PHC count: 1\r", "[    0.863920] mqnic 0000:00:02.0: PHC offset: 0x00000200\r", "[    0.864919] mqnic 0000:00:02.0: IF count: 1\r", "[    0.864919] mqnic 0000:00:02.0: IF stride: 0x00080000\r", "[    0.864919] mqnic 0000:00:02.0: IF CSR offset: 0x00080000\r", "[    0.864919] mqnic 0000:00:02.0: Failed to read MAC from EEPROM; no EEPROM I2C client registered\r", "[    0.864919] mqnic 0000:00:02.0: registered PHC (index 0)\r", "[    0.864919] mqnic 0000:00:02.0: Creating interface 0\r", "[    0.868919] mqnic 0000:00:02.0: IF ID: 0x00000000\r", "[    0.868919] mqnic 0000:00:02.0: IF features: 0x00000000\r", "[    0.868919] mqnic 0000:00:02.0: Event queue count: 1\r", "[    0.868919] mqnic 0000:00:02.0: Event queue offset: 0x00100000\r", "[    0.868919] mqnic 0000:00:02.0: TX queue count: 1\r", "[    0.869919] mqnic 0000:00:02.0: TX queue offset: 0x00200000\r", "[    0.869919] mqnic 0000:00:02.0: TX completion queue count: 1\r", "[    0.869919] mqnic 0000:00:02.0: TX completion queue offset: 0x00400000\r", "[    0.869919] mqnic 0000:00:02.0: RX queue count: 1\r", "[    0.869919] mqnic 0000:00:02.0: RX queue offset: 0x00600000\r", "[    0.869919] mqnic 0000:00:02.0: RX completion queue count: 1\r", "[    0.869919] mqnic 0000:00:02.0: RX completion queue offset: 0x00700000\r", "[    0.869919] mqnic 0000:00:02.0: Port count: 1\r", "[    0.869919] mqnic 0000:00:02.0: Port offset: 0x00800000\r", "[    0.869919] mqnic 0000:00:02.0: Port stride: 0x00200000\r", "[    0.869919] mqnic 0000:00:02.0: Bad MAC in EEPROM; using random MAC\r", "[    0.869919] mqnic 0000:00:02.0: Max desc block size: 1\r", "[    0.870918] mqnic 0000:00:02.0: Port ID: 0x00000000\r", "[    0.870918] mqnic 0000:00:02.0: Port features: 0x00000000\r", "[    0.870918] mqnic 0000:00:02.0: Port MTU: 2048\r", "[    0.870918] mqnic 0000:00:02.0: Scheduler count: 1\r", "[    0.870918] mqnic 0000:00:02.0: Scheduler offset: 0x00100000\r", "[    0.870918] mqnic 0000:00:02.0: Scheduler stride: 0x00100000\r", "[    0.870918] mqnic 0000:00:02.0: Scheduler type: 0x00000000\r", "+ ip link set dev eth0 up\r", "[    0.882917] mqnic 0000:00:02.0: mqnic_open on port 0\r", "+ ip addr add 10.0.0.1/24 dev eth0\r", "+ iperf -s -l 32M -w 32M\r", "------------------------------------------------------------\r", "Server listening on TCP port 5001\r", "TCP window size:  416 KByte (WARNING: requested 32.0 MByte)\r", "------------------------------------------------------------\r", "[  5] local 10.0.0.1 port 5001 connected with 10.0.0.2 port 59924\r", "[  6] local 10.0.0.1 port 5001 connected with 10.0.0.2 port 59926\r", "[    8.551751] random: crng init done\r", "[ ID] Interval       Transfer     Bandwidth\r", "[  6]  0.0-10.4 sec   672 MBytes   543 Mbits/sec\r", "[  5]  0.0-10.4 sec   672 MBytes   543 Mbits/sec\r", "[SUM]  0.0-10.4 sec  1.31 GBytes  1.09 Gbits/sec\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB.  Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /DS/endhost-networking/work/sim/antoine/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000  pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 1938805285302.  Starting simulation...", "info: Entering event queue @ 1938805295302.  Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 1938805295625.  Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: Tried to clear PCI interrupt 14"]}, "host.client.0": {"class": "Gem5Host", "cmd": ["/DS/endhost-networking/work/sim/antoine/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/antoinek-work/pcilat-gt-cb-switch-500/1/gem5-out.client.0", "/DS/endhost-networking/work/sim/antoine/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=3GHz", "--sys-clock=1GHz", "--checkpoint-dir=/DS/endhost-networking/work/sim/antoine/endhostsim-code/experiments/checkpoints/pcilat-gt-cb-switch-500/0/gem5-cp.client.0", "--kernel=/DS/endhost-networking/work/sim/antoine/endhostsim-code/images/vmlinux", "--disk-image=/DS/endhost-networking/work/sim/antoine/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/antoinek-work/pcilat-gt-cb-switch-500/1/cfg.client.0.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/antoinek-work/pcilat-gt-cb-switch-500/1/nic.pci.client.0.", "--cosim-shm=/local/var/tmp/antoinek-work/pcilat-gt-cb-switch-500/1/nic.shm.client.0.", "--cosim-sync", "--cosim-pci-lat=500", "--cosim-sync-int=200"], "stdout": ["gem5 Simulator System.  http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec  9 2020 23:42:29", "gem5 started Dec 10 2020 00:29:39", "gem5 executing on spyder07, pid 842", "command line: /DS/endhost-networking/work/sim/antoine/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/antoinek-work/pcilat-gt-cb-switch-500/1/gem5-out.client.0 /DS/endhost-networking/work/sim/antoine/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=3GHz --sys-clock=1GHz --checkpoint-dir=/DS/endhost-networking/work/sim/antoine/endhostsim-code/experiments/checkpoints/pcilat-gt-cb-switch-500/0/gem5-cp.client.0 --kernel=/DS/endhost-networking/work/sim/antoine/endhostsim-code/images/vmlinux --disk-image=/DS/endhost-networking/work/sim/antoine/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/antoinek-work/pcilat-gt-cb-switch-500/1/cfg.client.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/antoinek-work/pcilat-gt-cb-switch-500/1/nic.pci.client.0. --cosim-shm=/local/var/tmp/antoinek-work/pcilat-gt-cb-switch-500/1/nic.shm.client.0. --cosim-sync --cosim-pci-lat=500 --cosim-sync-int=200", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", "      0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan  1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 1942648570513", "switching cpus", "**** REAL SIMULATION ****", "+ insmod /tmp/guest/mqnic.ko\r", "[    0.862919] mqnic: loading out-of-tree module taints kernel.\r", "[    0.863919] mqnic 0000:00:02.0: mqnic probe\r", "[    0.863919] mqnic 0000:00:02.0: enabling device (0000 -> 0002)\r", "[    0.863919] mqnic 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[    0.864919] mqnic 0000:00:02.0: FW ID: 0x00000020\r", "[    0.864919] mqnic 0000:00:02.0: FW version: 0.1\r", "[    0.864919] mqnic 0000:00:02.0: Board ID: 0x43215678\r", "[    0.864919] mqnic 0000:00:02.0: Board version: 0.1\r", "[    0.864919] mqnic 0000:00:02.0: PHC count: 1\r", "[    0.864919] mqnic 0000:00:02.0: PHC offset: 0x00000200\r", "[    0.864919] mqnic 0000:00:02.0: IF count: 1\r", "[    0.864919] mqnic 0000:00:02.0: IF stride: 0x00080000\r", "[    0.864919] mqnic 0000:00:02.0: IF CSR offset: 0x00080000\r", "[    0.864919] mqnic 0000:00:02.0: Failed to read MAC from EEPROM; no EEPROM I2C client registered\r", "[    0.864919] mqnic 0000:00:02.0: registered PHC (index 0)\r", "[    0.864919] mqnic 0000:00:02.0: Creating interface 0\r", "[    0.869918] mqnic 0000:00:02.0: IF ID: 0x00000000\r", "[    0.869918] mqnic 0000:00:02.0: IF features: 0x00000000\r", "[    0.869918] mqnic 0000:00:02.0: Event queue count: 1\r", "[    0.869918] mqnic 0000:00:02.0: Event queue offset: 0x00100000\r", "[    0.869918] mqnic 0000:00:02.0: TX queue count: 1\r", "[    0.869918] mqnic 0000:00:02.0: TX queue offset: 0x00200000\r", "[    0.869918] mqnic 0000:00:02.0: TX completion queue count: 1\r", "[    0.869918] mqnic 0000:00:02.0: TX completion queue offset: 0x00400000\r", "[    0.869918] mqnic 0000:00:02.0: RX queue count: 1\r", "[    0.869918] mqnic 0000:00:02.0: RX queue offset: 0x00600000\r", "[    0.869918] mqnic 0000:00:02.0: RX completion queue count: 1\r", "[    0.869918] mqnic 0000:00:02.0: RX completion queue offset: 0x00700000\r", "[    0.869918] mqnic 0000:00:02.0: Port count: 1\r", "[    0.869918] mqnic 0000:00:02.0: Port offset: 0x00800000\r", "[    0.869918] mqnic 0000:00:02.0: Port stride: 0x00200000\r", "[    0.869918] mqnic 0000:00:02.0: Bad MAC in EEPROM; using random MAC\r", "[    0.869918] mqnic 0000:00:02.0: Max desc block size: 1\r", "[    0.870918] mqnic 0000:00:02.0: Port ID: 0x00000000\r", "[    0.870918] mqnic 0000:00:02.0: Port features: 0x00000000\r", "[    0.870918] mqnic 0000:00:02.0: Port MTU: 2048\r", "[    0.870918] mqnic 0000:00:02.0: Scheduler count: 1\r", "[    0.870918] mqnic 0000:00:02.0: Scheduler offset: 0x00100000\r", "[    0.870918] mqnic 0000:00:02.0: Scheduler stride: 0x00100000\r", "[    0.870918] mqnic 0000:00:02.0: Scheduler type: 0x00000000\r", "+ ip link set dev eth0 up\r", "[    0.882916] mqnic 0000:00:02.0: mqnic_open on port 0\r", "+ ip addr add 10.0.0.2/24 dev eth0\r", "+ sleep 5\r", "+ iperf -l 32M -w 32M -c 10.0.0.1 -i 1 -P 2\r", "------------------------------------------------------------\r", "Client connecting to 10.0.0.1, TCP port 5001\r", "TCP window size:  416 KByte (WARNING: requested 32.0 MByte)\r", "------------------------------------------------------------\r", "[  4] local 10.0.0.2 port 59924 connected with 10.0.0.1 port 5001\r", "[  5] local 10.0.0.2 port 59926 connected with 10.0.0.1 port 5001\r", "[    8.753720] random: crng init done\r", "[ ID] Interval       Transfer     Bandwidth\r", "[  4]  0.0- 1.0 sec  96.0 MBytes   805 Mbits/sec\r", "[  5]  0.0- 1.0 sec  96.0 MBytes   805 Mbits/sec\r", "[SUM]  0.0- 1.0 sec   192 MBytes  1.61 Gbits/sec\r", "[  4]  1.0- 2.0 sec  64.0 MBytes   537 Mbits/sec\r", "[  5]  1.0- 2.0 sec  64.0 MBytes   537 Mbits/sec\r", "[SUM]  1.0- 2.0 sec   128 MBytes  1.07 Gbits/sec\r", "[  4]  2.0- 3.0 sec  64.0 MBytes   537 Mbits/sec\r", "[  5]  2.0- 3.0 sec  64.0 MBytes   537 Mbits/sec\r", "[SUM]  2.0- 3.0 sec   128 MBytes  1.07 Gbits/sec\r", "[  5]  3.0- 4.0 sec  64.0 MBytes   537 Mbits/sec\r", "[  4]  3.0- 4.0 sec  64.0 MBytes   537 Mbits/sec\r", "[SUM]  3.0- 4.0 sec   128 MBytes  1.07 Gbits/sec\r", "[  5]  4.0- 5.0 sec  64.0 MBytes   537 Mbits/sec\r", "[  4]  4.0- 5.0 sec  64.0 MBytes   537 Mbits/sec\r", "[SUM]  4.0- 5.0 sec   128 MBytes  1.07 Gbits/sec\r", "[  5]  5.0- 6.0 sec  64.0 MBytes   537 Mbits/sec\r", "[  4]  5.0- 6.0 sec  64.0 MBytes   537 Mbits/sec\r", "[SUM]  5.0- 6.0 sec   128 MBytes  1.07 Gbits/sec\r", "[  5]  6.0- 7.0 sec  64.0 MBytes   537 Mbits/sec\r", "[  4]  6.0- 7.0 sec  64.0 MBytes   537 Mbits/sec\r", "[SUM]  6.0- 7.0 sec   128 MBytes  1.07 Gbits/sec\r", "[  5]  7.0- 8.0 sec  64.0 MBytes   537 Mbits/sec\r", "[  4]  7.0- 8.0 sec  64.0 MBytes   537 Mbits/sec\r", "[SUM]  7.0- 8.0 sec   128 MBytes  1.07 Gbits/sec\r", "[  5]  8.0- 9.0 sec  64.0 MBytes   537 Mbits/sec\r", "[  4]  8.0- 9.0 sec  64.0 MBytes   537 Mbits/sec\r", "[SUM]  8.0- 9.0 sec   128 MBytes  1.07 Gbits/sec\r", "[  5]  9.0-10.0 sec  64.0 MBytes   537 Mbits/sec\r", "[  5]  0.0-10.4 sec   672 MBytes   544 Mbits/sec\r", "[  4]  9.0-10.0 sec  64.0 MBytes   537 Mbits/sec\r", "[SUM]  9.0-10.0 sec   128 MBytes  1.07 Gbits/sec\r", "[  4]  0.0-10.4 sec   672 MBytes   543 Mbits/sec\r", "[SUM]  0.0-10.4 sec  1.31 GBytes  1.09 Gbits/sec\r", "+ m5 exit\r", "Exiting @ tick 19099235547099 because m5_exit instruction encountered"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB.  Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /DS/endhost-networking/work/sim/antoine/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000  pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 1942648560513.  Starting simulation...", "info: Entering event queue @ 1942648570513.  Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 1942648570836.  Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: Tried to clear PCI interrupt 14"]}}, "success": true}