{"exp_name":"gt-ib-dumbbell-DCTCPm83200-4000","start_time":1607019298.4283316,"end_time":1607061356.0198317,"sims":{"nic.server.0.":{"class":"I40eNIC","cmd":["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm","/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-4000/1/nic.pci.server.0.","/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-4000/1/nic.eth.server.0.","/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-4000/1/nic.shm.server.0.","0","0","500","500","500"],"stdout":["eth connection accepted","eth intro sent","pci connection accepted","pci intro sent","pci host info received","eth net info received"],"stderr":["1d6161e642a8","sync_pci=1 sync_eth=1","exit main_time: 15572289773000"]},"nic.server.1.":{"class":"I40eNIC","cmd":["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm","/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-4000/1/nic.pci.server.1.","/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-4000/1/nic.eth.server.1.","/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-4000/1/nic.shm.server.1.","0","0","500","500","500"],"stdout":["eth connection accepted","eth intro sent","pci connection accepted","pci intro sent","pci host info received","eth net info received"],"stderr":["299e50346714","sync_pci=1 sync_eth=1","exit main_time: 15572289752000"]},"nic.client.0.":{"class":"I40eNIC","cmd":["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm","/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-4000/1/nic.pci.client.0.","/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-4000/1/nic.eth.client.0.","/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-4000/1/nic.shm.client.0.","0","0","500","500","500"],"stdout":["eth connection accepted","eth intro sent","pci connection accepted","pci intro sent","pci host info received","eth net info received"],"stderr":["3a27c94f61e0","sync_pci=1 sync_eth=1","exit main_time: 15572289755000"]},"nic.client.1.":{"class":"I40eNIC","cmd":["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm","/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-4000/1/nic.pci.client.1.","/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-4000/1/nic.eth.client.1.","/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-4000/1/nic.shm.client.1.","0","0","500","500","500"],"stdout":["eth connection accepted","eth intro sent","pci connection accepted","pci intro sent","pci host info received","eth net info received"],"stderr":["79518cd533fc","sync_pci=1 sync_eth=1","exit main_time: 15572289143400"]},"net.":{"class":"NS3DumbbellNet","cmd":["/home/hejingli/endhostsim-code/ns-3/cosim-run.sh","cosim","cosim-dumbbell-example","--CosimPortLeft=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-4000/1/nic.eth.server.0.","--CosimPortLeft=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-4000/1/nic.eth.server.1.","--CosimPortRight=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-4000/1/nic.eth.client.0.","--CosimPortRight=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-4000/1/nic.eth.client.1.","--LinkRate=10Gb/s","--LinkLatency=500ns","--EcnTh=83200"],"stdout":[],"stderr":[]},"host.server.0":{"class":"Gem5Host","cmd":["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt","--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-4000/1/gem5-out.server.0","/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py","--caches","--l2cache","--l3cache","--l1d_size=32kB","--l1i_size=32kB","--l2_size=2MB","--l3_size=32MB","--cacheline_size=64","--cpu-clock=5GHz","--sys-clock=1GHz","--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm83200-4000/0/gem5-cp.server.0","--kernel=/home/hejingli/endhostsim-code/images/vmlinux","--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw","--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-4000/1/cfg.server.0.tar","--cpu-type=TimingSimpleCPU","--mem-size=8192MB","--num-cpus=1","--ddio-enabled","--ddio-way-part=8","--mem-type=DDR4_2400_16x4","-r","0","--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-4000/1/nic.pci.server.0.","--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-4000/1/nic.shm.server.0.","--cosim-sync","--cosim-sync_mode=0","--cosim-pci-lat=500","--cosim-sync-int=500","--cosim-type=i40e"],"stdout":["gem5 Simulator System. http://gem5.org","gem5 is copyrighted software; use the --copyright option for details.","","gem5 version 20.0.0.1","gem5 compiled Dec 3 2020 17:56:02","gem5 started Dec 3 2020 19:15:00","gem5 executing on spyder11, pid 51343","command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-4000/1/gem5-out.server.0 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm83200-4000/0/gem5-cp.server.0 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-4000/1/cfg.server.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-4000/1/nic.pci.server.0. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-4000/1/nic.shm.server.0. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e","","info: Standard input is not a terminal, disabling listeners.","CEHCKPOINT RESTORE THINGIE","Global frequency set at 1000000000000 ticks per second"," 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012","Switch at curTick count:10000","Switched CPUS @ tick 2220667972000","switching cpus","**** REAL SIMULATION ****","+ modprobe i40e\r","[ 1.040894] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r","[ 1.040894] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r","[ 1.041894] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r","[ 1.041894] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r","[ 1.048893] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r","[ 1.048893] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r","[ 1.166875] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r","[ 1.167875] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r","[ 1.167875] i40e 0000:00:02.0: MAC address: a8:42:e6:61:61:1d\r","[ 1.168875] i40e 0000:00:02.0: FW LLDP is enabled\r","[ 1.170874] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r","[ 1.247863] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r","[ 1.247863] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r","[ 1.247863] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r","[ 1.247863] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r","+ ethtool -G eth0 rx 4096 tx 4096\r","+ ethtool -K eth0 tso off\r","[ 1.343848] i40e 0000:00:02.0: FW LLDP is enabled\r","+ ip link set eth0 txqueuelen 13888\r","+ ip link set dev eth0 mtu 4000 up\r","[ 1.351847] i40e 0000:00:02.0 eth0: changing MTU from 1500 to 4000\r","[ 1.357846] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r","+ ip addr add 192.168.64.1/24 dev eth0\r","+ iperf -s -w 1M -Z dctcp\r","------------------------------------------------------------\r","Server listening on TCP port 5001\r","TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r","------------------------------------------------------------\r","[ 5] local 192.168.64.1 port 5001 connected with 192.168.64.3 port 33010\r","[ 2.415685] random: crng init done\r","[ ID] Interval Transfer Bandwidth\r","[ 5] 0.0-10.0 sec 5.00 GBytes 4.29 Gbits/sec\r"],"stderr":["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.","warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.","warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.","warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.","warn: No dot file generated. Please install pydot to generate the dot file and pdf.","warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)","warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)","info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux","warn: Sockets disabled, not accepting terminal connections","warn: pollInterval=100000000 pciAsync=500000","warn: Sockets disabled, not accepting gdb connections","warn: Reading current count from inactive timer.","warn: TimingPioPort::getAddrRanges()","warn: TimingPioPort::getAddrRanges()","info: Entering event queue @ 2220667962000. Starting simulation...","warn: PowerState: Already in the requested power state, request ignored","info: Entering event queue @ 2220667972000. Starting simulation...","warn: instruction 'fwait' unimplemented","warn: instruction 'verw_Mw_or_Rv' unimplemented","warn: Don't know what interrupt to clear for console.","warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!","warn: Tried to clear PCI interrupt 14"]},"host.server.1":{"class":"Gem5Host","cmd":["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt","--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-4000/1/gem5-out.server.1","/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py","--caches","--l2cache","--l3cache","--l1d_size=32kB","--l1i_size=32kB","--l2_size=2MB","--l3_size=32MB","--cacheline_size=64","--cpu-clock=5GHz","--sys-clock=1GHz","--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm83200-4000/0/gem5-cp.server.1","--kernel=/home/hejingli/endhostsim-code/images/vmlinux","--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw","--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-4000/1/cfg.server.1.tar","--cpu-type=TimingSimpleCPU","--mem-size=8192MB","--num-cpus=1","--ddio-enabled","--ddio-way-part=8","--mem-type=DDR4_2400_16x4","-r","0","--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-4000/1/nic.pci.server.1.","--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-4000/1/nic.shm.server.1.","--cosim-sync","--cosim-sync_mode=0","--cosim-pci-lat=500","--cosim-sync-int=500","--cosim-type=i40e"],"stdout":["gem5 Simulator System. http://gem5.org","gem5 is copyrighted software; use the --copyright option for details.","","gem5 version 20.0.0.1","gem5 compiled Dec 3 2020 17:56:02","gem5 started Dec 3 2020 19:15:00","gem5 executing on spyder11, pid 51345","command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-4000/1/gem5-out.server.1 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm83200-4000/0/gem5-cp.server.1 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-4000/1/cfg.server.1.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-4000/1/nic.pci.server.1. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-4000/1/nic.shm.server.1. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e","","info: Standard input is not a terminal, disabling listeners.","CEHCKPOINT RESTORE THINGIE","Global frequency set at 1000000000000 ticks per second"," 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012","Switch at curTick count:10000","Switched CPUS @ tick 2177535334200","switching cpus","**** REAL SIMULATION ****","+ modprobe i40e\r","[ 1.048892] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r","[ 1.048892] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r","[ 1.048892] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r","[ 1.048892] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r","[ 1.056891] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r","[ 1.056891] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r","[ 1.174873] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r","[ 1.175873] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r","[ 1.175873] i40e 0000:00:02.0: MAC address: 14:67:34:50:9e:29\r","[ 1.175873] i40e 0000:00:02.0: FW LLDP is enabled\r","[ 1.178873] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r","[ 1.255861] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r","[ 1.255861] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r","[ 1.255861] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r","[ 1.255861] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r","+ ethtool -G eth0 rx 4096 tx 4096\r","+ ethtool -K eth0 tso off\r","[ 1.351846] i40e 0000:00:02.0: FW LLDP is enabled\r","+ ip link set eth0 txqueuelen 13888\r","+ ip link set dev eth0 mtu 4000 up\r","[ 1.359845] i40e 0000:00:02.0 eth0: changing MTU from 1500 to 4000\r","[ 1.365844] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r","+ ip addr add 192.168.64.2/24 dev eth0\r","+ iperf -s -w 1M -Z dctcp\r","------------------------------------------------------------\r","Server listening on TCP port 5001\r","TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r","------------------------------------------------------------\r","[ 5] local 192.168.64.2 port 5001 connected with 192.168.64.4 port 34224\r","[ 2.436681] random: crng init done\r","[ ID] Interval Transfer Bandwidth\r","[ 5] 0.0-10.0 sec 4.94 GBytes 4.24 Gbits/sec\r"],"stderr":["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.","warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.","warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.","warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.","warn: No dot file generated. Please install pydot to generate the dot file and pdf.","warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)","warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)","info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux","warn: Sockets disabled, not accepting terminal connections","warn: pollInterval=100000000 pciAsync=500000","warn: Sockets disabled, not accepting gdb connections","warn: Reading current count from inactive timer.","warn: TimingPioPort::getAddrRanges()","warn: TimingPioPort::getAddrRanges()","info: Entering event queue @ 2177535324200. Starting simulation...","warn: PowerState: Already in the requested power state, request ignored","info: Entering event queue @ 2177535334200. Starting simulation...","warn: instruction 'fwait' unimplemented","warn: instruction 'verw_Mw_or_Rv' unimplemented","warn: Don't know what interrupt to clear for console.","warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!","warn: Tried to clear PCI interrupt 14","warn: PowerState: More than one power state change request encountered within the same simulation tick"]},"host.client.0":{"class":"Gem5Host","cmd":["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt","--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-4000/1/gem5-out.client.0","/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py","--caches","--l2cache","--l3cache","--l1d_size=32kB","--l1i_size=32kB","--l2_size=2MB","--l3_size=32MB","--cacheline_size=64","--cpu-clock=5GHz","--sys-clock=1GHz","--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm83200-4000/0/gem5-cp.client.0","--kernel=/home/hejingli/endhostsim-code/images/vmlinux","--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw","--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-4000/1/cfg.client.0.tar","--cpu-type=TimingSimpleCPU","--mem-size=8192MB","--num-cpus=1","--ddio-enabled","--ddio-way-part=8","--mem-type=DDR4_2400_16x4","-r","0","--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-4000/1/nic.pci.client.0.","--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-4000/1/nic.shm.client.0.","--cosim-sync","--cosim-sync_mode=0","--cosim-pci-lat=500","--cosim-sync-int=500","--cosim-type=i40e"],"stdout":["gem5 Simulator System. http://gem5.org","gem5 is copyrighted software; use the --copyright option for details.","","gem5 version 20.0.0.1","gem5 compiled Dec 3 2020 17:56:02","gem5 started Dec 3 2020 19:15:00","gem5 executing on spyder11, pid 51349","command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-4000/1/gem5-out.client.0 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm83200-4000/0/gem5-cp.client.0 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-4000/1/cfg.client.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-4000/1/nic.pci.client.0. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-4000/1/nic.shm.client.0. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e","","info: Standard input is not a terminal, disabling listeners.","CEHCKPOINT RESTORE THINGIE","Global frequency set at 1000000000000 ticks per second"," 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012","Switch at curTick count:10000","Switched CPUS @ tick 2226685663200","switching cpus","**** REAL SIMULATION ****","+ modprobe i40e\r","[ 1.033892] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r","[ 1.033892] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r","[ 1.033892] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r","[ 1.033892] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r","[ 1.041891] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r","[ 1.041891] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r","[ 1.159873] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r","[ 1.160873] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r","[ 1.160873] i40e 0000:00:02.0: MAC address: e0:61:4f:c9:27:3a\r","[ 1.160873] i40e 0000:00:02.0: FW LLDP is enabled\r","[ 1.162873] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r","[ 1.247860] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r","[ 1.247860] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r","[ 1.247860] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r","[ 1.247860] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r","+ ethtool -G eth0 rx 4096 tx 4096\r","+ ethtool -K eth0 tso off\r","[ 1.343845] i40e 0000:00:02.0: FW LLDP is enabled\r","+ ip link set eth0 txqueuelen 13888\r","+ ip link set dev eth0 mtu 4000 up\r","[ 1.351844] i40e 0000:00:02.0 eth0: changing MTU from 1500 to 4000\r","[ 1.357843] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r","+ ip addr add 192.168.64.3/24 dev eth0\r","+ sleep 1\r","+ iperf -w 1M -c 192.168.64.1 -Z dctcp -i 1\r","------------------------------------------------------------\r","Client connecting to 192.168.64.1, TCP port 5001\r","TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r","------------------------------------------------------------\r","[ 4] local 192.168.64.3 port 33010 connected with 192.168.64.1 port 5001\r","[ 2.487671] random: crng init done\r","[ ID] Interval Transfer Bandwidth\r","[ 4] 0.0- 1.0 sec 505 MBytes 4.23 Gbits/sec\r","[ 4] 1.0- 2.0 sec 509 MBytes 4.27 Gbits/sec\r","[ 4] 2.0- 3.0 sec 500 MBytes 4.19 Gbits/sec\r","[ 4] 3.0- 4.0 sec 522 MBytes 4.38 Gbits/sec\r","[ 4] 4.0- 5.0 sec 503 MBytes 4.22 Gbits/sec\r","[ 4] 5.0- 6.0 sec 518 MBytes 4.35 Gbits/sec\r","[ 4] 6.0- 7.0 sec 524 MBytes 4.39 Gbits/sec\r","[ 4] 7.0- 8.0 sec 516 MBytes 4.33 Gbits/sec\r","[ 4] 8.0- 9.0 sec 513 MBytes 4.30 Gbits/sec\r","[ 4] 9.0-10.0 sec 507 MBytes 4.25 Gbits/sec\r","[ 4] 0.0-10.0 sec 5.00 GBytes 4.29 Gbits/sec\r","+ sleep 20\r"],"stderr":["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.","warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.","warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.","warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.","warn: No dot file generated. Please install pydot to generate the dot file and pdf.","warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)","warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)","info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux","warn: Sockets disabled, not accepting terminal connections","warn: pollInterval=100000000 pciAsync=500000","warn: Sockets disabled, not accepting gdb connections","warn: Reading current count from inactive timer.","warn: TimingPioPort::getAddrRanges()","warn: TimingPioPort::getAddrRanges()","info: Entering event queue @ 2226685653200. Starting simulation...","warn: PowerState: Already in the requested power state, request ignored","info: Entering event queue @ 2226685663200. Starting simulation...","warn: instruction 'fwait' unimplemented","warn: instruction 'verw_Mw_or_Rv' unimplemented","warn: Don't know what interrupt to clear for console.","warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!","warn: Tried to clear PCI interrupt 14","warn: PowerState: More than one power state change request encountered within the same simulation tick","warn: PowerState: More than one power state change request encountered within the same simulation tick","warn: PowerState: More than one power state change request encountered within the same simulation tick"]},"host.client.1":{"class":"Gem5Host","cmd":["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt","--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-4000/1/gem5-out.client.1","/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py","--caches","--l2cache","--l3cache","--l1d_size=32kB","--l1i_size=32kB","--l2_size=2MB","--l3_size=32MB","--cacheline_size=64","--cpu-clock=5GHz","--sys-clock=1GHz","--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm83200-4000/0/gem5-cp.client.1","--kernel=/home/hejingli/endhostsim-code/images/vmlinux","--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw","--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-4000/1/cfg.client.1.tar","--cpu-type=TimingSimpleCPU","--mem-size=8192MB","--num-cpus=1","--ddio-enabled","--ddio-way-part=8","--mem-type=DDR4_2400_16x4","-r","0","--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-4000/1/nic.pci.client.1.","--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-4000/1/nic.shm.client.1.","--cosim-sync","--cosim-sync_mode=0","--cosim-pci-lat=500","--cosim-sync-int=500","--cosim-type=i40e"],"stdout":["gem5 Simulator System. http://gem5.org","gem5 is copyrighted software; use the --copyright option for details.","","gem5 version 20.0.0.1","gem5 compiled Dec 3 2020 17:56:02","gem5 started Dec 3 2020 19:15:00","gem5 executing on spyder11, pid 51351","command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-4000/1/gem5-out.client.1 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm83200-4000/0/gem5-cp.client.1 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-4000/1/cfg.client.1.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-4000/1/nic.pci.client.1. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-4000/1/nic.shm.client.1. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e","","info: Standard input is not a terminal, disabling listeners.","CEHCKPOINT RESTORE THINGIE","Global frequency set at 1000000000000 ticks per second"," 0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan 1 00:00:00 2012","Switch at curTick count:10000","Switched CPUS @ tick 2204201775400","switching cpus","**** REAL SIMULATION ****","+ modprobe i40e\r","[ 1.059889] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r","[ 1.059889] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r","[ 1.059889] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r","[ 1.059889] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r","[ 1.067888] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r","[ 1.067888] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r","[ 1.185870] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r","[ 1.186870] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r","[ 1.186870] i40e 0000:00:02.0: MAC address: fc:33:d5:8c:51:79\r","[ 1.186870] i40e 0000:00:02.0: FW LLDP is enabled\r","[ 1.188869] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r","[ 1.271857] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r","[ 1.271857] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r","[ 1.271857] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r","[ 1.271857] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r","+ ethtool -G eth0 rx 4096 tx 4096\r","+ ethtool -K eth0 tso off\r","[ 1.367842] i40e 0000:00:02.0: FW LLDP is enabled\r","+ ip link set eth0 txqueuelen 13888\r","+ ip link set dev eth0 mtu 4000 up\r","[ 1.375841] i40e 0000:00:02.0 eth0: changing MTU from 1500 to 4000\r","[ 1.381840] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r","+ ip addr add 192.168.64.4/24 dev eth0\r","+ sleep 1\r","+ iperf -w 1M -c 192.168.64.2 -Z dctcp -i 1\r","------------------------------------------------------------\r","Client connecting to 192.168.64.2, TCP port 5001\r","TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r","------------------------------------------------------------\r","[ 4] local 192.168.64.4 port 34224 connected with 192.168.64.2 port 5001\r","[ 2.525666] random: crng init done\r","[ ID] Interval Transfer Bandwidth\r","[ 4] 0.0- 1.0 sec 513 MBytes 4.30 Gbits/sec\r","[ 4] 1.0- 2.0 sec 507 MBytes 4.25 Gbits/sec\r","[ 4] 2.0- 3.0 sec 517 MBytes 4.33 Gbits/sec\r","[ 4] 3.0- 4.0 sec 494 MBytes 4.14 Gbits/sec\r","[ 4] 4.0- 5.0 sec 516 MBytes 4.33 Gbits/sec\r","[ 4] 5.0- 6.0 sec 504 MBytes 4.23 Gbits/sec\r","[ 4] 6.0- 7.0 sec 496 MBytes 4.16 Gbits/sec\r","[ 4] 7.0- 8.0 sec 498 MBytes 4.18 Gbits/sec\r","[ 4] 8.0- 9.0 sec 502 MBytes 4.21 Gbits/sec\r","[ 4] 9.0-10.0 sec 512 MBytes 4.29 Gbits/sec\r","[ 4] 0.0-10.0 sec 4.94 GBytes 4.24 Gbits/sec\r","+ sleep 2\r","+ m5 exit\r","Exiting @ tick 15572288755400 because m5_exit instruction encountered"],"stderr":["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.","warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.","warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.","warn: Physical memory size specified is 8192MB which is greater than 3GB. Twice the number of memory controllers would be created.","warn: No dot file generated. Please install pydot to generate the dot file and pdf.","warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)","warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)","info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux","warn: Sockets disabled, not accepting terminal connections","warn: pollInterval=100000000 pciAsync=500000","warn: Sockets disabled, not accepting gdb connections","warn: Reading current count from inactive timer.","warn: TimingPioPort::getAddrRanges()","warn: TimingPioPort::getAddrRanges()","info: Entering event queue @ 2204201765400. Starting simulation...","warn: PowerState: Already in the requested power state, request ignored","info: Entering event queue @ 2204201775400. Starting simulation...","warn: instruction 'fwait' unimplemented","warn: instruction 'verw_Mw_or_Rv' unimplemented","warn: Don't know what interrupt to clear for console.","warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!","warn: Tried to clear PCI interrupt 14","warn: PowerState: More than one power state change request encountered within the same simulation tick","warn: PowerState: More than one power state change request encountered within the same simulation tick"]}},"success":true}
