- 27 Nov, 2023 1 commit
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comfyanonymous authored
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- 24 Nov, 2023 1 commit
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- 22 Nov, 2023 1 commit
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- 21 Nov, 2023 2 commits
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comfyanonymous authored
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comfyanonymous authored
They will show up if both the taesd_encoder and taesd_decoder or taesdxl model files are present in the models/vae_approx directory.
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- 17 Nov, 2023 1 commit
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comfyanonymous authored
Pytorch supports two variants of fp8: --fp8_e4m3fn-text-enc (the one that seems to give better results) --fp8_e5m2-text-enc
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- 08 Nov, 2023 1 commit
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comfyanonymous authored
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- 02 Nov, 2023 1 commit
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- 28 Oct, 2023 1 commit
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- 27 Oct, 2023 1 commit
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- 18 Oct, 2023 1 commit
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- 17 Oct, 2023 1 commit
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- 13 Oct, 2023 1 commit
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comfyanonymous authored
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- 06 Oct, 2023 1 commit
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comfyanonymous authored
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- 04 Oct, 2023 1 commit
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City authored
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- 28 Sep, 2023 1 commit
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comfyanonymous authored
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- 11 Sep, 2023 1 commit
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- 01 Sep, 2023 1 commit
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- 30 Aug, 2023 1 commit
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- 28 Aug, 2023 2 commits
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comfyanonymous authored
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- 25 Aug, 2023 3 commits
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comfyanonymous authored
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- 24 Aug, 2023 3 commits
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comfyanonymous authored
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comfyanonymous authored
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comfyanonymous authored
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- 23 Aug, 2023 1 commit
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comfyanonymous authored
Do inference in fp32 to make sure quality stays the exact same.
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- 22 Aug, 2023 4 commits
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comfyanonymous authored
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comfyanonymous authored
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comfyanonymous authored
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- 21 Aug, 2023 2 commits
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comfyanonymous authored
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- 19 Aug, 2023 1 commit
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comfyanonymous authored
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- 18 Aug, 2023 1 commit
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comfyanonymous authored
Control loras are controlnets where some of the weights are stored in "lora" format: an up and a down low rank matrice that when multiplied together and added to the unet weight give the controlnet weight. This allows a much smaller memory footprint depending on the rank of the matrices. These controlnets are used just like regular ones.
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- 17 Aug, 2023 2 commits
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comfyanonymous authored
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comfyanonymous authored
Try to keep models on the vram when possible. Better lowvram mode for controlnets.
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- 16 Aug, 2023 1 commit
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comfyanonymous authored
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- 11 Aug, 2023 1 commit
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