Commits · 033b75f559011291c4148dfc63773b7c8852b9d2 · change / sglang · GitLab

10 Sep, 2025 21 commits
- [Auto Sync] Update serving_base.py, serving_chat.py, servin... (20250910) (#10282) · 033b75f5
  Lianmin Zheng authored Sep 10, 2025
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Co-authored-by: github-actions[bot] <github-actions[bot]@users.noreply.github.com>
Co-authored-by: cctry <shiyang@x.ai>
```
  033b75f5
- Feat: support disable tool parser (#10184) · f3b5db6e
  Xinyuan Tong authored Sep 10, 2025
  
  f3b5db6e
- pass a_scale from fp8 quant result instead of hard code to 1.0f (#10241) · 2286e85e
  Rain Jiang authored Sep 10, 2025
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Co-authored-by: Yichen Wang <yichen.wang@bytedance.com>
Co-authored-by: Jinwu Guo <641876696@qq.com>
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  2286e85e
- Add tests to AMD CI for MI35x (#9662) · 91b3555d
  Hubert Lu authored Sep 10, 2025
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Co-authored-by: Sai Enduri <saimanas.enduri@amd.com>
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  91b3555d
- add dual stream for qwen2_moe (#10252) · 9e2f7252
  Yi Zhang authored Sep 11, 2025
  
  9e2f7252
- [Bugfix] Fix Weightloading for the original nvidia/Deepseek-R1-FP4 checkpoint (#9940) · 21176b00
  Pavani Majety authored Sep 10, 2025
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Signed-off-by: Pavani Majety <pmajety@nvidia.com>
Co-authored-by: Yineng Zhang <me@zhyncs.com>
Co-authored-by: fzyzcjy <5236035+fzyzcjy@users.noreply.github.com>
```
  21176b00
- [1/2] Refactor LoRA to support backend-specific batch preprocessing. (#10251) · 94100294
  Lifu Huang authored Sep 10, 2025
  
  94100294
- [router] Add PD router mmlu test (#10256) · cda7e47c
  Keyang Ru authored Sep 10, 2025
  
  cda7e47c
- Fix potential flakiness in test_lora_qwen3 (#10250) · e903f695
  Lifu Huang authored Sep 10, 2025
  
  e903f695
- [Auto Sync] Update io_struct.py (20250910) (#10262) · 27760fc1
  Lianmin Zheng authored Sep 10, 2025
```
Co-authored-by: github-actions[bot] <github-actions[bot]@users.noreply.github.com>
Co-authored-by: Kan Wu <wukanustc@gmail.com>
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  27760fc1
- Fix assertion typo in tp_worker.py (#9954) · 0ac809de
  Seunggeun Cho authored Sep 10, 2025
  
  0ac809de
- support vlm model spec bench (#10173) · 4efe2c57
  Lzhang-hub authored Sep 10, 2025
  
  4efe2c57
- Page first direct IO kernel (#10060) · 5be8c2f7
  huangtingwei authored Sep 10, 2025
```
Co-authored-by: Zhiqiang Xie <xiezhq@stanford.edu>
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  5be8c2f7
- Fix: the default choice is wrong for flashinfer mxfp4 moe precision (#10253) · 737d73ed
  Yiyu Liu authored Sep 10, 2025
  
  737d73ed
- [doc] add walkthrough for implementing and hosting a simple llama wrapper m… (#10093) · ebd0e1c1
  Glen Liu authored Sep 10, 2025
  
  ebd0e1c1
- [Benchmark] Prefil-only benchmark scripts (#10240) · a1d03892
  Sundara Raman Ramachandran authored Sep 09, 2025
  
  a1d03892
- [UT for RL] Add UT to cover release/resume memory case for moe model (#8803) · dccf52f9
  ryang authored Sep 10, 2025
  
  dccf52f9
- make --speculative-draft-model an alias of --speculative-draft-model-path (#10246) · 676a7b51
  Lianmin Zheng authored Sep 09, 2025
  
  676a7b51
- refactor(InternVL): Use gpu to preprocess the input image (#9795) · 15f99347
  Kevin Tuan authored Sep 10, 2025
  
  15f99347
- Revert "chore: upgrade v0.3.9 sgl-kernel" (#10245) · bcf1955f
  Lianmin Zheng authored Sep 09, 2025
  
  bcf1955f
- [Auto Sync] Update collector.py, startup_func_log_and_timer... (20250910) (#10242) · a06bf664
  Lianmin Zheng authored Sep 09, 2025
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Co-authored-by: github-actions[bot] <github-actions[bot]@users.noreply.github.com>
Co-authored-by: cctry <shiyang@x.ai>
```
  a06bf664
09 Sep, 2025 19 commits
- [Auto Sync] Update io_struct.py (20250909) (#10236) · bf72b801
  Lianmin Zheng authored Sep 09, 2025
```
Co-authored-by: github-actions[bot] <github-actions[bot]@users.noreply.github.com>
Co-authored-by: cctry <shiyang@x.ai>
```
  bf72b801
- Add mamba kernel (#10234) · 8cbe1538
  Yi Zhang authored Sep 10, 2025
  
  8cbe1538
- [HiCache] feat: add mooncake backend extra config (#10213) · 8471e5e6
  Teng Ma authored Sep 10, 2025
  
  8471e5e6
- Revert "Revert the changes on NCCL symmetric memory" (#10238) · 4582931a
  Lianmin Zheng authored Sep 09, 2025
  
  4582931a
- Revert the changes on NCCL symmetric memory (#10210) · d352c29a
  Lianmin Zheng authored Sep 09, 2025
```
Co-authored-by: Yineng Zhang <me@zhyncs.com>
```
  d352c29a
- chore: upgrade v0.3.9 sgl-kernel (#10220) · d3ee7098
  Yineng Zhang authored Sep 09, 2025
  
  d3ee7098
- [Fix] KV-cache eviction mismatch across PP ranks in DeepSeek V3/R1 (#10214) · 71fc7b7f
  Rain H authored Sep 09, 2025
  
  71fc7b7f
- add variable TP Decode > Prefill size support (#9960) · 9ab72f98
  shaharmor98 authored Sep 09, 2025
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Signed-off-by: Shahar Mor <smor@nvidia.com>
```
  9ab72f98
- chore: bump v0.3.9 sgl-kernel (#10208) · f3817cb0
  Yineng Zhang authored Sep 09, 2025
  
  f3817cb0
- [Auto Sync] Update sampling_batch_info.py (20250909) (#10212) · 71133a04
  Lianmin Zheng authored Sep 09, 2025
```
Co-authored-by: github-actions[bot] <github-actions[bot]@users.noreply.github.com>
Co-authored-by: cctry <shiyang@x.ai>
```
  71133a04
- tool-call(dsv3): Fixed a parse problem when there are multiple function... · 2cd94dd0
  Yiming authored Sep 09, 2025
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tool-call(dsv3): Fixed a parse problem when there are multiple function definitions in tool_calls (#10209)
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  2cd94dd0
- Refactor fused_add_rmsnorm import logic (#10207) · f5f6b3b4
  Shangming Cai authored Sep 09, 2025
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Signed-off-by: Shangming Cai <csmthu@gmail.com>
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  f5f6b3b4
- feat: support fa cute in sgl-kernel (#10205) · 94fb4e9e
  Yineng Zhang authored Sep 09, 2025
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Co-authored-by: cicirori <32845984+cicirori@users.noreply.github.com>
```
  94fb4e9e
- [CPU] Add gelu_and_mul kernel in sgl-kernel and add ut (#9300) · d1d4074c
  blzheng authored Sep 09, 2025
  
  d1d4074c
- Explicitly export CMAKE_BUILD_PARALLEL_LEVEL (#10193) · 718f25ae
  Keyang Ru authored Sep 08, 2025
  
  718f25ae
- [Refactor] Remove Hicache Load & Write threads (#10127) · 948b01a0
  DarkSharpness authored Sep 08, 2025
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Co-authored-by: Zhiqiang Xie <xiezhq@stanford.edu>
```
  948b01a0
- feat: use sgl-kernel cu129 as default (#10188) · cdc56ef6
  Yineng Zhang authored Sep 08, 2025
  
  cdc56ef6
- Support opt model (#10165) · 16ff3d4b
  wenhuipeng authored Sep 09, 2025
  
  16ff3d4b
- [1/N]DP refactor: Improve dp rank scheduling in PD disaggregation mode. (#10169) · 83d55ac5
  Liangsheng Yin authored Sep 09, 2025
  
  83d55ac5