Commits · f09daea261ee98340512e7c7a5fce09db6f8ab72 · OpenDAS / vllm_cscc

31 Mar, 2026 1 commit
- [CPU] Support int8 compute mode in CPU AWQ (#35697) · f09daea2
  Yintong Lu authored Mar 31, 2026
```
Signed-off-by: Yintong Lu <yintong.lu@intel.com>
```
  f09daea2
14 Mar, 2026 1 commit

[UX] Improve UX of CPU backend (#36968) · 092ace9e

Li, Jiang authored Mar 14, 2026

Signed-off-by: jiang1.li <jiang1.li@intel.com>
Signed-off-by: Li, Jiang <bigpyj64@gmail.com>
Co-authored-by: gemini-code-assist[bot] <176961590+gemini-code-assist[bot]@users.noreply.github.com>

092ace9e

11 Mar, 2026 1 commit
- feat: add RISC-V support for CPU backend (v2) (#36578) · 41846537
  typer-J authored Mar 11, 2026
```
Signed-off-by: typer-J <2236066784@qq.com>
Co-authored-by: Li, Jiang <jiang1.li@intel.com>
```
  41846537
06 Mar, 2026 1 commit
- cpu: aarch64: Upgrade OneDNN for aarch64 to add support for int8 matmul (#36147) · 0a49676f
  Nikhil Gupta authored Mar 06, 2026
```
Signed-off-by: Nikhil Gupta <nikhil.gupta2@arm.com>
```
  0a49676f
28 Feb, 2026 1 commit
- [CI/Build] CPU release supports both of AVX2 and AVX512 (#35466) · 90805ff4
  Ma Jian authored Feb 28, 2026
```
Signed-off-by: jiang1.li <jiang1.li@intel.com>
Co-authored-by: jiang1.li <jiang1.li@intel.com>
```
  90805ff4
15 Feb, 2026 1 commit
- [CPU][ARM] Add ARM BF16 cross-compilation support and improve documen… (#33079) · f07a1284
  Maryam Tahhan authored Feb 15, 2026
```
Signed-off-by: Maryam Tahhan <mtahhan@redhat.com>
Co-authored-by: Li, Jiang <jiang1.li@intel.com>
```
  f07a1284
04 Feb, 2026 1 commit
- [CPU] Split attention dispatch by head_dim alignment (#32161) · 4dffc5e0
  R3hankhan authored Feb 04, 2026
```
Signed-off-by: Rehan Khan <Rehan.Khan7@ibm.com>
```
  4dffc5e0
24 Jan, 2026 1 commit

[CPU] Improve CPU Docker build (#30953) · 203d0bc0

Maryam Tahhan authored Jan 24, 2026


Signed-off-by: Maryam Tahhan <mtahhan@redhat.com>
Co-authored-by: Li, Jiang <jiang1.li@intel.com>

203d0bc0

22 Jan, 2026 1 commit

[CPU Backend] [Perf] Accelerate tensor-parallel/data-parallel inference across... · 744ef304

Fadi Arafeh authored Jan 22, 2026


[CPU Backend] [Perf] Accelerate tensor-parallel/data-parallel inference across NUMA domains on Arm (#32792)
Signed-off-by: Fadi Arafeh <fadi.arafeh@arm.com>

744ef304

18 Dec, 2025 1 commit
- [CPU] Refactor CPU fused MOE (#30531) · e3ab93c8
  Li, Jiang authored Dec 18, 2025
```
Signed-off-by: jiang1.li <jiang1.li@intel.com>
```
  e3ab93c8
10 Dec, 2025 1 commit
- [CMake][Build]: Remove unused ACL CMake env variables (#30339) · 18034580
  Radu Salavat authored Dec 09, 2025
```
Signed-off-by: Radu Salavat <radu.salavat@arm.com>
```
  18034580
19 Nov, 2025 1 commit
- [CPU] Refactor CPU WNA16 (#28826) · 20852c8f
  Li, Jiang authored Nov 19, 2025
```
Signed-off-by: jiang1.li <jiang1.li@intel.com>
```
  20852c8f
13 Nov, 2025 2 commits

[Hardware][PowerPC] Fix fp16 compilation error for Power in cpu attention... · 86d15bfd

Akash kaothalkar authored Nov 13, 2025


[Hardware][PowerPC] Fix fp16 compilation error for Power in cpu attention backend and bump oneDNN version (#28535)
Signed-off-by: Akash Kaothalkar <akash.kaothalkar@ibm.com>
Co-authored-by: Akash Kaothalkar <akash.kaothalkar@ibm.com>

86d15bfd

[build][cmake]: Bundle static ACL and torch libgomp for CPU extension builds (#28059) · d44fbbab
Radu Salavat authored Nov 12, 2025
```
Signed-off-by: Radu Salavat <radu.salavat@arm.com>
```
d44fbbab

12 Nov, 2025 1 commit
- [CPU] Refactor CPU attention backend (#27954) · 7f829be7
  Li, Jiang authored Nov 12, 2025
```
Signed-off-by: jiang1.li <jiang1.li@intel.com>
```
  7f829be7
08 Nov, 2025 1 commit
- Refactor CPU/GPU extension targets for CMake build (#28026) · d15afc1f
  Abolfazl Shahbazi authored Nov 07, 2025
```
Signed-off-by: Abolfazl Shahbazi <12436063+ashahba@users.noreply.github.com>
```
  d15afc1f
27 Oct, 2025 1 commit
- [cpu][perf] Fix low CPU utilization with VLLM_CPU_OMP_THREADS_BIND on AArch64 (#27415) · a663f6ae
  Fadi Arafeh authored Oct 27, 2025
```
Signed-off-by: Fadi Arafeh <fadi.arafeh@arm.com>
```
  a663f6ae
21 Oct, 2025 1 commit
- [cpu] Dispatch un-quantized linear to oneDNN/ACL by default for AArch64 (#27183) · 163965d1
  Fadi Arafeh authored Oct 21, 2025
```
Signed-off-by: Fadi Arafeh <fadi.arafeh@arm.com>
Co-authored-by: Michael Yang <Michael.Yang@arm.com>
```
  163965d1
11 Oct, 2025 2 commits
- fix(nix): Allow local oneDNN path to fix vLLM CPU build failure (#26401) · 086609de
  ihb2032 authored Oct 11, 2025
```
Signed-off-by: lyd1992 <liuyudong@iscas.ac.cn>
Signed-off-by: ihb2032 <1355790728@qq.com>
```
  086609de
- [CI/Build] Fix ppc64le CPU build and tests (#22443) · 8f8474fb
  Nishidha Panpaliya authored Oct 11, 2025
```
Signed-off-by: Nishidha Panpaliya <nishidha.panpaliya@partner.ibm.com>
```
  8f8474fb
04 Oct, 2025 1 commit

[cpu][perf] Accelerate unquantized-linear for AArch64 through oneDNN/ACL and... · 9705fba7

Fadi Arafeh authored Oct 04, 2025


[cpu][perf] Accelerate unquantized-linear for AArch64 through oneDNN/ACL and weight prepack (#25948)
Signed-off-by: Fadi Arafeh <fadi.arafeh@arm.com>
Co-authored-by: Li, Jiang <jiang1.li@intel.com>

9705fba7

25 Sep, 2025 1 commit
- [Hardware][RISC-V] Add riscv64 support for vLLM with scalar (#22112) · 1e9a77e0
  chenlang authored Sep 25, 2025
```
Signed-off-by: chenlang <chen.lang5@zte.com.cn>
Co-authored-by: chenlang <10346245@zte.com.cn>
```
  1e9a77e0
24 Sep, 2025 1 commit
- [fix]: add Arm 4bit fused moe support (#23809) · 359d2930
  Nikhil Gupta authored Sep 24, 2025
```
Signed-off-by: Nikhil Gupta <nikhil.gupta2@arm.com>
```
  359d2930
04 Sep, 2025 1 commit
- [Hardware][Apple-CPU] Disable OneDNN build for Apple Silicon (#24200) · 369a0795
  Ignacio Sica authored Sep 04, 2025
```
Signed-off-by: ignaciosica <mignacio.sica@gmail.com>
Co-authored-by: Li, Jiang <jiang1.li@intel.com>
```
  369a0795
26 Aug, 2025 1 commit
- [Hardware][Mac] Fix the installation fail for Apple Silicon (CPU) (#23565) · b78bed1b
  En Ouyang authored Aug 26, 2025
```
Signed-off-by: oye93 <en.ouyang93@outlook.com>
Co-authored-by: Li, Jiang <jiang1.li@intel.com>
```
  b78bed1b
21 Aug, 2025 1 commit
- [CPU] Refactor CPU W8A8 scaled_mm (#23071) · 7be5d113
  Li, Jiang authored Aug 21, 2025
```
Signed-off-by: jiang1.li <jiang1.li@intel.com>
```
  7be5d113
25 Jul, 2025 1 commit
- [CI/Build] fix cpu_extension for apple silicon (#21195) · 5140f54b
  Ignacio Sica authored Jul 25, 2025
```
Signed-off-by: ignaciosica <mignacio.sica@gmail.com>
```
  5140f54b
10 Jul, 2025 1 commit
- [Hardware][CPU] Vllm int8 quantization enablement for ARM CPU (#14129) · c7753a98
  nishith-fujitsu authored Jul 10, 2025
```
Signed-off-by: nishith-fujitsu <nishith.jaiswal@fujitsu.com>
```
  c7753a98
03 Jul, 2025 1 commit
- [CI/Build][CPU] Enable cross compilation in CPU release pipeline (#20423) · 7f036710
  Li, Jiang authored Jul 03, 2025
```
Signed-off-by: jiang1.li <jiang1.li@intel.com>
```
  7f036710
01 Jul, 2025 1 commit
- [CPU] Update custom ops for the CPU backend (#20255) · 6cc1e7d9
  Li, Jiang authored Jul 01, 2025
```
Signed-off-by: jiang1.li <jiang1.li@intel.com>
```
  6cc1e7d9
08 Jun, 2025 1 commit
- [Hardware][POWER] Add IBM POWER11 Support to CPU Extension Detection (#19082) · b9a1791e
  Akash kaothalkar authored Jun 08, 2025
```
Signed-off-by: Akash Kaothalkar <akash.kaothalkar@ibm.com>
Co-authored-by: Akash Kaothalkar <akash.kaothalkar@ibm.com>
```
  b9a1791e
08 May, 2025 1 commit

[Hardware][Power] Enable compressed tensor W8A8 INT8 quantization for POWER (#17153) · e515668e

Akash kaothalkar authored May 08, 2025


Signed-off-by: Akash Kaothalkar <akash.kaothalkar@ibm.com>
Co-authored-by: Akash Kaothalkar <akash.kaothalkar@ibm.com>
Co-authored-by: mgoin <mgoin64@gmail.com>

e515668e

05 Apr, 2025 1 commit
- fix: support clang17 for macos and fix the real libomp (#16086) · 6342adc4
  yihong authored Apr 05, 2025
```
Signed-off-by: yihong0618 <zouzou0208@gmail.com>
```
  6342adc4
02 Apr, 2025 1 commit
- [CPU][Bugfix] Using custom allreduce for CPU backend (#15934) · 550b2801
  Li, Jiang authored Apr 02, 2025
```
Signed-off-by: jiang1.li <jiang1.li@intel.com>
```
  550b2801
25 Mar, 2025 1 commit
- [Kernel][CPU] CPU MLA (#14744) · 4f044b1d
  Thien Tran authored Mar 25, 2025
```
Signed-off-by: Thien Tran <gau.nernst@yahoo.com.sg>
```
  4f044b1d
12 Mar, 2025 1 commit

[CPU] Upgrade CPU backend to torch-2.6 (#13381) · ff47aab0

Li, Jiang authored Mar 12, 2025


Signed-off-by: jiang1.li <jiang1.li@intel.com>
Co-authored-by: Isotr0py <2037008807@qq.com>

ff47aab0

06 Mar, 2025 1 commit

Adding cpu inference with VXE ISA for s390x architecture (#12613) · ada19210

Dilip Gowda Bhagavan authored Mar 06, 2025


Signed-off-by: Dilip Gowda Bhagavan <dilip.bhagavan@ibm.com>
Signed-off-by: Rishika Kedia <rishika.kedia@in.ibm.com>
Co-authored-by: Rishika Kedia <rishika.kedia@in.ibm.com>

ada19210

08 Jan, 2025 1 commit
- [Hardware][Apple] Native support for macOS Apple Silicon (#11696) · cfd3219f
  Wallas Henrique authored Jan 08, 2025
```
Signed-off-by: Wallas Santos <wallashss@ibm.com>
Co-authored-by: Michael Goin <michael@neuralmagic.com>
```
  cfd3219f
26 Nov, 2024 1 commit

[Feature] vLLM ARM Enablement for AARCH64 CPUs (#9228) · a6760f64

Sanket Kale authored Nov 26, 2024


Signed-off-by: Sanket Kale <sanketk.kale@fujitsu.com>
Co-authored-by: Sanket Kale <sanketk.kale@fujitsu.com>
Co-authored-by: mgoin <michael@neuralmagic.com>

a6760f64

19 Nov, 2024 1 commit

Fix: Build error seen on Power Architecture (#10421) · 1ea291a4

Manjul Mohan authored Nov 19, 2024


Signed-off-by: Manjul Mohan <manjul.mohan@ibm.com>
Signed-off-by: B-201 <Joy25810@foxmail.com>
Signed-off-by: Isotr0py <2037008807@qq.com>
Signed-off-by: youkaichao <youkaichao@gmail.com>
Signed-off-by: ismael-dm <ismaeldm99@gmail.com>
Signed-off-by: Andrew Nesbitt <andrewnez@gmail.com>
Signed-off-by: mgoin <michael@neuralmagic.com>
Signed-off-by: yan ma <yan.ma@intel.com>
Signed-off-by: Angus Wang <wangjadehao@gmail.com>
Signed-off-by: Lucas Wilkinson <lwilkinson@neuralmagic.com>
Signed-off-by: rickyx <rickyx@anyscale.com>
Signed-off-by: Jee Jee Li <pandaleefree@gmail.com>
Signed-off-by: Mengqing Cao <cmq0113@163.com>
Signed-off-by: Travis Johnson <tsjohnso@us.ibm.com>
Co-authored-by: Manjul Mohan manjul.mohan@ibm.com <manjulmohan@ltcd97-lp2.aus.stglabs.ibm.com>
Co-authored-by: B-201 <Joy25810@foxmail.com>
Co-authored-by: Isotr0py <2037008807@qq.com>
Co-authored-by: youkaichao <youkaichao@gmail.com>
Co-authored-by: ismael-dm <ismaeldm99@gmail.com>
Co-authored-by: Andrew Nesbitt <andrewnez@gmail.com>
Co-authored-by: Michael Goin <michael@neuralmagic.com>
Co-authored-by: Yan Ma <yan.ma@intel.com>
Co-authored-by: Angus Wang <wangjadehao@gmail.com>
Co-authored-by: Lucas Wilkinson <LucasWilkinson@users.noreply.github.com>
Co-authored-by: Ricky Xu <rickyx@anyscale.com>
Co-authored-by: Kevin H. Luu <kevin@anyscale.com>
Co-authored-by: Jee Jee Li <pandaleefree@gmail.com>
Co-authored-by: Mengqing Cao <cmq0113@163.com>
Co-authored-by: Travis Johnson <tsjohnso@us.ibm.com>
Co-authored-by: Russell Bryant <rbryant@redhat.com>

1ea291a4