Commits · d3a6f2120bb6b67fc58a3f1000d624cfb351eb05 · OpenDAS / vllm_cscc

02 Aug, 2025 1 commit

[FEAT][ROCm] Enable running Flash Attention as ViT attn backend for Qwen-VL... · d3a6f212

vllmellm authored Aug 02, 2025


[FEAT][ROCm] Enable running Flash Attention as ViT attn backend for Qwen-VL models on ROCm platform. (#22069)
Signed-off-by: tjtanaavllm <tunjian.tan@amd.com>
Signed-off-by: vllmellm <vllm.ellm@embeddedllm.com>
Co-authored-by: tjtanaavllm <tunjian.tan@amd.com>

d3a6f212

31 Jul, 2025 1 commit
- [UX] Rename CUTLASS_MLA_VLLM_V1 to CUTLASS_MLA (#21966) · 61445453
  Michael Goin authored Jul 30, 2025
```
Signed-off-by: mgoin <mgoin64@gmail.com>
```
  61445453
30 Jul, 2025 2 commits
- [TPU] Support Pathways in vLLM (#21417) · 8f0d5167
  wenxindongwork authored Jul 30, 2025
```
Signed-off-by: wenxindongwork <wenxindong@google.com>
```
  8f0d5167
- [XPU] use `ZE_AFFINITY_MASK` for device select on xpu (#21815) · 05cbbe20
  Kunshang Ji authored Jul 30, 2025
```
Signed-off-by: Kunshang Ji <kunshang.ji@intel.com>
```
  05cbbe20
28 Jul, 2025 1 commit

[XPU] IPEX-optimized Punica Wrapper on XPU (#21703) · ec261b02

Chaojun Zhang authored Jul 29, 2025


Signed-off-by: chzhang <chaojun.zhang@intel.com>
Co-authored-by: Jee Jee Li <pandaleefree@gmail.com>

ec261b02

27 Jul, 2025 1 commit

[Attention] Make CutlassMLA the default backend for SM100 (blackwell) (#21626) · 8f605ee3

Alexander Matveev authored Jul 27, 2025


Signed-off-by: Alexander Matveev <amatveev@redhat.com>
Signed-off-by: mgoin <mgoin64@gmail.com>
Co-authored-by: mgoin <mgoin64@gmail.com>

8f605ee3

23 Jul, 2025 1 commit
- [Bugfix][CUDA] fixes CUDA FP8 kv cache dtype supported (#21420) · 2dec7c1a
  elvischenv authored Jul 23, 2025
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Signed-off-by: elvischenv <219235043+elvischenv@users.noreply.github.com>
```
  2dec7c1a
22 Jul, 2025 2 commits

[Misc] DeepEPHighThroughtput - Enable Inductor pass (#21311) · 8425f785

Varun Sundar Rabindranath authored Jul 22, 2025


Signed-off-by: Varun Sundar Rabindranath <vsundarr@redhat.com>
Co-authored-by: Varun Sundar Rabindranath <vsundarr@redhat.com>

8425f785

Fix kv_cache_dtype handling for out-of-tree HPU plugin (#21302) · c17231e8

Konrad Zawora authored Jul 22, 2025


Signed-off-by: Konrad Zawora <kzawora@habana.ai>
Signed-off-by: Chendi.Xue <chendi.xue@intel.com>
Co-authored-by: Chendi.Xue <chendi.xue@intel.com>

c17231e8

21 Jul, 2025 1 commit
- [CPU] Enable shared-memory based pipeline parallel for CPU backend (#21289) · a15a50fc
  Li, Jiang authored Jul 22, 2025
```
Signed-off-by: jiang1.li <jiang1.li@intel.com>
```
  a15a50fc
20 Jul, 2025 1 commit
- [TPU] support fp8 kv cache quantization (#19292) · 3a1d8940
  Chengji Yao authored Jul 19, 2025
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Signed-off-by: Chengji Yao <chengjiyao@google.com>
```
  3a1d8940
19 Jul, 2025 3 commits
- [V0 Deprecation] Deprecate BlockSparse Attention & Phi3-Small (#21217) · 752c6ade
  Woosuk Kwon authored Jul 19, 2025
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Signed-off-by: Woosuk Kwon <woosuk.kwon@berkeley.edu>
```
  752c6ade
- [bugfix] Fix auto thread-binding when world_size > 1 in CPU backend and refactor code (#21032) · e3a0e43d
  Li, Jiang authored Jul 19, 2025
```
Signed-off-by: jiang1.li <jiang1.li@intel.com>
```
  e3a0e43d
- [V0 Deprecation] Remove V0 Spec Decode workers (#21152) · dd572c0a
  Woosuk Kwon authored Jul 18, 2025
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Signed-off-by: Woosuk Kwon <woosuk.kwon@berkeley.edu>
```
  dd572c0a
18 Jul, 2025 1 commit
- [Misc] Do not print async output warning for v1 (#21151) · 54cf1cae
  Woosuk Kwon authored Jul 17, 2025
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Signed-off-by: Woosuk Kwon <woosuk.kwon@berkeley.edu>
```
  54cf1cae
17 Jul, 2025 1 commit
- [V0 deprecation] Remove V0 HPU backend (#21131) · 4de71463
  Woosuk Kwon authored Jul 17, 2025
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Signed-off-by: Woosuk Kwon <woosuk.kwon@berkeley.edu>
```
  4de71463
15 Jul, 2025 1 commit
- SM100 Cutlass MLA decode with unrestricted num_heads (< 128) for DeepSeek TP (#20769) · 8cdc3712
  Alexander Matveev authored Jul 14, 2025
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Signed-off-by: Alexander Matveev <amatveev@redhat.com>
```
  8cdc3712
14 Jul, 2025 1 commit
- [Misc] Log the reason for falling back to FlexAttention (#20699) · e8cc53af
  Cyrus Leung authored Jul 14, 2025
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Signed-off-by: DarkLight1337 <tlleungac@connect.ust.hk>
```
  e8cc53af
12 Jul, 2025 1 commit
- [Model] New model support for microsoft/Phi-4-mini-flash-reasoning (#20702) · 2c11a738
  Congcong Chen authored Jul 12, 2025
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Signed-off-by: Congcong Chen <congcongchen@microsoft.com>
```
  2c11a738
11 Jul, 2025 1 commit

[Core] Add Flashinfer TRTLLM Backend for Flashinfer decode path (SM100). (#19825) · 7bd4c37a

Pavani Majety authored Jul 11, 2025


Signed-off-by: Pavani Majety <pmajety@nvidia.com>
Signed-off-by: mgoin <mgoin64@gmail.com>
Co-authored-by: shuw <shuw@nvidia.com>
Co-authored-by: mgoin <mgoin64@gmail.com>

7bd4c37a

10 Jul, 2025 3 commits
- [ROCm][Regression] Remove tensor creation that harms performance on ROCm (#20741) · 5b8366b6
  Gregory Shtrasberg authored Jul 10, 2025
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Signed-off-by: Gregory Shtrasberg <Gregory.Shtrasberg@amd.com>
```
  5b8366b6
- [Doc] Add engine args back in to the docs (#20674) · 3482fd7e
  Harry Mellor authored Jul 10, 2025
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Signed-off-by: Harry Mellor <19981378+hmellor@users.noreply.github.com>
```
  3482fd7e
- [BugFix] Fix `VllmConfig()` construction on all platforms (#20695) · ffbcc9e7
  Nick Hill authored Jul 10, 2025
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Signed-off-by: Nick Hill <nhill@redhat.com>
```
  ffbcc9e7
09 Jul, 2025 3 commits

[XPU][CI] enhance xpu test support (#20652) · a3e4e85e

Liangliang Ma authored Jul 10, 2025


Signed-off-by: Ma, Liangliang <liangliang.ma@intel.com>
Co-authored-by: zhenwei-intel <zhenweiliu@habana.ai>

a3e4e85e

[Hardware][PPC64LE] Enable V1 for ppc64le and ARM (#20554) · 6db31e7a

Akash kaothalkar authored Jul 09, 2025


Signed-off-by: Akash Kaothalkar <akash.kaothalkar@ibm.com>
Co-authored-by: Akash Kaothalkar <akash.kaothalkar@ibm.com>
Co-authored-by: Nikhil Gupta <nikhil.gupta2@arm.com>

6db31e7a

[misc]refactor `Platform.set_device` method (#20262) · 0b407479
Kunshang Ji authored Jul 09, 2025
```
Signed-off-by: Kunshang Ji <kunshang.ji@intel.com>
```
0b407479

08 Jul, 2025 1 commit
- [xpu]feat: support multi-lora on xpu (#20616) · a4c23314
  Yan Ma authored Jul 08, 2025
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Signed-off-by: yan <yan.ma@intel.com>
```
  a4c23314
07 Jul, 2025 3 commits

[XPU] log clean up for XPU platform (#20553) · 3112271f
Yan Ma authored Jul 07, 2025
```
Signed-off-by: yan <yan.ma@intel.com>
```
3112271f
[XPU][CI] add v1/core test in xpu hardware ci (#20537) · 2c5ebec0
Liangliang Ma authored Jul 07, 2025
```
Signed-off-by: Ma, Liangliang <liangliang.ma@intel.com>
```
2c5ebec0

[Refactor]Abstract Platform Interface for Distributed Backend and Add xccl... · 6e2c19ce

Yang Yang authored Jul 07, 2025


[Refactor]Abstract Platform Interface for Distributed Backend and Add xccl Support for Intel XPU (#19410)
Signed-off-by: dbyoung18 <yang5.yang@intel.com>
Signed-off-by: Kunshang Ji <kunshang.ji@intel.com>
Co-authored-by: Kunshang Ji <kunshang.ji@intel.com>

6e2c19ce

06 Jul, 2025 2 commits

[V1] Support any head size for FlexAttention backend (#20467) · 9fb52e52
Cyrus Leung authored Jul 07, 2025
```
Signed-off-by: DarkLight1337 <tlleungac@connect.ust.hk>
```
9fb52e52

[V0 deprecation] Remove V0 CPU/XPU/TPU backends (#20412) · e202dd27

Woosuk Kwon authored Jul 06, 2025


Signed-off-by: Woosuk Kwon <woosuk.kwon@berkeley.edu>
Signed-off-by: jiang1.li <jiang1.li@intel.com>
Co-authored-by: Li, Jiang <jiang1.li@intel.com>

e202dd27

05 Jul, 2025 1 commit
- [v1] Re-add fp32 support to v1 engine through FlexAttention (#19754) · 32c9be22
  Isotr0py authored Jul 05, 2025
```
Signed-off-by: Isotr0py <2037008807@qq.com>
Signed-off-by: Isotr0py <mozf@mail2.sysu.edu.cn>
```
  32c9be22
04 Jul, 2025 1 commit
- [Platform] Add custom default max tokens (#18557) · a4113b03
  Gabriel Marinho authored Jul 03, 2025
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Signed-off-by: Gabriel Marinho <gmarinho@ibm.com>
```
  a4113b03
02 Jul, 2025 1 commit
- [UT][intel GPU] use current_platform instead of device hardcode in v1 tests (#20169) · a0389e05
  Liangliang Ma authored Jul 02, 2025
```
Signed-off-by: Ma, Liangliang <liangliang.ma@intel.com>
```
  a0389e05
01 Jul, 2025 2 commits
- [BugFix][V1][ROCm] Triton MLA uses V0 backend on V1 engine (#19067) · 96453cfa
  TY-AMD authored Jul 01, 2025
```
Signed-off-by: Tianyuan Wu <Tianyuan.Wu@amd.com>
```
  96453cfa
- [CPU] Update custom ops for the CPU backend (#20255) · 6cc1e7d9
  Li, Jiang authored Jul 01, 2025
```
Signed-off-by: jiang1.li <jiang1.li@intel.com>
```
  6cc1e7d9
26 Jun, 2025 2 commits
- [Hardware][Intel GPU] Add v1 Intel GPU support with Flash attention backend. (#19560) · b69781f1
  Kunshang Ji authored Jun 27, 2025
```
Signed-off-by: Kunshang Ji <kunshang.ji@intel.com>
```
  b69781f1
- [Bugfix] Allow `CUDA_VISIBLE_DEVICES=''` in `Platform.device_id_to_physical_device_id` (#18979) · 65397e40
  Seiji Eicher authored Jun 26, 2025
```
Signed-off-by: Seiji Eicher <seiji@anyscale.com>
```
  65397e40
25 Jun, 2025 1 commit
- [TPU] Add TPU specific var VLLM_TPU_MOST_MODEL_LEN (#19919) · 2d7620c3
  Chenyaaang authored Jun 25, 2025
```
Signed-off-by: Chenyaaang <chenyangli@google.com>
```
  2d7620c3