Commits · cb62e86f83bf859fb25936a0c39709a31515fddc · OpenDAS / vllm_cscc

09 Feb, 2026 1 commit

Add NUMA Core binding in nixl_connector for CPU xPyD (#32365) · cb62e86f

ZhengHongming888 authored Feb 09, 2026

Signed-off-by: Hongming Zheng <hongming.zheng@intel.com>
Signed-off-by: ZhengHongming888 <hongming.zheng@intel.com>
Co-authored-by: gemini-code-assist[bot] <176961590+gemini-code-assist[bot]@users.noreply.github.com>

cb62e86f

05 Feb, 2026 1 commit
- [CI/Build] Parallelize CPU CI tests (#33778) · 07daee13
  Li, Jiang authored Feb 05, 2026
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Signed-off-by: jiang1.li <jiang1.li@intel.com>
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  07daee13
31 Jan, 2026 1 commit
- Fix grammar (#33121) · 1e86c802
  smashyalts authored Jan 31, 2026
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Signed-off-by: smashyalts <smashyalts@gmail.com>
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  1e86c802
22 Jan, 2026 1 commit

[CPU Backend] [Perf] Accelerate tensor-parallel/data-parallel inference across... · 744ef304

Fadi Arafeh authored Jan 22, 2026


[CPU Backend] [Perf] Accelerate tensor-parallel/data-parallel inference across NUMA domains on Arm (#32792)
Signed-off-by: Fadi Arafeh <fadi.arafeh@arm.com>

744ef304

05 Jan, 2026 1 commit
- [Platform] Deprecate seed_everything (#31659) · bb4337b3
  wangxiyuan authored Jan 05, 2026
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Signed-off-by: wangxiyuan <wangxiyuan1007@gmail.com>
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  bb4337b3
09 Dec, 2025 1 commit

[Cleanup] Refactor profiling env vars into a CLI config (#29912) · e858bfe0

Benjamin Chislett authored Dec 09, 2025

Signed-off-by: Benjamin Chislett <bchislett@nvidia.com>
Signed-off-by: Benjamin Chislett <chislett.ben@gmail.com>
Co-authored-by: gemini-code-assist[bot] <176961590+gemini-code-assist[bot]@users.noreply.github.com>
Co-authored-by: Harry Mellor <19981378+hmellor@users.noreply.github.com>

e858bfe0

21 Nov, 2025 1 commit
- [CI] Fix mypy for `vllm/v1/worker` (#29037) · 56669c1f
  Wentao Ye authored Nov 20, 2025
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Signed-off-by: yewentao256 <zhyanwentao@126.com>
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  56669c1f
06 Nov, 2025 2 commits
- [HARDWARE][CPU] Add Option for Disabling Binding to Specific CPU Cores (#27953) · e52e4da9
  StanHatko authored Nov 06, 2025
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Signed-off-by: Stan Hatko <stan_hatko@live.com>
Co-authored-by: Li, Jiang <jiang1.li@intel.com>
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  e52e4da9
- [CPU] Enable torch profiling (#28130) · 3755c145
  Aditya Tewari authored Nov 06, 2025
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Signed-off-by: Aditya Tewari <aditya.tewari@arm.com>
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  3755c145
17 Oct, 2025 1 commit
- [Docs] Replace `rst` style double-backtick with `md` single-backtick (#27091) · 6c9fdbf7
  Harry Mellor authored Oct 17, 2025
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Signed-off-by: Harry Mellor <19981378+hmellor@users.noreply.github.com>
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  6c9fdbf7
12 Oct, 2025 1 commit
- Update `Optional[x]` -> `x | None` and `Union[x, y]` to `x | y` (#26633) · 8fcaaf6a
  Harry Mellor authored Oct 12, 2025
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Signed-off-by: Harry Mellor <19981378+hmellor@users.noreply.github.com>
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  8fcaaf6a
05 Oct, 2025 1 commit
- Convert formatting to use `ruff` instead of `yapf` + `isort` (#26247) · d6953beb
  Harry Mellor authored Oct 05, 2025
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Signed-off-by: Harry Mellor <19981378+hmellor@users.noreply.github.com>
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  d6953beb
25 Sep, 2025 1 commit
- [CPU] update torch 2.8 and fix missing fields in TorchSDPAMetadata (#25652) · eb32335e
  Li, Jiang authored Sep 25, 2025
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Signed-off-by: jiang1.li <jiang1.li@intel.com>
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  eb32335e
16 Sep, 2025 1 commit
- [Bugfix] Fix sequence parallelism bug when enable pipeline parallelism (#24021) · 17871983
  cascade authored Sep 15, 2025
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Signed-off-by: cascade812 <cascade812@outlook.com>
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  17871983
29 Aug, 2025 1 commit
- [CPU] Enable data parallel for CPU backend (#23903) · ad39106b
  Li, Jiang authored Aug 29, 2025
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Signed-off-by: jiang1.li <jiang1.li@intel.com>
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  ad39106b
19 Aug, 2025 1 commit
- [Hardware][IBM Z]Enable v1 for s390x and s390x dockerfile fixes (#22725) · 78dba404
  Nikhil Suryawanshi authored Aug 19, 2025
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Signed-off-by: Nikhil Suryawanshi <suryawanshin74@gmail.com>
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  78dba404
18 Aug, 2025 1 commit
- [Misc] refactor function name (#23029) · 08d5f711
  Ning Xie authored Aug 18, 2025
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Signed-off-by: Andy Xie <andy.xning@gmail.com>
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  08d5f711
19 Jul, 2025 1 commit
- [bugfix] Fix auto thread-binding when world_size > 1 in CPU backend and refactor code (#21032) · e3a0e43d
  Li, Jiang authored Jul 19, 2025
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Signed-off-by: jiang1.li <jiang1.li@intel.com>
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  e3a0e43d
17 Jul, 2025 1 commit
- On environments where numa cannot be detected we get 0 (#21115) · ac9fb732
  Eric Curtin authored Jul 17, 2025
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Signed-off-by: Eric Curtin <ecurtin@redhat.com>
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  ac9fb732
09 Jul, 2025 1 commit

[Hardware][PPC64LE] Enable V1 for ppc64le and ARM (#20554) · 6db31e7a

Akash kaothalkar authored Jul 09, 2025


Signed-off-by: Akash Kaothalkar <akash.kaothalkar@ibm.com>
Co-authored-by: Akash Kaothalkar <akash.kaothalkar@ibm.com>
Co-authored-by: Nikhil Gupta <nikhil.gupta2@arm.com>

6db31e7a

07 Jul, 2025 1 commit

[Refactor]Abstract Platform Interface for Distributed Backend and Add xccl... · 6e2c19ce

Yang Yang authored Jul 07, 2025


[Refactor]Abstract Platform Interface for Distributed Backend and Add xccl Support for Intel XPU (#19410)
Signed-off-by: dbyoung18 <yang5.yang@intel.com>
Signed-off-by: Kunshang Ji <kunshang.ji@intel.com>
Co-authored-by: Kunshang Ji <kunshang.ji@intel.com>

6e2c19ce

04 Jul, 2025 1 commit
- [Misc] Add SPDX-FileCopyrightText (#20428) · 1caca5a5
  Jee Jee Li authored Jul 04, 2025
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Signed-off-by: Jee Jee Li <pandaleefree@gmail.com>
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  1caca5a5
10 Jun, 2025 1 commit
- Automatically bind CPU OMP Threads of a rank to CPU ids of a NUMA node. (#17930) · 9368cc90
  Louie Tsai authored Jun 09, 2025
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Signed-off-by: Tsai, Louie <louie.tsai@intel.com>
Co-authored-by: Li, Jiang <bigpyj64@gmail.com>
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  9368cc90
04 Jun, 2025 1 commit
- [CPU] V1 support for the CPU backend (#16441) · 4555143e
  Li, Jiang authored Jun 04, 2025
  
  4555143e