GitLab

set VLLM_USE_FUSED_QA_KVA_GEMM=1
feat:w4a8Linear调用apply_int8_linear，以支持blaslt

[opt] 优化epsp代码, 零消耗添加epsp
update VLLM_USE_FUSED_RMS_ROPE=0 (default). for qwen3, VLLM_USE_FUSED_RMS_ROPE=1 (default)
feat(moe/marlin): Marlin W16A16 MoE 自动探测并预打包（去掉手动开关）
perf(qwen3): 融合 q/k RMSNorm + RoPE
fused_moe_fp8接入lmslim

[qwen3-480b] MoE(TN) configs for nmz TP=8
[opt] 优化deepep相关代码
[fix] 修复deepseek moe模型的awq量化推理bug和精度问题, 修复awq模型的VLLM_USE_LIGHTOP_MOE_SUM_MUL_ADD设置位置, update_state,优化性能，去除冗余操作
pcie 解决custom cudagraph模式需要拷贝的问题，需要配合dtk进行使用
[feat] Switch default w8a8 gemm impl to blaslt. Support w8a8-fp8 GEMM backend.MoE 路由抓取：新增 router_capture 工具链与 envs 统一配置
[envs] set VLLM_CUSTOM_CACHE=1、VLLM_USE_FUSED_RMS_ROPE=1、VLLM_USE_FUSED_FILL_RMS_CAT=1、VLLM_USE_FLASH_ATTN_FP8=1、VLLM_USE_FLASH_MLA_FP8=1、update VLLM_USE_TOPK_RENORM

feat: support moe sum when topk==9

bugfix: Fix mtp model load error when eable shared experts fusion.

update VLLM_USE_LIGHTOP_RMS_ROPE_CONCAT impl

set VLLM_USE_LIGHTOP_RMS_ROPE_CONCAT=1

set USE_FUSED_RMS_QUANT=1, USE_FUSED_SILU_MUL_QUANT=1 and  VLLM_SCHED_ENABLE_MINIMAL_INJECTION=1 for dpsk-v3

set VLLM_REJECT_SAMPLE_OPT=1 for dpsk-v3

support prefix cache on kme
fix the error in test_moe caused by moe align not supporting 511 and 211
multi-modal switching to torch implementation on z100l&k100

add VLLM_USE_LIGHTOP_MOE_SUM_MUL_ADD

set USE_FUSED_RMS_QUANT=1 and USE_FUSED_SILU_MUL_QUANT=1

add shared_output and routed_scaling_factor of CompressedTensorsW8A8Int8MoEMethod

[FIX] 修复mtp和VLLM_USE_TRITON_CAT不能一起开的bug

Signed-off-by: Isotr0py <2037008807@qq.com>
Signed-off-by: Isotr0py <mozf@mail2.sysu.edu.cn>

Signed-off-by: Jee Jee Li <pandaleefree@gmail.com>

Signed-off-by: wang.yuqi <noooop@126.com>

Signed-off-by: Jee Jee Li <pandaleefree@gmail.com>

Signed-off-by: DarkLight1337 <tlleungac@connect.ust.hk>

Signed-off-by: Jee Jee Li <pandaleefree@gmail.com>

Signed-off-by: Isotr0py <2037008807@qq.com>

Signed-off-by: Jee Jee Li <pandaleefree@gmail.com>