Commits · a15a50fc17f9918d2cc457e5ef50310b38c28f5f · OpenDAS / vllm_cscc · GitLab

21 Jul, 2025 1 commit
- [CPU] Enable shared-memory based pipeline parallel for CPU backend (#21289) · a15a50fc
  Li, Jiang authored Jul 22, 2025
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Signed-off-by: jiang1.li <jiang1.li@intel.com>
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  a15a50fc
01 Jul, 2025 1 commit
- [CPU] Update custom ops for the CPU backend (#20255) · 6cc1e7d9
  Li, Jiang authored Jul 01, 2025
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Signed-off-by: jiang1.li <jiang1.li@intel.com>
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  6cc1e7d9
02 Apr, 2025 1 commit
- [CPU][Bugfix] Using custom allreduce for CPU backend (#15934) · 550b2801
  Li, Jiang authored Apr 02, 2025
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Signed-off-by: jiang1.li <jiang1.li@intel.com>
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  550b2801