Commits · 8311f083bd53ac761556f2fb8733e0cf22ef7024 · OpenDAS / vllm_cscc

29 Jan, 2026 1 commit

[Bugfix][CPU] Fix thread num for shared memory communication (#33317) · 8311f083

Li, Jiang authored Jan 29, 2026

Signed-off-by: jiang1.li <jiang1.li@intel.com>
Signed-off-by: Li, Jiang <bigpyj64@gmail.com>
Co-authored-by: gemini-code-assist[bot] <176961590+gemini-code-assist[bot]@users.noreply.github.com>

8311f083

22 Jan, 2026 1 commit

[CPU Backend] [Perf] Accelerate tensor-parallel/data-parallel inference across... · 744ef304

Fadi Arafeh authored Jan 22, 2026


[CPU Backend] [Perf] Accelerate tensor-parallel/data-parallel inference across NUMA domains on Arm (#32792)
Signed-off-by: Fadi Arafeh <fadi.arafeh@arm.com>

744ef304

12 Nov, 2025 1 commit
- [CPU] Refactor CPU attention backend (#27954) · 7f829be7
  Li, Jiang authored Nov 12, 2025
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Signed-off-by: jiang1.li <jiang1.li@intel.com>
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  7f829be7
21 Jul, 2025 1 commit
- [CPU] Enable shared-memory based pipeline parallel for CPU backend (#21289) · a15a50fc
  Li, Jiang authored Jul 22, 2025
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Signed-off-by: jiang1.li <jiang1.li@intel.com>
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  a15a50fc
01 Jul, 2025 1 commit
- [CPU] Update custom ops for the CPU backend (#20255) · 6cc1e7d9
  Li, Jiang authored Jul 01, 2025
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Signed-off-by: jiang1.li <jiang1.li@intel.com>
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  6cc1e7d9
02 Apr, 2025 1 commit
- [CPU][Bugfix] Using custom allreduce for CPU backend (#15934) · 550b2801
  Li, Jiang authored Apr 02, 2025
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Signed-off-by: jiang1.li <jiang1.li@intel.com>
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  550b2801