Commits · 7a985548488ddbfa965f9684acf6f1d53f905964 · OpenDAS / vllm_cscc · GitLab

02 May, 2025 1 commit
- [Misc] Rename assets for testing (#17575) · d7543862
  Cyrus Leung authored May 02, 2025
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Signed-off-by: DarkLight1337 <tlleungac@connect.ust.hk>
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  d7543862
28 Mar, 2025 1 commit
- [V1] Remove legacy input registry (#15673) · 355f6634
  Cyrus Leung authored Mar 28, 2025
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Signed-off-by: DarkLight1337 <tlleungac@connect.ust.hk>
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  355f6634
13 Mar, 2025 1 commit
- [Misc] Clean up processor tests (#14771) · 8e9ffd37
  Cyrus Leung authored Mar 14, 2025
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Signed-off-by: DarkLight1337 <tlleungac@connect.ust.hk>
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  8e9ffd37
03 Mar, 2025 1 commit
- Update deprecated Python 3.8 typing (#13971) · cf069aa8
  Harry Mellor authored Mar 03, 2025
  
  cf069aa8
19 Feb, 2025 1 commit
- [VLM][Bugfix] Pass processor kwargs properly on init (#13516) · 377d10bd
  Cyrus Leung authored Feb 19, 2025
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Signed-off-by: DarkLight1337 <tlleungac@connect.ust.hk>
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  377d10bd
04 Feb, 2025 1 commit

[VLM] Merged multi-modal processor for InternVL-based models (#12553) · d1ca7df8

Cyrus Leung authored Feb 04, 2025


Signed-off-by: DarkLight1337 <tlleungac@connect.ust.hk>
Signed-off-by: Isotr0py <2037008807@qq.com>
Co-authored-by: Isotr0py <2037008807@qq.com>

d1ca7df8