Commits · 4abfd8796f37adc8fccc9481f37f20de1bce62e4 · OpenDAS / vllm_cscc

02 Aug, 2025 1 commit
- [V1] [Hybrid] Validate compatibility of attention backend batch reordering at init time (#21557) · 4abfd879
  Thomas Parnell authored Aug 02, 2025
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Signed-off-by: Thomas Parnell <tpa@zurich.ibm.com>
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  4abfd879
26 Jul, 2025 1 commit

Support encoder-only models without KV-Cache (#21270) · 1cd6eaba

Maximilien de Bayser authored Jul 26, 2025


Signed-off-by: Max de Bayser <maxdebayser@gmail.com>
Signed-off-by: Max de Bayser <mbayser@br.ibm.com>
Co-authored-by: Russell Bryant <rbryant@redhat.com>

1cd6eaba

19 Jul, 2025 2 commits
- [bugfix] Fix auto thread-binding when world_size > 1 in CPU backend and refactor code (#21032) · e3a0e43d
  Li, Jiang authored Jul 19, 2025
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Signed-off-by: jiang1.li <jiang1.li@intel.com>
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  e3a0e43d
- Elastic Expert Parallel Initial Support (#20775) · 21793722
  Rui Qiao authored Jul 18, 2025
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Signed-off-by: Rui Qiao <ruisearch42@gmail.com>
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  21793722
18 Jul, 2025 1 commit
- [Core] Set pooling params based on task and model (#21128) · 45badd05
  Cyrus Leung authored Jul 18, 2025
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Signed-off-by: DarkLight1337 <tlleungac@connect.ust.hk>
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  45badd05
04 Jul, 2025 1 commit
- [Misc] Add SPDX-FileCopyrightText (#20428) · 1caca5a5
  Jee Jee Li authored Jul 04, 2025
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Signed-off-by: Jee Jee Li <pandaleefree@gmail.com>
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  1caca5a5
24 Jun, 2025 1 commit
- [Bugfix][CPU] Fix InputBatch for pooling models in the CPU v1 (#20014) · 53da4cd3
  Li, Jiang authored Jun 24, 2025
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Signed-off-by: jiang1.li <jiang1.li@intel.com>
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  53da4cd3
13 Jun, 2025 1 commit
- [CPU] Refine default config for the CPU backend (#19539) · 64587211
  Li, Jiang authored Jun 13, 2025
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Signed-off-by: jiang1.li <jiang1.li@intel.com>
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  64587211
04 Jun, 2025 1 commit
- [CPU] V1 support for the CPU backend (#16441) · 4555143e
  Li, Jiang authored Jun 04, 2025
  
  4555143e