Commits · 3468f17ebe4daf19ff120d95eebde48f59d7cac2 · OpenDAS / vllm_cscc

"vllm/vscode:/vscode.git/clone" did not exist on "467a96a5415dc896170cecc0bb83d9c49c2f3c5e"

25 Sep, 2025 2 commits
- [V0 deprecation] Remove _VLLM_V1 suffixes from attention backend names (#25489) · 3468f17e
  Matthew Bonanni authored Sep 25, 2025
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Signed-off-by: Matthew Bonanni <mbonanni@redhat.com>
Signed-off-by: Matthew Bonanni <mbonanni001@gmail.com>
```
  3468f17e
- [Hardware][RISC-V] Add riscv64 support for vLLM with scalar (#22112) · 1e9a77e0
  chenlang authored Sep 25, 2025
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Signed-off-by: chenlang <chen.lang5@zte.com.cn>
Co-authored-by: chenlang <10346245@zte.com.cn>
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  1e9a77e0
24 Sep, 2025 2 commits
- [Logging] Improve log for when DeepEP HT disables CUDA Graphs (#25531) · fea80060
  Tyler Michael Smith authored Sep 24, 2025
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Signed-off-by: Tyler Michael Smith <tyler@neuralmagic.com>
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  fea80060
- [ROCm][Bugfix] Only enable +rms_norm based on aiter if not explicitly disabled (#25275) · 487745ff
  Gregory Shtrasberg authored Sep 24, 2025
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Signed-off-by: Gregory Shtrasberg <Gregory.Shtrasberg@amd.com>
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  487745ff
23 Sep, 2025 4 commits
- [ROCm] Small functional changes for gptoss (#25201) · bde2a1a8
  Juan Villamizar authored Sep 23, 2025
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Signed-off-by: jpvillam <jpvillam@amd.com>
Co-authored-by: jpvillam <jpvillam@amd.com>
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  bde2a1a8
- [NIXL][OOT platform] support nixl_connector with oot platform and other nixl_backend (#25121) · 5774b0a1
  Chendi.Xue authored Sep 22, 2025
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Signed-off-by: Chendi Xue <Chendi.Xue@intel.com>
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  5774b0a1
- [XPU] Fix `compile_size` is `None` case. (#25433) · f225ea7d
  Kunshang Ji authored Sep 23, 2025
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Signed-off-by: Kunshang Ji <kunshang.ji@intel.com>
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  f225ea7d
- [V0 deprecation] Remove platform v1 controling interface (#25410) · 6fa78d8f
  Isotr0py authored Sep 23, 2025
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Signed-off-by: Isotr0py <mozf@mail2.sysu.edu.cn>
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  6fa78d8f
22 Sep, 2025 3 commits
- [CI Failure] Fix fp8 kv cache on <SM90 (#25396) · 239ef0c1
  Michael Goin authored Sep 22, 2025
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Signed-off-by: mgoin <mgoin64@gmail.com>
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  239ef0c1
- [V1][Attention] Split triton_attn in triton-only and rocm specific backends (#24648) · 175811e3
  Burkhard Ringlein authored Sep 22, 2025
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Signed-off-by: Burkhard Ringlein <ngl@zurich.ibm.com>
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  175811e3
- refactor: abstract graph mode support into platform interface (#25161) · b6f01bd9
  Yizhou authored Sep 22, 2025
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Signed-off-by: Yizhou Liu <liu_yizhou@outlook.com>
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  b6f01bd9
21 Sep, 2025 2 commits
- Remove V0 attention backends (#25351) · bc6e542d
  Woosuk Kwon authored Sep 21, 2025
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Signed-off-by: Woosuk Kwon <woosuk.kwon@berkeley.edu>
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  bc6e542d
- [V0 Deprecation] Remove async_output_proc, preemption mode, delay factor (#25334) · 0ff8ebb2
  Woosuk Kwon authored Sep 21, 2025
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Signed-off-by: Woosuk Kwon <woosuk.kwon@berkeley.edu>
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  0ff8ebb2
19 Sep, 2025 1 commit
- [OOT] Support sync_model_loading for OOT (#25126) · a6149aa5
  Chendi.Xue authored Sep 19, 2025
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Signed-off-by: Chendi Xue <Chendi.Xue@intel.com>
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  a6149aa5
18 Sep, 2025 1 commit
- [Bug] Fix torch Compilation Cache Hit Error (#25093) · d2a30a2d
  Wentao Ye authored Sep 18, 2025
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Signed-off-by: yewentao256 <zhyanwentao@126.com>
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  d2a30a2d
17 Sep, 2025 2 commits
- [Bugfix] Fix Stream usage in CPU model runner and OneDNN kernel check (#25046) · 9fccd04e
  Li, Jiang authored Sep 17, 2025
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Signed-off-by: jiang1.li <jiang1.li@intel.com>
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  9fccd04e
- [V0 Deprecation] Remove MQLLMEngine (#25019) · 5801e497
  Woosuk Kwon authored Sep 16, 2025
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Signed-off-by: Woosuk Kwon <woosuk.kwon@berkeley.edu>
Signed-off-by: Woosuk Kwon <woosuk@thinkingmachines.ai>
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  5801e497
16 Sep, 2025 1 commit
- [XPU] Fix circular import error. (#24927) · 5206ab20
  Kunshang Ji authored Sep 16, 2025
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Signed-off-by: Kunshang Ji <kunshang.ji@intel.com>
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  5206ab20
15 Sep, 2025 1 commit
- [XPU] Set consistent default KV cache layout (#24745) · 2e41f5ab
  Nicolò Lucchesi authored Sep 15, 2025
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Signed-off-by: NickLucche <nlucches@redhat.com>
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  2e41f5ab
13 Sep, 2025 1 commit
- [Minor] Simplify duplicative device check for cuda (#24793) · 973c9d01
  Victor Ziliang Peng authored Sep 13, 2025
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Signed-off-by: Ziliang Peng <ziliangdotme@gmail.com>
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  973c9d01
12 Sep, 2025 2 commits
- [Attention][FlashInfer] Enable FP8 FlashInfer (TRTLLM) MLA decode (#24705) · 7ba32aa6
  Matthew Bonanni authored Sep 12, 2025
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Signed-off-by: Matthew Bonanni <mbonanni001@gmail.com>
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  7ba32aa6
- [Multi Modal] Add FA3 in VIT (#24347) · 72fc8aa4
  Wenlong Wang authored Sep 12, 2025
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Signed-off-by: wwl2755 <wangwenlong2755@gmail.com>
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  72fc8aa4
11 Sep, 2025 2 commits
- [Bugfix][Attention] Fix FlashInfer MLA block size logic (#24692) · d4fd2768
  Matthew Bonanni authored Sep 11, 2025
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Signed-off-by: Matthew Bonanni <mbonanni001@gmail.com>
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  d4fd2768
- [HybridKVCache][Platform] Add support_hybrid_kv_cache for platform (#24646) · 4f6593b0
  Mengqing Cao authored Sep 11, 2025
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Signed-off-by: MengqingCao <cmq0113@163.com>
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  4f6593b0
10 Sep, 2025 6 commits
- [Kernel] Flashinfer MLA (trtllm-gen) decode kernel integration (#21078) · dcb28a33
  Hanjie Qiu authored Sep 10, 2025
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Signed-off-by: hjjq <hanjieq@nvidia.com>
Signed-off-by: Michael Goin <mgoin64@gmail.com>
Signed-off-by: mgoin <mgoin64@gmail.com>
Co-authored-by: Michael Goin <mgoin64@gmail.com>
```
  dcb28a33
- [Bugfix] Enable FP8 KV cache for FlashInfer and Triton backend on non-sm100 GPUs (#24577) · a0933c3b
  Thien Tran authored Sep 11, 2025
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Signed-off-by: Thien Tran <gau.nernst@yahoo.com.sg>
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  a0933c3b
- [rocm] enable torchao quantization for rocm (#24400) · d6069887
  Lifans authored Sep 10, 2025
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Signed-off-by: Lifan Shen <lifans@meta.com>
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  d6069887
- Feature/vit attention unification# 23880 (#23978) · 6cbd4190
  baonudesifeizhai authored Sep 10, 2025
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Signed-off-by: Isotr0py <mozf@mail2.sysu.edu.cn>
Co-authored-by: Isotr0py <mozf@mail2.sysu.edu.cn>
```
  6cbd4190
- [ROCm][Bugfix] Fix Aiter RMSNorm (#23412) · 7c195d43
  vllmellm authored Sep 10, 2025
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Signed-off-by: vllmellm <vllm.ellm@embeddedllm.com>
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  7c195d43
- [Hardware][Apple-CPU] Enable native bfloat16 on Apple Silicon (M2 and later) (#24129) · 3c2156b3
  Ignacio Sica authored Sep 10, 2025
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Signed-off-by: ignaciosica <mignacio.sica@gmail.com>
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  3c2156b3
09 Sep, 2025 1 commit
- [Compilation][WideEP] Enable Piecewise CUDAGraph for DeepEPHT (#24123) · a55cf41a
  Wentao Ye authored Sep 09, 2025
  
  a55cf41a
06 Sep, 2025 1 commit
- [V0 deprecation] Deprecate V0 Neuron backend (#21159) · 4172235a
  Woosuk Kwon authored Sep 06, 2025
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Signed-off-by: Woosuk Kwon <woosuk.kwon@berkeley.edu>
```
  4172235a
05 Sep, 2025 1 commit

[XPU][P/D] Add XPU support in NixlConnector (#22436) · e599e2c6

liuzhenwei authored Sep 05, 2025


Signed-off-by: zhenwei <zhenwei.liu@intel.com>
Co-authored-by: Kunshang Ji <kunshang.ji@intel.com>

e599e2c6

04 Sep, 2025 2 commits

[XPU] support Triton Attention backend on Intel GPU (#24149) · 16ded21e
Kunshang Ji authored Sep 04, 2025
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Signed-off-by: Kunshang Ji <kunshang.ji@intel.com>
```
16ded21e

[Attention] FlashAttn MLA (#14258) · 402759d4

Lucas Wilkinson authored Sep 04, 2025


Signed-off-by: Lucas Wilkinson <lwilkinson@neuralmagic.com>
Signed-off-by: Lucas Wilkinson <lwilkins@redhat.com>
Signed-off-by: Matthew Bonanni <mbonanni001@gmail.com>
Co-authored-by: Matthew Bonanni <mbonanni001@gmail.com>
Co-authored-by: Matthew Bonanni <mbonanni@redhat.com>

402759d4

03 Sep, 2025 2 commits
- [Attention] Blackwell FP8 MLA support with CUTLASS_MLA backend (#23289) · a7423220
  Matthew Bonanni authored Sep 03, 2025
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Signed-off-by: Matthew Bonanni <mbonanni@redhat.com>
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  a7423220
- [XPU] Fix the bug of LoRA logits on the XPU platform (#24081) · 862f2ef8
  Chaojun Zhang authored Sep 03, 2025
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Signed-off-by: chzhang <chaojun.zhang@intel.com>
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  862f2ef8
02 Sep, 2025 1 commit
- [XPU][Feature] fp8 online quantization support for XPU (#23148) · 7be0cb8e
  Yan Ma authored Sep 02, 2025
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Signed-off-by: Yan Ma <yan.ma@intel.com>
Co-authored-by: Qiming Zhang <qiming1.zhang@intel.com>
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  7be0cb8e
31 Aug, 2025 1 commit
- [Doc]: fix typos in Python comments (#24001) · 9701352e
  Didier Durand authored Aug 31, 2025
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Signed-off-by: Didier Durand <durand.didier@gmail.com>
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  9701352e
29 Aug, 2025 1 commit
- [CPU] Enable data parallel for CPU backend (#23903) · ad39106b
  Li, Jiang authored Aug 29, 2025
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Signed-off-by: jiang1.li <jiang1.li@intel.com>
```
  ad39106b