Commits · 17edd8a807019c8d1e58634aecb1de7984e8d467 · OpenDAS / vllm_cscc

04 Oct, 2025 1 commit
- [CPU] Refine batch reorder of CPU attention backend (#26096) · 5c057e06
  Li, Jiang authored Oct 04, 2025
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Signed-off-by: jiang1.li <jiang1.li@intel.com>
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  5c057e06
19 Sep, 2025 1 commit
- [Core] Modify the initialization parameters of the lora manager (#25249) · 28219864
  Jee Jee Li authored Sep 20, 2025
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Signed-off-by: Jee Jee Li <pandaleefree@gmail.com>
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  28219864
17 Sep, 2025 2 commits
- [Bugfix] Fix Stream usage in CPU model runner and OneDNN kernel check (#25046) · 9fccd04e
  Li, Jiang authored Sep 17, 2025
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Signed-off-by: jiang1.li <jiang1.li@intel.com>
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  9fccd04e
- [Core] Use `CpuGpuBuffer` for block table tensors (#24795) · eeb135eb
  Nick Hill authored Sep 16, 2025
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Signed-off-by: Nick Hill <nhill@redhat.com>
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  eeb135eb
16 Sep, 2025 1 commit

[Core/DBO][1/N] Add Dual-Batch Overlap mechanism to VLLM (#23693) · 56793995

Sage Moore authored Sep 16, 2025


Signed-off-by: Lucas Wilkinson <lwilkins@redhat.com>
Signed-off-by: Sage Moore <sage@neuralmagic.com>
Signed-off-by: Lucas Wilkinson <lwilkinson@neuralmagic.com>
Signed-off-by: yewentao256 <zhyanwentao@126.com>
Co-authored-by: Lucas Wilkinson <lwilkins@redhat.com>
Co-authored-by: Lucas Wilkinson <lwilkinson@neuralmagic.com>
Co-authored-by: yewentao256 <zhyanwentao@126.com>
Co-authored-by: Lucas Wilkinson <LucasWilkinson@users.noreply.github.com>
Co-authored-by: Robert Shaw <114415538+robertgshaw2-redhat@users.noreply.github.com>

56793995

10 Sep, 2025 1 commit
- [Bugfix] Guard `_may_reorder_batch` for encoder-only models on CPU (#24319) (#24348) · feaf202e
  Remy authored Sep 10, 2025
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Signed-off-by: Remy <eunhwan.shin@dtonic.io>
Co-authored-by: Li, Jiang <jiang1.li@intel.com>
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  feaf202e
01 Sep, 2025 1 commit
- [Misc] refactor code by import as for torch._inductor.config (#23677) · 499b074b
  Ning Xie authored Sep 01, 2025
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Signed-off-by: Andy Xie <andy.xning@gmail.com>
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  499b074b
30 Aug, 2025 1 commit
- [Refactor] refactor freezing_value/cuda_event initialize outside try finally (#23758) · e80bca30
  Ning Xie authored Aug 30, 2025
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Signed-off-by: Andy Xie <andy.xning@gmail.com>
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  e80bca30
29 Aug, 2025 1 commit
- [CPU] Enable data parallel for CPU backend (#23903) · ad39106b
  Li, Jiang authored Aug 29, 2025
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Signed-off-by: jiang1.li <jiang1.li@intel.com>
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  ad39106b
28 Aug, 2025 1 commit
- [Doc]: fix typos in Python scripts (#23828) · d3da2eea
  Didier Durand authored Aug 28, 2025
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Signed-off-by: Didier Durand <durand.didier@gmail.com>
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  d3da2eea
27 Aug, 2025 1 commit
- [Misc] Move CpuGpuBuffer to vllm/v1/utils.py (#23728) · 04ff1e43
  Woosuk Kwon authored Aug 27, 2025
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Signed-off-by: Woosuk Kwon <woosuk.kwon@berkeley.edu>
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  04ff1e43
26 Aug, 2025 1 commit
- [Bugfix] Fix cuda event usage with CPU model runner (#23643) · 9b018700
  Li, Jiang authored Aug 27, 2025
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Signed-off-by: jiang1.li <jiang1.li@intel.com>
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  9b018700
17 Aug, 2025 1 commit
- [Misc] method name typo fix (#23042) · 87f48623
  Ning Xie authored Aug 17, 2025
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Signed-off-by: Andy Xie <andy.xning@gmail.com>
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  87f48623
07 Aug, 2025 1 commit

[Attention] Support multiple attention metadata builders per kv_cache_spec +... · 1dc8a70b

Lucas Wilkinson authored Aug 06, 2025


[Attention] Support multiple attention metadata builders per kv_cache_spec  + proper local attention no hybrid kv cache fix (#21588)
Signed-off-by: Lucas Wilkinson <lwilkins@redhat.com>

1dc8a70b

02 Aug, 2025 1 commit
- [V1] [Hybrid] Validate compatibility of attention backend batch reordering at init time (#21557) · 4abfd879
  Thomas Parnell authored Aug 02, 2025
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Signed-off-by: Thomas Parnell <tpa@zurich.ibm.com>
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  4abfd879
26 Jul, 2025 1 commit

Support encoder-only models without KV-Cache (#21270) · 1cd6eaba

Maximilien de Bayser authored Jul 26, 2025


Signed-off-by: Max de Bayser <maxdebayser@gmail.com>
Signed-off-by: Max de Bayser <mbayser@br.ibm.com>
Co-authored-by: Russell Bryant <rbryant@redhat.com>

1cd6eaba

19 Jul, 2025 2 commits
- [bugfix] Fix auto thread-binding when world_size > 1 in CPU backend and refactor code (#21032) · e3a0e43d
  Li, Jiang authored Jul 19, 2025
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Signed-off-by: jiang1.li <jiang1.li@intel.com>
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  e3a0e43d
- Elastic Expert Parallel Initial Support (#20775) · 21793722
  Rui Qiao authored Jul 18, 2025
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Signed-off-by: Rui Qiao <ruisearch42@gmail.com>
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  21793722
18 Jul, 2025 1 commit
- [Core] Set pooling params based on task and model (#21128) · 45badd05
  Cyrus Leung authored Jul 18, 2025
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Signed-off-by: DarkLight1337 <tlleungac@connect.ust.hk>
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  45badd05
04 Jul, 2025 1 commit
- [Misc] Add SPDX-FileCopyrightText (#20428) · 1caca5a5
  Jee Jee Li authored Jul 04, 2025
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Signed-off-by: Jee Jee Li <pandaleefree@gmail.com>
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  1caca5a5
24 Jun, 2025 1 commit
- [Bugfix][CPU] Fix InputBatch for pooling models in the CPU v1 (#20014) · 53da4cd3
  Li, Jiang authored Jun 24, 2025
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Signed-off-by: jiang1.li <jiang1.li@intel.com>
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  53da4cd3
13 Jun, 2025 1 commit
- [CPU] Refine default config for the CPU backend (#19539) · 64587211
  Li, Jiang authored Jun 13, 2025
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Signed-off-by: jiang1.li <jiang1.li@intel.com>
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  64587211
04 Jun, 2025 1 commit
- [CPU] V1 support for the CPU backend (#16441) · 4555143e
  Li, Jiang authored Jun 04, 2025
  
  4555143e