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Unverified Commit f5d7049c authored by linhaifeng's avatar linhaifeng Committed by GitHub
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[Bugfix] Fix display error (inconsistent with context) (#33020) 


Signed-off-by: default avatarlinhaifeng <1371675203@qq.com>
parent 3c3c547c
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Showing with 2 additions and 2 deletions
vllm/engine/arg_utils.py
View file @ f5d7049c
......@@ -1951,13 +1951,13 @@ class EngineArgs:
CpuArchEnum.RISCV,
):
logger.info(
"Chunked prefill is not supported for ARM and POWER, "
"Chunked prefill is not supported for POWER, "
"S390X and RISC-V CPUs; "
"disabling it for V1 backend."
)
self.enable_chunked_prefill = False
logger.info(
"Prefix caching is not supported for ARM and POWER, "
"Prefix caching is not supported for POWER, "
"S390X and RISC-V CPUs; "
"disabling it for V1 backend."
)
......
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