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OpenDAS
vllm_cscc
Commits
90b78ec5
Unverified
Commit
90b78ec5
authored
Jun 05, 2025
by
Jinghui Zhang
Committed by
GitHub
Jun 05, 2025
Browse files
[v1][P/D] Fix a edge case in kv cache schedule (#19182)
Co-authored-by:
jinghui
<
jinghui@fb.com
>
parent
91a2ef98
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vllm/v1/core/sched/scheduler.py
vllm/v1/core/sched/scheduler.py
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vllm/v1/core/sched/scheduler.py
View file @
90b78ec5
...
...
@@ -1009,6 +1009,8 @@ class Scheduler(SchedulerInterface):
# Now that the blocks are ready, actually cache them.
block_ids
=
self
.
kv_cache_manager
.
get_block_ids
(
request
.
request_id
)[
0
]
num_computed_tokens
=
len
(
block_ids
)
*
self
.
block_size
# Handle the case where num request tokens less then one block.
num_computed_tokens
=
min
(
num_computed_tokens
,
request
.
num_tokens
)
if
num_computed_tokens
==
request
.
num_tokens
:
num_computed_tokens
-=
1
self
.
kv_cache_manager
.
cache_blocks
(
...
...
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