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OpenDAS
vllm_cscc
Commits
0fbc6696
Unverified
Commit
0fbc6696
authored
Sep 02, 2024
by
Woosuk Kwon
Committed by
GitHub
Sep 02, 2024
Browse files
[Bugfix] Fix single output condition in output processor (#7881)
parent
6e36f4fa
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vllm/engine/output_processor/single_step.py
vllm/engine/output_processor/single_step.py
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vllm/engine/output_processor/single_step.py
View file @
0fbc6696
...
...
@@ -113,7 +113,7 @@ class SingleStepOutputProcessor(SequenceGroupOutputProcessor):
outputs
:
SequenceGroupOutput
,
is_async
:
bool
)
->
None
:
sampling_params
=
seq_group
.
sampling_params
if
sampling_params
.
n
==
1
and
not
sampling_params
.
use_beam_search
:
if
sampling_params
.
best_of
==
1
and
not
sampling_params
.
use_beam_search
:
# only have one output sample
sample
=
outputs
.
samples
[
0
]
# only have one sequence
...
...
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