Skip to content
GitLab
Menu
Projects
Groups
Snippets
Loading...
Help
Help
Support
Community forum
Keyboard shortcuts
?
Submit feedback
Contribute to GitLab
Sign in
Toggle navigation
Menu
Open sidebar
OpenDAS
vllm_cscc
Repository
a3a3ee4e6febe8c270fdec0765c844186a728079
Switch branch/tag
vllm_cscc
vllm
model_executor
models
opt.py
Find file
Blame
History
Permalink
[Misc] Merge bitsandbytes_stacked_params_mapping and packed_modules_mapping (#11924)
· a3a3ee4e
Jee Jee Li
authored
Jan 15, 2025
Signed-off-by:
Jee Jee Li
<
pandaleefree@gmail.com
>
a3a3ee4e
opt.py
17 KB
Edit
Web IDE
Replace opt.py
×
Attach a file by drag & drop or
click to upload
Commit message
Replace opt.py
Replace file
Cancel
A new branch will be created in your fork and a new merge request will be started.
Jee Jee Li <pandaleefree@gmail.com>