vllm/v1/engine/core.py · 62be3670cb97e7196c30be26fe347d12d183429c · OpenDAS / vllm_cscc

[BugFix] Add sleep to fix tight loop and release GIL (#29476) · 62be3670

Alec authored Dec 18, 2025


Signed-off-by: alec-flowers <aflowers@nvidia.com>
Signed-off-by: Alec <35311602+alec-flowers@users.noreply.github.com>
Co-authored-by: Nick Hill <nhill@redhat.com>

62be3670

core.py 57.6 KB

Replace core.py