- 12 Nov, 2025 1 commit
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Sudhakar Singh authored
* enable applying rope offsets in backwared Signed-off-by:
Sudhakar Singh <sudhakars@nvidia.com> * add tests for rope offsets for thd/bshd/sbhd formats Signed-off-by:
pre-commit-ci[bot] <66853113+pre-commit-ci[bot]@users.noreply.github.com> Co-authored-by:
Kirthi Shankar Sivamani <ksivamani@nvidia.com>
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- 07 Nov, 2025 1 commit
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Kirthi Shankar Sivamani authored
* Fix cuDNN backend selection for more case. Add CG as a option as well Signed-off-by:
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- 25 Oct, 2025 1 commit
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Charlene Yang authored
* add max_score for fused/unfused F16 non-CP Signed-off-by:
Charlene Yang <8636796+cyanguwa@users.noreply.github.com> * calculate max per head instead of max over all heads Signed-off-by:
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- 30 Sep, 2025 2 commits
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vthumbe1503 authored
* Test working as I think it should work Signed-off-by:
Varun Thumbe <vthumbe@nvidia.com> [pre-commit.ci] auto fixes from pre-commit.com hooks for more information, see https://pre-commit.ci Signed-off-by:
Vladimir Cherepanov <vcherepanov@nvidia.com> * Saving... Signed-off-by:
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Ming Huang <mingh@nvidia.com> * Slightly refactor Signed-off-by:
Phuong Nguyen <phuonguyen@nvidia.com> Signed-off-by:
Jeremy Berchtold <jberchtold@nvidia.com> Co-authored-by:
jberchtold-nvidia <158520091+jberchtold-nvidia@users.noreply.github.com> Signed-off-by:
Kshitij Lakhani <klakhani@nvidia.com> Signed-off-by:
Jan Bielak <jbielak@nvidia.com> * [pre-commit.ci] auto fixes from pre-commit.com hooks for more information, see https://pre-commit.ci * fix Signed-off-by:
Pawel Gadzinski <pgadzinski@nvidia.com> * fix Signed-off-by:
zhongboz <zhongboz@nvidia.com> Co-authored-by:
oliver könig <okoenig@nvidia.com> * [pre-commit.ci] auto fixes from pre-commit.com hooks for more information, see https://pre-commit.ci * Update setup.py Signed-off-by:
Xin Yao <xiny@nvidia.com> * Remove exceptions from destructors Signed-off-by:
Tim Moon <tmoon@nvidia.com> * fix weired dispatch in ln/rmsnorm Signed-off-by:
Tim Moon <4406448+timmoon10@users.noreply.github.com> Signed-off-by:
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Vasudevan Rengasamy <vrengasamy@nvidia.com> Co-authored-by:
Selvaraj Anandaraj <selvaraja@login-ptyche01.ptyche.clusters.nvidia.com> * [pre-commit.ci] auto fixes from pre-commit.com hooks for more information, see https://pre-commit.ci * Fixed typo Signed-off-by:
Selvaraj Anandaraj <selvaraja@login-preos01.a51.clusters.nvidia.com> * Fixed typo Signed-off-by:
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Hongbin Liu <hongbinl@nvidia.com> * [pre-commit.ci] auto fixes from pre-commit.com hooks for more information, see https://pre-commit.ci * fix CI Signed-off-by:
tongliu <tongliu@nvidia.com> * [pre-commit.ci] auto fixes from pre-commit.com hooks for more information, see https://pre-commit.ci --------- Signed-off-by:
Jonathan Mitchell <jomitchell@login-eos02.eos.clusters.nvidia.com> * assert line change Signed-off-by:
Yuzhong Wang <yuzhongw@nvidia.com> * [pre-commit.ci] auto fixes from pre-commit.com hooks for more information, see https://pre-commit.ci * Update transformer_engine/pytorch/tensor/_internal/float8_blockwise_tensor_base.py Signed-off-by:
Min Yang <min.yang@shopee.com> * [pre-commit.ci] auto fixes from pre-commit.com hooks for more information, see https://pre-commit.ci * refactor: refactor multi tensor gemm interface Signed-off-by:
alan yang <89962857+cassiewilliam@users.noreply.github.com> Co-authored-by:
zhujian <zhujian.whu.cs@gmail.com> Fix cuDNN version checks when getting backend and for sm89 kv cache (#2185) * Fix cudnn version checks for kv cache for sm89. Add cudnn version check in preparation for 9.14 when getting backend Signed-off-by:
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Charlene Yang authored
* debug existing usage Signed-off-by:
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- 22 Sep, 2025 1 commit
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Charlene Yang authored
* first draft; debug plan failure Signed-off-by:
Chen Cui <chcui@nvidia.com> Signed-off-by:
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- 08 Sep, 2025 1 commit
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vasunvidia authored
* Fused RoPE with combined QKV input. Initial commit for Dropout with 8-bit RNG Fix documentation Initial commit for Fused QKV RoPE WIP Initial tests passing Enable rotary percent and margin Enable CP2, start_positions, interleaved Cleanup test Revert "Fix documentation" This reverts commit 53df10044e7769982bd4af2ae2628e6b7717e715. Revert "Initial commit for Dropout with 8-bit RNG" This reverts commit 301505e24031cbcd679069e1c2cd4d00eedf2dca. Cleanup. Minor cleanup Signed-off-by:
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- 31 Aug, 2025 1 commit
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vasunvidia authored
* Add dropout kernel with 8-bit RNG Co-authored-by:
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- 26 Aug, 2025 1 commit
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Xin Yao authored
expose more activation functions Signed-off-by:
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- 20 Aug, 2025 1 commit
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Jan Bielak authored
* Add rmsnorm_bwd_add Signed-off-by:
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- 15 Aug, 2025 1 commit
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Jan Bielak authored
* Add `nvte_cublas_gemm_scaled` Signed-off-by:
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- 09 Aug, 2025 1 commit
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Daniel Stokes authored
* fix: Add stream synchronization before destroying MPI communicator (#1979) Signed-off-by:
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- 04 Aug, 2025 1 commit
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Tim Moon authored
* Add basic kernel for swapping first two tensor dims Signed-off-by:
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- 14 Jul, 2025 1 commit
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Autumn1998 authored
* fix underterminsic problem in CI Signed-off-by:
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- 10 Jul, 2025 1 commit
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Autumn1998 authored
* add router fusion Signed-off-by:
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- 26 Jun, 2025 2 commits
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xiaoxi-wangfj authored
* [PyTorch|common] Implement unpadding kernel for FP8 1. Add multi-tensor unpadding kernel 2. Replace split+cat with unpadding kernel in Fp8Padding and Fp8Unpadding 3. Add unpadding with padding unit tests Signed-off-by:
xiaoxi-wangfj <690912414@qq.com> * [pre-commit.ci] auto fixes from pre-commit.com hooks for more information, see https://pre-commit.ci * add license Signed-off-by:
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Zhongbo Zhu authored
* finish python ref impl for bulk alloc Signed-off-by:
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- 13 Jun, 2025 2 commits
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Charlene Yang authored
* add support for head dim > 128 Signed-off-by:
Charlene Yang <charleney@nvidia.com> * remove debugging Signed-off-by:
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Daniel Stokes authored
* Add support for overlapping wgrad NCCL AG with dgrad GEMM Signed-off-by:
dastokes <dastokes@dastokes-dvt-01.nvidia.com>
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- 14 May, 2025 1 commit
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Kirthi Shankar Sivamani authored
* rm unused swizzle extensions Signed-off-by:
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- 11 May, 2025 1 commit
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Kirthi Shankar Sivamani authored
* First pass refactor Signed-off-by:
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- 07 May, 2025 1 commit
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Tim Moon authored
* Initial work toward restoring UB support in te.Sequential Signed-off-by:
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- 22 Apr, 2025 1 commit
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Sudhakar Singh authored
* add support for `sb1d` freqs tensor in Fused RoPE Signed-off-by:
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- 18 Apr, 2025 1 commit
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Kunlun Li authored
* Add fp8_primary_weights support for blockwise scaling Signed-off-by:
kunlunl <kunlunl@nvidia.com> custom fsdp Signed-off-by:
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- 17 Apr, 2025 1 commit
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Xin Yao authored
* move swizzle scaling factor to cpp Signed-off-by:
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- 14 Apr, 2025 1 commit
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Xin Yao authored
* Enable MXFP8 and Per-Tensor Current Scaling for Grouped Linear Signed-off-by:
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- 07 Apr, 2025 1 commit
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Xin Yao authored
* refactor to add cp support for sbhd/bshd Signed-off-by:
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- 04 Apr, 2025 1 commit
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gdengk authored
* add nvshmem based api support Signed-off-by:
gdeng <gdeng@nvidia.com> * fix lint and license issue Signed-off-by:
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- 22 Mar, 2025 1 commit
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Kunlun Li authored
* Enable fp8_primary_weights for current scaling Signed-off-by:
Kunlun Li <94586211+kunlunl@users.noreply.github.com> Signed-off-by:
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- 18 Mar, 2025 1 commit
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Charlene Yang authored
* add paged attention; test_kv_cache_accuray and test_paged_attn pass Signed-off-by:
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- 05 Mar, 2025 1 commit
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Nicolas Castet authored
* Add support for UB MNNVL Signed-off-by:
Nicolas Castet <ncastet@nvidia.com> * Address review comments Signed-off-by:
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- 07 Feb, 2025 1 commit
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Przemek Tredak authored
Signed-off-by:Przemek Tredak <ptredak@nvidia.com>
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- 31 Jan, 2025 1 commit
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Selvaraj Anandaraj authored
* Initial commit Signed-off-by:
Selvaraj Anandaraj <selvaraja@login-eos02.eos.clusters.nvidia.com> * Fixed compilation errors Signed-off-by:
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- 10 Jan, 2025 1 commit
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Xiaowei Ren authored
Take token count quantization of fused attention into consideration for CP results correction (#1396) * fix second half lse shape Signed-off-by:
Xiaowei Ren <xren@nvidia.com> * bug fixes Signed-off-by:
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- 02 Jan, 2025 1 commit
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Kirthi Shankar Sivamani authored
Signed-off-by:
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- 15 Nov, 2024 1 commit
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Tim Moon authored
* Add activation ops Signed-off-by:
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- 29 Oct, 2024 1 commit
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Alp Dener authored
* moved userbuffers code to TE/common Signed-off-by:
Alp Dener <adener@nvidia.com> * moved comm+GEMM overlap code to TE/common Signed-off-by:
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- 12 Oct, 2024 1 commit
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Xin Yao authored
* Let Fused RoPE support THD with CP Signed-off-by:
Xiaowei Ren <103958965+xrennvidia@users.noreply.github.com>
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- 11 Oct, 2024 1 commit
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Xiaowei Ren authored
* fa2 function import renaming Signed-off-by:
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- 09 Sep, 2024 1 commit
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Xin Yao authored
* propagate scale_inv modification to GroupedLinear Signed-off-by:
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