Commits · 324be3324278723bd8f66196ed1ccac29b94bd7f · OpenDAS / TransformerEngine

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04 Dec, 2025 1 commit

[Core] Fix inconsistent logic in C++ tensor class (#2330) · 61822061

Tim Moon authored Dec 04, 2025



* Initialize empty tensors with shape=[0] instead of shape=[].
Signed-off-by: Tim Moon <tmoon@nvidia.com>

* Fix runtime crash in LayerNorm

Still seeing correctness issues.
Signed-off-by: Tim Moon <tmoon@nvidia.com>

* Make sure norm workspace sizes are not zero
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* Remove assumption in swizzle kernel that data is available.
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* Remove assumption in multi-swizzle kernel that data is available.
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* Remove unnecessary explicit call to default constructor
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* Avoid accessing tensor data pointer if tensor has no entries
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* Update transformer_engine/common/swizzle/swizzle.cu
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* Prefer using row-wise/col-wise shape based on which has data
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* Fix merge conflict, expand docs, fix inconsistency in dim function
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* Change Tensor::has_data to check whether tensor is initialized, not whether pointer is valid.
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* Review suggestion from @greptile-apps
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* Debug incorrect tensor initialization in tests
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* Clarify comments that has_data does not guarantee safe pointer accesses
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* Debug test failure when computing amaxes
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61822061

21 Oct, 2025 1 commit

[PyTorch][MOE] Support NVFP4 Grouped Linear (#2215) · b4a1d4d6

Zhongbo Zhu authored Oct 20, 2025



* pipeclean, fix nvfp4 padding of 32 alignment
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* numerical test passed
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* fix CI failure with test_cast_master_weights_to_fp8 (in a hacky way)
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* found CUDA mis-aligned address error in training in multi-swizzle, hack the vec_load_size to 1 to unblock
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* leave comments about alignment issue
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* fused bulk alloc nvfp4
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* fix RHT sign mask CPU overhead
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* fix
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* resolve comments
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* Remove incorrect logic that treats 0-D tensor as uninitialized

Tensor shape logic still requires treating 0-D tensor as uninitialized.
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* Fix invalid conversion from tensor to int
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b4a1d4d6

03 Oct, 2025 1 commit

[Common][Pytorch] Add support for the FP8 Block Scaling (ie. Deepseek) recipe on Blackwell (#2157) · dfe5b7df

Jan Bielak authored Oct 03, 2025



* Update to_string(NVTEScalingMode) to include block scaling
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* Add `nvte_swizzle_block_scaling_to_mxfp8_scaling_factors`
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* Convert FP8 block scaling tensors to MXFP8 tensors on Blackwell and newer in GEMM
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* Allow Blackwell and newer in Deepseek recipe compatbility check
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* Allow data_rows % 4 != 0 in 1d kernel
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* Load scaling factors in unswizzled order in 1d kernel
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* Enforce use of power of two scaling
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* Skip the FP8 block scaling exact GEMM test on Blackwell
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* Skip further tests with pow_2_scales=False
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* Initial implementation of tensor conversion for grouped gemm
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* Skip non power of two scaling cpp unit tests
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* Fix handling of all gather
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* Use compute capability 10.0 for logic with Blackwell
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dfe5b7df

29 Sep, 2025 1 commit

[Core][PyTorch] NVFP4 recipe (#2177) · 3f5b4754

Kirthi Shankar Sivamani authored Sep 29, 2025



* Add NVFP4 recipe
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* Add MathDx dependency to GitHub builds
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* Suggestions from GitHub Copilot
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* Move 2x shape logic from core to PyTorch
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* Fix compilation errors with CUDA 12.1
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* SM 70 is not supported in CUDA 13
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* Typo
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* Revert "Move 2x shape logic from core to PyTorch"

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* Added dequantize kernel for FP4
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* Fix linter warning
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* Add NVFP4 support with fusible ops

Use logical tensor dims for PyTorch NVFP4 tensors. Temporarily add unfused dequantize impl. Fix bug where NVFP4 recipe was not configurable.
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* Fix CG test model config
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* Debug NVFP4 tensor size function
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* Proper handling of the RNG state
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* Fix workspace size for GEMM heuristic.
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* Fix compile error in C++ NVFP4 test

Some some numeric errors when blocks are all zero.
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* fix distrbuted test problem shape
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* proper assert dim for low precision AG TP
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* clean up duplicated code in nvfp4_utils.cuh
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* pylint: disable=unused-argument
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* `nvte_cublas_gemm_v2` to take alpha pointer (#12)

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* typos
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* API to have const float* alpha
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* Minor tweaks

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* Support fused amax kernels with NVFP4 quantization
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* Disable fused amax with cuDNN LayerNorm kernel
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* Fix compile error
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* Do not fuse amax if cuDNN normalization is forced by envvar
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3f5b4754

06 Aug, 2025 1 commit

[PyTorch] Multi-tensor swizzle scaling factors for MXFP8 and fuse padding zeros (#2019) · c0d2f1a5

Xin Yao authored Aug 07, 2025



* for loop
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* bulk alloc
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* multi-tensor swizzle
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* pad zeros in swizzle kernels
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* unify single- and multi-tensor swizzle
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* fix empty tensor list
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* fix bug for col swizzle
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* check context & fix signifiers
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c0d2f1a5

14 May, 2025 1 commit

Cleanup pytorch extensions (#1781) · cfbbfb89

Kirthi Shankar Sivamani authored May 13, 2025



* rm unused swizzle extensions
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* Fix swizzle
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* Consistent namespaces and first refactor
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* format and lint
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* transformer_engine
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* revert accidental perm change
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cfbbfb89