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* Blockwise float8 quantizer and quantized tensor class.

The classes are configurable for 128x128 blocksize
and 1x128 blocksize via setting block_scaling_dim == 2,1 respectively.

Scale tensors are stored in a format emenable for matrix multiplication,
however the integration of matmul is deferred as a separate story.

Fusions of quantization and DBIAS or activation functions are not yet
implemented, and the dequantization is currently implemented in torch.

Tests for quantization are included in C++ and pytorch layers, with
exact comparison to reference quantizer behavior as well as an attempt
to hit interesting branches through the API such as tensor creation
in pytorch and CPP and dequantization of row and columnwise usage.

Two CUDA kernels for quantization are included, and are direct ports
of equivalents in the kitchen repository, where a subchannel recipe
has been used for end to end training.
Signed-off-by: Keith Wyss <kwyss@nvidia.com>

* Apply linting changes.
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* Alignment for 1D scaling for GEMM edge case.
Signed-off-by: Keith Wyss <kwyss@nvidia.com>

* MR feedback.
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* Change API name.
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* Fix merge conflict with name change.
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* Use common tensor map API.
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* Change API to use two scaling mode enums.
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* Fix typo.
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* Update some call sites.
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* Tests for torch tensor API surface.

Since the quantized tensor is a tensor
subclass, these tests exercise torch hooks.
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* Reuse scale calculation between quantizer refs.
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* Save memory by dropping reference to saved tensors.

Issues previously observed are solved.
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* Remove constexpr parameters from kernel.

Code size is reduced with fewer constexpr params.
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* Merge conflict from rebase.
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* Add shape implementations for block scaling.

nvte_shape was added upstream. Logic added
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* Move benchmark to te_playground
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* Remove amax_epsilon and pow_2_scales from tensor.

Hardcodes the default values.
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* Lint changes.
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* Fixup MR changes that broke.
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* Safer ifdef in kernel.
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* Documentation prose.
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* Reuse compute_scale function from Current Scaling.
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* Bugfix on inf_value scale refactor.
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