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* Add NVFP4 recipe
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>
Co-authored-by: Frank Sun <frsun@nvidia.com>
Co-authored-by: Oleg Goncharov <ogoncharov@nvidia.com>
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* Add MathDx dependency to GitHub builds
Signed-off-by: Tim Moon <tmoon@nvidia.com>

* Suggestions from GitHub Copilot
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* Move 2x shape logic from core to PyTorch
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* Fix compilation errors with CUDA 12.1
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* SM 70 is not supported in CUDA 13
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* Typo
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* Revert "Move 2x shape logic from core to PyTorch"

This reverts commit f8b2a2d0111d9af690b43bb98ae448d9a430a185.
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* Added dequantize kernel for FP4
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* Fix linter warning
Signed-off-by: Tim Moon <tmoon@nvidia.com>

* Add NVFP4 support with fusible ops

Use logical tensor dims for PyTorch NVFP4 tensors. Temporarily add unfused dequantize impl. Fix bug where NVFP4 recipe was not configurable.
Signed-off-by: Tim Moon <tmoon@nvidia.com>

* Fix logic for 2x shapes and move to PyTorch
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* Fix CG test model config
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* Debug NVFP4 tensor size function
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* Proper handling of the RNG state
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* Test SR properly
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* Fix workspace size for GEMM heuristic.
Signed-off-by: Kirthi Shankar Sivamani <ksivamani@nvidia.com>

* Fix compile error in C++ NVFP4 test

Some some numeric errors when blocks are all zero.
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* fix distrbuted test problem shape
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* proper assert dim for low precision AG TP
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* clean up duplicated code in nvfp4_utils.cuh
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* lint
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* pylint: disable=unused-argument
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* `nvte_cublas_gemm_v2` to take alpha pointer (#12)

* make nvte_cublas_gemm_v2 to take alpha/beta pointers
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* users are expected to pass a valid C_tensor
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* typos
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* API to have const float* alpha
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* Minor tweaks

Support arbitrary beta scales. Increase workspace to be aligned to 128 bytes.
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* Debug IMA with alpha pointer
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* Support fused amax kernels with NVFP4 quantization
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* Disable fused amax with cuDNN LayerNorm kernel
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* Add NVFP4 cases to distributed tests for TE ops
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* Change assert to NVTE_CHECK in the hadamard cast fusion
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* Fix compile error
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* Use global thread IDs for Philox subsequences
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* Add shape checks for NVFP4 cast kernels
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* Do not fuse amax if cuDNN normalization is forced by envvar
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* Fixed integer overflow when computing offsets
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* Fixed conflicts
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* Minor code refactoring to avoid unnecessary checks
Signed-off-by: Oleg Goncharov <ogoncharov@nvidia.com>

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* Fixed typo
Signed-off-by: Oleg Goncharov <ogoncharov@nvidia.com>

* Fixed dBias accumulation error due to initialization. Minor code refactoring
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* Test case to reproduce the init error
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* Fixed rowwise dbias error
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* Changed ptx API
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* Added a struct for two packed FP8 values
Signed-off-by: Oleg Goncharov <ogoncharov@nvidia.com>

* Rolled back to scalar code for columnwise scaling due to its better performance
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* Minor corrections
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* Rebased on main
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* Fixes per code review
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* Removed constexpr in C++ test suite to build faster
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* Computed activations are now numerically truncated to InputType before scaling. Improved test suite.
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* Minor refactoring
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* Minor refactoring
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* Modified mismatches checks of MXFP8 to address FP8 numerics
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* Implemented Jeremy's fixes to JAX test suite with an intermediate downcast
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* Reduced the dims of the test tensors to improve CI runtime
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* Fixed memory alignment issue. Compute dbias without downcast.
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* Fixed misaligned memory issue also in gated kernels. Reduced size of MXFP8 gated tests
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Signed-off-by: Oleg Goncharov <ogoncharov@nvidia.com>
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* Reapply "Allow NVTEShape to own data." (#1703)

This reverts commit 91405eb4

.
Signed-off-by: Keith Wyss <kwyss@nvidia.com>

* Update code so that data is replaced by an array.
Signed-off-by: Keith Wyss <kwyss@nvidia.com>

* Specify unambiguous Tensor constructor in tests.
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* Fix assumption in test of 2D shape.
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* Remove row and col
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Parallelize CPU reference implementation in tests
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