- 01 Aug, 2025 1 commit
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fzyzcjy authored
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- 31 Jul, 2025 1 commit
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Chenggang Zhao authored
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- 30 Jul, 2025 1 commit
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sky authored
* Add diagnosis module for precise identification of slow ranks Signed-off-by:
wangfakang <fakangwang@gmail.com> * Add tests for the slow diagnosis module Signed-off-by:
wangfakang <fakangwang@gmail.com> * Update some comments for diagnose Signed-off-by:
wangfakang <fakangwang@gmail.com> * Update test case for diagnose Signed-off-by:
wangfakang <fakangwang@gmail.com> * Strip the diagnose module, thx LyricZhao and sphish. Signed-off-by:
wangfakang <fakangwang@gmail.com> * update variable name and cumulative wait recv cost, thx sphish. Signed-off-by:
wangfakang <fakangwang@gmail.com> * remove invalid comments. Signed-off-by:
wangfakang <fakangwang@gmail.com> --------- Signed-off-by:
wangfakang <fakangwang@gmail.com>
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- 22 Jul, 2025 1 commit
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Shangyan Zhou authored
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- 21 Jul, 2025 1 commit
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Guangguan Wang authored
* Add arg --pressure-test for test_low_latency.py Add arg --pressure-test for test_low_latency.py Signed-off-by:
Guangguan Wang <guangguan.wang@linux.alibaba.com> * Export NVSHMEM_QP_DEPTH Export NVSHMEM_QP_DEPTH Signed-off-by:
Guangguan Wang <guangguan.wang@linux.alibaba.com> --------- Signed-off-by:
Guangguan Wang <guangguan.wang@linux.alibaba.com>
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- 14 Jul, 2025 1 commit
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Shangyan Zhou authored
* Strengthen the barrier in `cached_notify` * lint * Change the timing method * lint
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- 11 Jul, 2025 1 commit
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Shangyan Zhou authored
* Explicitly destroy the C++ runtime and release resources. * Small fix * fix typo * Add a flag to control whether explicit `destroy()` is required.
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- 10 Jul, 2025 2 commits
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Shangyan Zhou authored
* Let forwarders use a dedicated SM * Shuffle rdma idx * Sender use TMA. * Adjust the tuning chunk size. * Modify NVL chunk layout. * Update some combine config. * Small lint * Minor fix * Overlap TMA store --------- Co-authored-by:Chenggang Zhao <chenggangz@deepseek.com>
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Chenggang Zhao authored
* Add LogFMT interface * Update comments * Add simulated code * Fix comments * Change to 128 channels * Add notes * Optimize performance * optimize simulate logfmt 10bit * Minor fix * Stronger low latency tests * Minor fix * Stronger low latency tests for logfmt * Optimize logfmt simulate: lg2/ex2 ptx, step_inv * Minor fix * Minor fix * Add non-logfmt bench * Fix value=0 for logfmt * Optimize performance * Refactor tests --------- Co-authored-by:Zhean Xu <xza@deepseek.com>
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- 04 Jul, 2025 2 commits
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Shangyan Zhou authored
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Shangyan Zhou authored
* Add TMA buffer allocation * Use TMA for forwarders and NVL receivers * Use lane 31 to operate TMA. * Change rdma buffer layout. * Use TMA to transfer scales also. * Increase the NVL recv buffer size. * Disable early stopping. * Apply similar optimizations on receiver warps. * Prevent warp divergence. * Disable aggressive ptx by default. * Revert using TMA to transfer scales. * Format. * Change the layout of dispatch NVL buffer. * Move topk transformation to recv warps. * Use TMA to transfer all data in foward warps * Use TMA to store scales. * Code lint --------- Co-authored-by:Chenggang Zhao <chenggangz@deepseek.com>
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- 02 Jul, 2025 9 commits
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Chenggang Zhao authored
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youkaichao authored
* use cli arg for num_processes Signed-off-by:
youkaichao <youkaichao@gmail.com> * update low-latency Signed-off-by:
youkaichao <youkaichao@gmail.com> * update intranode Signed-off-by:
youkaichao <youkaichao@gmail.com> * update internode Signed-off-by:
youkaichao <youkaichao@gmail.com> --------- Signed-off-by:
youkaichao <youkaichao@gmail.com>
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Chenggang Zhao authored
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Chenggang Zhao authored
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Chenggang Zhao authored
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fzyzcjy authored
* more * more * more * more * more * more
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Chenggang Zhao authored
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fzyzcjy authored
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fzyzcjy authored
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- 25 Jun, 2025 1 commit
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Shangyan Zhou authored
* Support bias. * Fix. * Fix style.
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- 24 Jun, 2025 2 commits
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Chenggang Zhao authored
* Add draft * Add fast-debugging flags * Fix several bugs * Add sender timeout checks * Fix stuck * Fix bugs * Fix bugs
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Shangyan Zhou authored
* Increase the test round. * Add warp synchronization. * Shuffle the send warps. * Add time elapsed into bench result.
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- 18 Jun, 2025 4 commits
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Chenggang Zhao authored
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Chenggang Zhao authored
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Shangyan Zhou authored
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Shangyan Zhou authored
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- 16 Jun, 2025 1 commit
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Chenggang Zhao authored
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- 13 Jun, 2025 1 commit
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Zhicheng Wu authored
let the sender SM use the channel_id, and the receiver SM use channel_id + num_channels
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- 12 Jun, 2025 1 commit
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Shifang Xu authored
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- 11 Jun, 2025 3 commits
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Chenggang Zhao authored
* Update README * Update `setup.py` * Fix headers * Add `DISABLE_NVSHMEM` for APIs * Fix launch * Fix TMA settings * Fix TMA usages * Fix dlink * Separate layout kernels * Update version * Add `is_sm90_compiled` * Fix tests * Add NVLink connection checks * Update README * Fix tests * Add some comments * Minor fix * Minor fix * Fix bugs
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Chenggang Zhao authored
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Chenggang Zhao authored
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- 09 Jun, 2025 2 commits
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Chenggang Zhao authored
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Chenggang Zhao authored
* Add low-latency kernel usage flag * Update comments
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- 06 Jun, 2025 1 commit
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Chenggang Zhao authored
* Update CMake files * Use TMA instead of LD/ST for intranode dispatch * Use TMA instead of LD/ST for intranode combine * Adjust configs * Test default configs as well * More warps for combine * Add inter-thread fence * Enable more warps * Do not use TMA for senders * Update configs * Remove useless wait
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- 22 Apr, 2025 1 commit
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Shangyan Zhou authored
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- 21 Apr, 2025 1 commit
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moningchen authored
In the Internode Normal Kernel, when using nvshmem ibrc for RDMA data transmission, a single QP is used for data transfer between two GPUs, which limits kernel performance in network card dual-port and RoCE network scenarios. In our optimized Internode Normal Kernel, we implemented multiple QPs for data transmission between two GPUs, setting a different QP for each channel. Additionally, we modified the transmission method from IBRC to IBGAD. Through these optimizations, the Internode Normal Kernel achieves optimal performance in both H800 and H20 environments, with RDMA transmission performance nearly reaching the physical network performance limit. Using the current default statistical method, in 4-node H800 and H20 environments, RDMA performance can reach 60GB/s+.
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- 11 Apr, 2025 1 commit
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Hao Lin authored
Signed-off-by:Hao Lin <linhaomails@gmail.com>
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- 10 Apr, 2025 1 commit
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fujianhao.fjh authored
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