Compile for gfx908 and gfx90a (#130)

* adding compilation for multiple targets

* fix build

* clean

* update Jekinsfile

* update readme

* update Jenkins

* use ck::half_t instead of ushort for bf16

* rename enum classes

* clean

* rename

* clean

library/include/ck/library/obselete_driver_offline/driver_gemm_dlops_v1r2.hpp

@@ -10,7 +10,7 @@ template <ck::index_t BlockSize,
           typename FloatAB,
           typename FloatAcc,
           typename FloatC,
-          ck::InMemoryDataOperationEnum_t CGlobalMemoryDataOperation,
+          ck::InMemoryDataOperationEnum CGlobalMemoryDataOperation,
           typename AKMGridDesc,
           typename BKNGridDesc,
           typename CMNGridDesc,

library/include/ck/library/obselete_driver_offline/driver_gemm_dlops_v1r3.hpp

@@ -10,7 +10,7 @@ template <ck::index_t BlockSize,
           typename FloatAB,
           typename FloatAcc,
           typename FloatC,
-          ck::InMemoryDataOperationEnum_t CGlobalMemoryDataOperation,
+          ck::InMemoryDataOperationEnum CGlobalMemoryDataOperation,
           typename AK0MK1GridDesc,
           typename BK0NK1GridDesc,
           typename CMNGridDesc,

library/include/ck/library/obselete_driver_offline/driver_gemm_xdlops_v2r3.hpp

@@ -11,7 +11,7 @@ template <ck::index_t BlockSize,
           typename FloatAB,
           typename FloatAcc,
           typename FloatC,
-          ck::InMemoryDataOperationEnum_t CGlobalMemoryDataOperation,
+          ck::InMemoryDataOperationEnum CGlobalMemoryDataOperation,
           typename AGridDesc_K0_M_K1,
           typename BGridDesc_K0_N_K,
           typename CMNGridDesc,

library/include/ck/library/obselete_driver_offline/driver_gemm_xdlops_v2r4.hpp

@@ -10,7 +10,7 @@ template <ck::index_t BlockSize,
           typename FloatAB,
           typename FloatAcc,
           typename FloatC,
-          ck::InMemoryDataOperationEnum_t CGlobalMemoryDataOperation,
+          ck::InMemoryDataOperationEnum CGlobalMemoryDataOperation,
           typename ABK0MK1GridDesc,
           typename BBK0NK1GridDesc,
           typename CMNGridDesc,

library/include/ck/library/tensor_operation_instance/gpu/reduce/device_reduce_instance_blockwise.hpp

@@ -47,7 +47,7 @@ using reduce_configuration_2_instances_blockwise = std::tuple<
     >;
 #endif
 
-template <typename AccDataType, ReduceTensorOp_t ReduceOpId>
+template <typename AccDataType, ReduceTensorOp ReduceOpId>
 using deviceReduceBlockWisePtrType = DeviceReducePtr<
     typename reduce_unary_operator<AccDataType, ReduceOpId, true, true>::InElementwiseOperation,
     typename reduce_unary_operator<AccDataType, ReduceOpId, true, true>::AccElementwiseOperation>;
@@ -57,9 +57,9 @@ template <typename InDataType,
           typename OutDataType,
           int Rank,
           int NumReduceDim,
-          ReduceTensorOp_t ReduceOpId,
-          NanPropagation_t NanOpt,
-          ReduceTensorIndices_t IndicesOpt>
+          ReduceTensorOp ReduceOpId,
+          NanPropagation NanOpt,
+          ReduceTensorIndices IndicesOpt>
 void add_device_reduce_instance_blockwise(
     std::vector<deviceReduceBlockWisePtrType<AccDataType, ReduceOpId>>& device_op_instances)
 {
@@ -71,11 +71,11 @@ void add_device_reduce_instance_blockwise(
             AccElementwiseOperation;
 
     constexpr bool Indexable =
-        (ReduceOpId == ReduceTensorOp_t::MIN || ReduceOpId == ReduceTensorOp_t::MAX ||
-         ReduceOpId == ReduceTensorOp_t::AMAX);
-    constexpr bool NeedIndices = Indexable && (IndicesOpt != ReduceTensorIndices_t::NO_INDICES);
+        (ReduceOpId == ReduceTensorOp::MIN || ReduceOpId == ReduceTensorOp::MAX ||
+         ReduceOpId == ReduceTensorOp::AMAX);
+    constexpr bool NeedIndices = Indexable && (IndicesOpt != ReduceTensorIndices::NO_INDICES);
 
-    constexpr bool PropagateNan = (NanOpt == NanPropagation_t::NOT_PROPAGATE_NAN) ? false : true;
+    constexpr bool PropagateNan = (NanOpt == NanPropagation::NOT_PROPAGATE_NAN) ? false : true;
 
     static_for<0, std::tuple_size<reduce_configuration_1_instances>::value, 1>{}([&](auto i) {
         using cfg1 =
@@ -123,15 +123,15 @@ void add_device_reduce_instance_blockwise(
                                                        IndicesOpt>(       \
         std::vector<deviceReduceBlockWisePtrType<compT, ReduceOpId>> & device_op_instances)
 
-#define ADD_BLOCKWISE_INST_BY_ID(                                              \
-    inT, compT, outT, ReduceOpId, NanOpt, IndicesOpt, Rank, NumReduceDim)      \
-    ADD_BLOCKWISE_INST_BY_TYPE(inT,                                            \
-                               compT,                                          \
-                               outT,                                           \
-                               static_cast<ReduceTensorOp_t>(ReduceOpId),      \
-                               static_cast<NanPropagation_t>(NanOpt),          \
-                               static_cast<ReduceTensorIndices_t>(IndicesOpt), \
-                               Rank,                                           \
+#define ADD_BLOCKWISE_INST_BY_ID(                                            \
+    inT, compT, outT, ReduceOpId, NanOpt, IndicesOpt, Rank, NumReduceDim)    \
+    ADD_BLOCKWISE_INST_BY_TYPE(inT,                                          \
+                               compT,                                        \
+                               outT,                                         \
+                               static_cast<ReduceTensorOp>(ReduceOpId),      \
+                               static_cast<NanPropagation>(NanOpt),          \
+                               static_cast<ReduceTensorIndices>(IndicesOpt), \
+                               Rank,                                         \
                                NumReduceDim)
 
 #define ADD_BLOCKWISE_INST_REF_BY_TYPE(                                                            \
@@ -150,15 +150,15 @@ void add_device_reduce_instance_blockwise(
                 AccElementwiseOperation>> &                                                        \
         device_op_instances)
 
-#define ADD_BLOCKWISE_INST_REF_BY_ID(                                              \
-    inT, compT, outT, ReduceOpId, NanOpt, IndicesOpt, Rank, NumReduceDim)          \
-    ADD_BLOCKWISE_INST_REF_BY_TYPE(inT,                                            \
-                                   compT,                                          \
-                                   outT,                                           \
-                                   static_cast<ReduceTensorOp_t>(ReduceOpId),      \
-                                   static_cast<NanPropagation_t>(NanOpt),          \
-                                   static_cast<ReduceTensorIndices_t>(IndicesOpt), \
-                                   Rank,                                           \
+#define ADD_BLOCKWISE_INST_REF_BY_ID(                                            \
+    inT, compT, outT, ReduceOpId, NanOpt, IndicesOpt, Rank, NumReduceDim)        \
+    ADD_BLOCKWISE_INST_REF_BY_TYPE(inT,                                          \
+                                   compT,                                        \
+                                   outT,                                         \
+                                   static_cast<ReduceTensorOp>(ReduceOpId),      \
+                                   static_cast<NanPropagation>(NanOpt),          \
+                                   static_cast<ReduceTensorIndices>(IndicesOpt), \
+                                   Rank,                                         \
                                    NumReduceDim)
 
 } // namespace device_reduce_instance

library/include/ck/library/tensor_operation_instance/gpu/reduce/device_reduce_instance_blockwise_second_call.hpp

@@ -34,7 +34,7 @@ using reduce_configuration_2_instances_blockwise_second_call = std::tuple<
     >;
 #endif
 
-template <typename AccDataType, ReduceTensorOp_t ReduceOpId>
+template <typename AccDataType, ReduceTensorOp ReduceOpId>
 using deviceReduceBlockWiseSecondCallPtrType = DeviceReducePtr<
     typename reduce_unary_operator<AccDataType, ReduceOpId, false, true>::InElementwiseOperation,
     typename reduce_unary_operator<AccDataType, ReduceOpId, false, true>::AccElementwiseOperation>;
@@ -44,9 +44,9 @@ template <typename InDataType,
           typename OutDataType,
           int Rank,
           int NumReduceDim,
-          ReduceTensorOp_t ReduceOpId,
-          NanPropagation_t NanOpt,
-          ReduceTensorIndices_t IndicesOpt>
+          ReduceTensorOp ReduceOpId,
+          NanPropagation NanOpt,
+          ReduceTensorIndices IndicesOpt>
 void add_device_reduce_instance_blockwise_second_call(
     std::vector<deviceReduceBlockWiseSecondCallPtrType<AccDataType, ReduceOpId>>&
         device_op_instances)
@@ -60,11 +60,11 @@ void add_device_reduce_instance_blockwise_second_call(
             AccElementwiseOperation;
 
     constexpr bool Indexable =
-        (ReduceOpId == ReduceTensorOp_t::MIN || ReduceOpId == ReduceTensorOp_t::MAX ||
-         ReduceOpId == ReduceTensorOp_t::AMAX);
-    constexpr bool NeedIndices = Indexable && (IndicesOpt != ReduceTensorIndices_t::NO_INDICES);
+        (ReduceOpId == ReduceTensorOp::MIN || ReduceOpId == ReduceTensorOp::MAX ||
+         ReduceOpId == ReduceTensorOp::AMAX);
+    constexpr bool NeedIndices = Indexable && (IndicesOpt != ReduceTensorIndices::NO_INDICES);
 
-    constexpr bool PropagateNan = (NanOpt == NanPropagation_t::NOT_PROPAGATE_NAN) ? false : true;
+    constexpr bool PropagateNan = (NanOpt == NanPropagation::NOT_PROPAGATE_NAN) ? false : true;
 
     static_assert(std::is_same<InDataType, AccDataType>::value,
                   "InDataType and AccDataType should be the same to use "
@@ -117,15 +117,15 @@ void add_device_reduce_instance_blockwise_second_call(
         std::vector<deviceReduceBlockWiseSecondCallPtrType<compT, ReduceOpId>> & \
         device_op_instances)
 
-#define ADD_BLOCKWISE_SECOND_CALL_INST_BY_ID(                                              \
-    inT, compT, outT, ReduceOpId, NanOpt, IndicesOpt, Rank, NumReduceDim)                  \
-    ADD_BLOCKWISE_SECOND_CALL_INST_BY_TYPE(inT,                                            \
-                                           compT,                                          \
-                                           outT,                                           \
-                                           static_cast<ReduceTensorOp_t>(ReduceOpId),      \
-                                           static_cast<NanPropagation_t>(NanOpt),          \
-                                           static_cast<ReduceTensorIndices_t>(IndicesOpt), \
-                                           Rank,                                           \
+#define ADD_BLOCKWISE_SECOND_CALL_INST_BY_ID(                                            \
+    inT, compT, outT, ReduceOpId, NanOpt, IndicesOpt, Rank, NumReduceDim)                \
+    ADD_BLOCKWISE_SECOND_CALL_INST_BY_TYPE(inT,                                          \
+                                           compT,                                        \
+                                           outT,                                         \
+                                           static_cast<ReduceTensorOp>(ReduceOpId),      \
+                                           static_cast<NanPropagation>(NanOpt),          \
+                                           static_cast<ReduceTensorIndices>(IndicesOpt), \
+                                           Rank,                                         \
                                            NumReduceDim)
 
 #define ADD_BLOCKWISE_SECOND_CALL_INST_REF_BY_TYPE(                                          \
@@ -145,15 +145,15 @@ void add_device_reduce_instance_blockwise_second_call(
                                 AccElementwiseOperation>> &                                  \
         device_op_instances)
 
-#define ADD_BLOCKWISE_SECOND_CALL_INST_REF_BY_ID(                                              \
-    inT, compT, outT, ReduceOpId, NanOpt, IndicesOpt, Rank, NumReduceDim)                      \
-    ADD_BLOCKWISE_SECOND_CALL_INST_REF_BY_TYPE(inT,                                            \
-                                               compT,                                          \
-                                               outT,                                           \
-                                               static_cast<ReduceTensorOp_t>(ReduceOpId),      \
-                                               static_cast<NanPropagation_t>(NanOpt),          \
-                                               static_cast<ReduceTensorIndices_t>(IndicesOpt), \
-                                               Rank,                                           \
+#define ADD_BLOCKWISE_SECOND_CALL_INST_REF_BY_ID(                                            \
+    inT, compT, outT, ReduceOpId, NanOpt, IndicesOpt, Rank, NumReduceDim)                    \
+    ADD_BLOCKWISE_SECOND_CALL_INST_REF_BY_TYPE(inT,                                          \
+                                               compT,                                        \
+                                               outT,                                         \
+                                               static_cast<ReduceTensorOp>(ReduceOpId),      \
+                                               static_cast<NanPropagation>(NanOpt),          \
+                                               static_cast<ReduceTensorIndices>(IndicesOpt), \
+                                               Rank,                                         \
                                                NumReduceDim)
 
 } // namespace device_reduce_instance

library/include/ck/library/tensor_operation_instance/gpu/reduce/device_reduce_instance_multiblock_atomic_add.hpp

@@ -47,7 +47,7 @@ using reduce_configuration_2_instances_multiblock_atomic_add = std::tuple<
     >;
 #endif
 
-template <typename AccDataType, ReduceTensorOp_t ReduceOperation>
+template <typename AccDataType, ReduceTensorOp ReduceOperation>
 using deviceReduceMultiBlockAtomicAddPtrType =
     DeviceReducePtr<typename reduce_unary_operator<AccDataType, ReduceOperation, true, true>::
                         InElementwiseOperation,
@@ -59,9 +59,9 @@ template <typename InDataType,
           typename OutDataType,
           int Rank,
           int NumReduceDim,
-          ReduceTensorOp_t ReduceOpId,
-          NanPropagation_t NanOpt,
-          ReduceTensorIndices_t IndicesOpt>
+          ReduceTensorOp ReduceOpId,
+          NanPropagation NanOpt,
+          ReduceTensorIndices IndicesOpt>
 void add_device_reduce_instance_multiblock_atomic_add(
     std::vector<deviceReduceMultiBlockAtomicAddPtrType<AccDataType, ReduceOpId>>&
         device_op_instances)
@@ -74,18 +74,18 @@ void add_device_reduce_instance_multiblock_atomic_add(
             AccElementwiseOperation;
 
     constexpr bool Indexable =
-        (ReduceOpId == ReduceTensorOp_t::MIN || ReduceOpId == ReduceTensorOp_t::MAX ||
-         ReduceOpId == ReduceTensorOp_t::AMAX);
-    constexpr bool NeedIndices = Indexable && (IndicesOpt != ReduceTensorIndices_t::NO_INDICES);
+        (ReduceOpId == ReduceTensorOp::MIN || ReduceOpId == ReduceTensorOp::MAX ||
+         ReduceOpId == ReduceTensorOp::AMAX);
+    constexpr bool NeedIndices = Indexable && (IndicesOpt != ReduceTensorIndices::NO_INDICES);
 
-    constexpr bool PropagateNan = (NanOpt == NanPropagation_t::NOT_PROPAGATE_NAN) ? false : true;
+    constexpr bool PropagateNan = (NanOpt == NanPropagation::NOT_PROPAGATE_NAN) ? false : true;
 
-    static_assert(IndicesOpt == ReduceTensorIndices_t::NO_INDICES,
+    static_assert(IndicesOpt == ReduceTensorIndices::NO_INDICES,
                   "AtomicAdd can only be used with reduction operations without indices!");
 
     constexpr bool op_acceptable =
-        (ReduceOpId == ReduceTensorOp_t::ADD || ReduceOpId == ReduceTensorOp_t::MUL ||
-         ReduceOpId == ReduceTensorOp_t::AVG || ReduceOpId == ReduceTensorOp_t::NORM1);
+        (ReduceOpId == ReduceTensorOp::ADD || ReduceOpId == ReduceTensorOp::MUL ||
+         ReduceOpId == ReduceTensorOp::AVG || ReduceOpId == ReduceTensorOp::NORM1);
 
     constexpr bool out_type_acceptable =
         (std::is_same<OutDataType, float>::value || std::is_same<OutDataType, double>::value);
@@ -144,15 +144,15 @@ void add_device_reduce_instance_multiblock_atomic_add(
         std::vector<deviceReduceMultiBlockAtomicAddPtrType<compT, ReduceOpId>> & \
         device_op_instances)
 
-#define ADD_MULTIBLOCK_ATOMIC_ADD_INST_BY_ID(                                              \
-    inT, compT, outT, ReduceOpId, NanOpt, IndicesOpt, Rank, NumReduceDim)                  \
-    ADD_MULTIBLOCK_ATOMIC_ADD_INST_BY_TYPE(inT,                                            \
-                                           compT,                                          \
-                                           outT,                                           \
-                                           static_cast<ReduceTensorOp_t>(ReduceOpId),      \
-                                           static_cast<NanPropagation_t>(NanOpt),          \
-                                           static_cast<ReduceTensorIndices_t>(IndicesOpt), \
-                                           Rank,                                           \
+#define ADD_MULTIBLOCK_ATOMIC_ADD_INST_BY_ID(                                            \
+    inT, compT, outT, ReduceOpId, NanOpt, IndicesOpt, Rank, NumReduceDim)                \
+    ADD_MULTIBLOCK_ATOMIC_ADD_INST_BY_TYPE(inT,                                          \
+                                           compT,                                        \
+                                           outT,                                         \
+                                           static_cast<ReduceTensorOp>(ReduceOpId),      \
+                                           static_cast<NanPropagation>(NanOpt),          \
+                                           static_cast<ReduceTensorIndices>(IndicesOpt), \
+                                           Rank,                                         \
                                            NumReduceDim)
 
 #define ADD_MULTIBLOCK_ATOMIC_ADD_INST_REF_BY_TYPE(                                                \
@@ -171,15 +171,15 @@ void add_device_reduce_instance_multiblock_atomic_add(
                 AccElementwiseOperation>> &                                                        \
         device_op_instances)
 
-#define ADD_MULTIBLOCK_ATOMIC_ADD_INST_REF_BY_ID(                                              \
-    inT, compT, outT, ReduceOpId, NanOpt, IndicesOpt, Rank, NumReduceDim)                      \
-    ADD_MULTIBLOCK_ATOMIC_ADD_INST_REF_BY_TYPE(inT,                                            \
-                                               compT,                                          \
-                                               outT,                                           \
-                                               static_cast<ReduceTensorOp_t>(ReduceOpId),      \
-                                               static_cast<NanPropagation_t>(NanOpt),          \
-                                               static_cast<ReduceTensorIndices_t>(IndicesOpt), \
-                                               Rank,                                           \
+#define ADD_MULTIBLOCK_ATOMIC_ADD_INST_REF_BY_ID(                                            \
+    inT, compT, outT, ReduceOpId, NanOpt, IndicesOpt, Rank, NumReduceDim)                    \
+    ADD_MULTIBLOCK_ATOMIC_ADD_INST_REF_BY_TYPE(inT,                                          \
+                                               compT,                                        \
+                                               outT,                                         \
+                                               static_cast<ReduceTensorOp>(ReduceOpId),      \
+                                               static_cast<NanPropagation>(NanOpt),          \
+                                               static_cast<ReduceTensorIndices>(IndicesOpt), \
+                                               Rank,                                         \
                                                NumReduceDim)
 
 } // namespace device_reduce_instance

library/include/ck/library/tensor_operation_instance/gpu/reduce/device_reduce_instance_multiblock_partial_reduce.hpp

@@ -46,7 +46,7 @@ using reduce_configuration_2_instances_multiblock_partial_reduce = std::tuple<
     >;
 #endif
 
-template <typename AccDataType, ReduceTensorOp_t ReduceOpId>
+template <typename AccDataType, ReduceTensorOp ReduceOpId>
 using deviceReduceMultiBlockPartialReducePtrType = DeviceReducePtr<
     typename reduce_unary_operator<AccDataType, ReduceOpId, true, false>::InElementwiseOperation,
     typename reduce_unary_operator<AccDataType, ReduceOpId, true, false>::AccElementwiseOperation>;
@@ -56,9 +56,9 @@ template <typename InDataType,
           typename OutDataType,
           int Rank,
           int NumReduceDim,
-          ReduceTensorOp_t ReduceOpId,
-          NanPropagation_t NanOpt,
-          ReduceTensorIndices_t IndicesOpt>
+          ReduceTensorOp ReduceOpId,
+          NanPropagation NanOpt,
+          ReduceTensorIndices IndicesOpt>
 void add_device_reduce_instance_multiblock_partial_reduce(
     std::vector<deviceReduceMultiBlockPartialReducePtrType<AccDataType, ReduceOpId>>&
         device_op_instances)
@@ -72,11 +72,11 @@ void add_device_reduce_instance_multiblock_partial_reduce(
             AccElementwiseOperation;
 
     constexpr bool Indexable =
-        (ReduceOpId == ReduceTensorOp_t::MIN || ReduceOpId == ReduceTensorOp_t::MAX ||
-         ReduceOpId == ReduceTensorOp_t::AMAX);
-    constexpr bool NeedIndices = Indexable && (IndicesOpt != ReduceTensorIndices_t::NO_INDICES);
+        (ReduceOpId == ReduceTensorOp::MIN || ReduceOpId == ReduceTensorOp::MAX ||
+         ReduceOpId == ReduceTensorOp::AMAX);
+    constexpr bool NeedIndices = Indexable && (IndicesOpt != ReduceTensorIndices::NO_INDICES);
 
-    constexpr bool PropagateNan = (NanOpt == NanPropagation_t::NOT_PROPAGATE_NAN) ? false : true;
+    constexpr bool PropagateNan = (NanOpt == NanPropagation::NOT_PROPAGATE_NAN) ? false : true;
 
     static_for<0, std::tuple_size<reduce_configuration_1_instances>::value, 1>{}([&](auto i) {
         using cfg1 =
@@ -126,15 +126,15 @@ void add_device_reduce_instance_multiblock_partial_reduce(
         std::vector<deviceReduceMultiBlockPartialReducePtrType<compT, ReduceOpId>> & \
         device_op_instances)
 
-#define ADD_MULTIBLOCK_PARTIAL_REDUCE_INST_BY_ID(                                              \
-    inT, compT, outT, ReduceOpId, NanOpt, IndicesOpt, Rank, NumReduceDim)                      \
-    ADD_MULTIBLOCK_PARTIAL_REDUCE_INST_BY_TYPE(inT,                                            \
-                                               compT,                                          \
-                                               outT,                                           \
-                                               static_cast<ReduceTensorOp_t>(ReduceOpId),      \
-                                               static_cast<NanPropagation_t>(NanOpt),          \
-                                               static_cast<ReduceTensorIndices_t>(IndicesOpt), \
-                                               Rank,                                           \
+#define ADD_MULTIBLOCK_PARTIAL_REDUCE_INST_BY_ID(                                            \
+    inT, compT, outT, ReduceOpId, NanOpt, IndicesOpt, Rank, NumReduceDim)                    \
+    ADD_MULTIBLOCK_PARTIAL_REDUCE_INST_BY_TYPE(inT,                                          \
+                                               compT,                                        \
+                                               outT,                                         \
+                                               static_cast<ReduceTensorOp>(ReduceOpId),      \
+                                               static_cast<NanPropagation>(NanOpt),          \
+                                               static_cast<ReduceTensorIndices>(IndicesOpt), \
+                                               Rank,                                         \
                                                NumReduceDim)
 
 #define ADD_MULTIBLOCK_PARTIAL_REDUCE_INST_REF_BY_TYPE(                                      \
@@ -154,15 +154,15 @@ void add_device_reduce_instance_multiblock_partial_reduce(
                                 AccElementwiseOperation>> &                                  \
         device_op_instances)
 
-#define ADD_MULTIBLOCK_PARTIAL_REDUCE_INST_REF_BY_ID(                                              \
-    inT, compT, outT, ReduceOpId, NanOpt, IndicesOpt, Rank, NumReduceDim)                          \
-    ADD_MULTIBLOCK_PARTIAL_REDUCE_INST_REF_BY_TYPE(inT,                                            \
-                                                   compT,                                          \
-                                                   outT,                                           \
-                                                   static_cast<ReduceTensorOp_t>(ReduceOpId),      \
-                                                   static_cast<NanPropagation_t>(NanOpt),          \
-                                                   static_cast<ReduceTensorIndices_t>(IndicesOpt), \
-                                                   Rank,                                           \
+#define ADD_MULTIBLOCK_PARTIAL_REDUCE_INST_REF_BY_ID(                                            \
+    inT, compT, outT, ReduceOpId, NanOpt, IndicesOpt, Rank, NumReduceDim)                        \
+    ADD_MULTIBLOCK_PARTIAL_REDUCE_INST_REF_BY_TYPE(inT,                                          \
+                                                   compT,                                        \
+                                                   outT,                                         \
+                                                   static_cast<ReduceTensorOp>(ReduceOpId),      \
+                                                   static_cast<NanPropagation>(NanOpt),          \
+                                                   static_cast<ReduceTensorIndices>(IndicesOpt), \
+                                                   Rank,                                         \
                                                    NumReduceDim)
 
 } // namespace device_reduce_instance

library/include/ck/library/tensor_operation_instance/gpu/reduce/device_reduce_instance_threadwise.hpp

@@ -47,7 +47,7 @@ using reduce_configuration_2_instances_threadwise = std::tuple<
     >;
 #endif
 
-template <typename AccDataType, ReduceTensorOp_t ReduceOpId>
+template <typename AccDataType, ReduceTensorOp ReduceOpId>
 using deviceReduceThreadWisePtrType = DeviceReducePtr<
     typename reduce_unary_operator<AccDataType, ReduceOpId, true, true>::InElementwiseOperation,
     typename reduce_unary_operator<AccDataType, ReduceOpId, true, true>::AccElementwiseOperation>;
@@ -57,9 +57,9 @@ template <typename InDataType,
           typename OutDataType,
           int Rank,
           int NumReduceDim,
-          ReduceTensorOp_t ReduceOpId,
-          NanPropagation_t NanOpt,
-          ReduceTensorIndices_t IndicesOpt>
+          ReduceTensorOp ReduceOpId,
+          NanPropagation NanOpt,
+          ReduceTensorIndices IndicesOpt>
 void add_device_reduce_instance_threadwise(
     std::vector<deviceReduceThreadWisePtrType<AccDataType, ReduceOpId>>& device_op_instances)
 {
@@ -71,11 +71,11 @@ void add_device_reduce_instance_threadwise(
             AccElementwiseOperation;
 
     constexpr bool Indexable =
-        (ReduceOpId == ReduceTensorOp_t::MIN || ReduceOpId == ReduceTensorOp_t::MAX ||
-         ReduceOpId == ReduceTensorOp_t::AMAX);
-    constexpr bool NeedIndices = Indexable && (IndicesOpt != ReduceTensorIndices_t::NO_INDICES);
+        (ReduceOpId == ReduceTensorOp::MIN || ReduceOpId == ReduceTensorOp::MAX ||
+         ReduceOpId == ReduceTensorOp::AMAX);
+    constexpr bool NeedIndices = Indexable && (IndicesOpt != ReduceTensorIndices::NO_INDICES);
 
-    constexpr bool PropagateNan = (NanOpt == NanPropagation_t::NOT_PROPAGATE_NAN) ? false : true;
+    constexpr bool PropagateNan = (NanOpt == NanPropagation::NOT_PROPAGATE_NAN) ? false : true;
 
     using cfg1 = ReductionConfiguration_1<256, 256, 1>;
 
@@ -119,15 +119,15 @@ void add_device_reduce_instance_threadwise(
                                                         IndicesOpt>(      \
         std::vector<deviceReduceThreadWisePtrType<compT, ReduceOpId>> & device_op_instances)
 
-#define ADD_THREADWISE_INST_BY_ID(                                              \
-    inT, compT, outT, ReduceOpId, NanOpt, IndicesOpt, Rank, NumReduceDim)       \
-    ADD_THREADWISE_INST_BY_TYPE(inT,                                            \
-                                compT,                                          \
-                                outT,                                           \
-                                static_cast<ReduceTensorOp_t>(ReduceOpId),      \
-                                static_cast<NanPropagation_t>(NanOpt),          \
-                                static_cast<ReduceTensorIndices_t>(IndicesOpt), \
-                                Rank,                                           \
+#define ADD_THREADWISE_INST_BY_ID(                                            \
+    inT, compT, outT, ReduceOpId, NanOpt, IndicesOpt, Rank, NumReduceDim)     \
+    ADD_THREADWISE_INST_BY_TYPE(inT,                                          \
+                                compT,                                        \
+                                outT,                                         \
+                                static_cast<ReduceTensorOp>(ReduceOpId),      \
+                                static_cast<NanPropagation>(NanOpt),          \
+                                static_cast<ReduceTensorIndices>(IndicesOpt), \
+                                Rank,                                         \
                                 NumReduceDim)
 
 #define ADD_THREADWISE_INST_REF_BY_TYPE(                                                           \
@@ -146,15 +146,15 @@ void add_device_reduce_instance_threadwise(
                 AccElementwiseOperation>> &                                                        \
         device_op_instances)
 
-#define ADD_THREADWISE_INST_REF_BY_ID(                                              \
-    inT, compT, outT, ReduceOpId, NanOpt, IndicesOpt, Rank, NumReduceDim)           \
-    ADD_THREADWISE_INST_REF_BY_TYPE(inT,                                            \
-                                    compT,                                          \
-                                    outT,                                           \
-                                    static_cast<ReduceTensorOp_t>(ReduceOpId),      \
-                                    static_cast<NanPropagation_t>(NanOpt),          \
-                                    static_cast<ReduceTensorIndices_t>(IndicesOpt), \
-                                    Rank,                                           \
+#define ADD_THREADWISE_INST_REF_BY_ID(                                            \
+    inT, compT, outT, ReduceOpId, NanOpt, IndicesOpt, Rank, NumReduceDim)         \
+    ADD_THREADWISE_INST_REF_BY_TYPE(inT,                                          \
+                                    compT,                                        \
+                                    outT,                                         \
+                                    static_cast<ReduceTensorOp>(ReduceOpId),      \
+                                    static_cast<NanPropagation>(NanOpt),          \
+                                    static_cast<ReduceTensorIndices>(IndicesOpt), \
+                                    Rank,                                         \
                                     NumReduceDim)
 
 } // namespace device_reduce_instance

library/src/obselete_driver_offline/conv_add_fwd_driver_offline_nchwc.cpp

@@ -39,7 +39,7 @@ void host_direct_convolution_add_nchwc(const Tensor<TIn>& in,
                                        const ConvDilations& conv_dilations,
                                        const InLeftPads& in_left_pads,
                                        const InRightPads&,
-                                       const ck::ActivTypeEnum_t activ_type)
+                                       const ck::ActivTypeEnum activ_type)
 {
     using namespace ck;
 
@@ -117,7 +117,7 @@ int main(int argc, char* argv[])
         exit(1);
     }
 
-    constexpr ck::ActivTypeEnum_t activ_type = ActivTypeEnum_t::LeakyRelu;
+    constexpr ck::ActivTypeEnum activ_type = ActivTypeEnum::LeakyRelu;
 
     const ConvForwardAlgo algo = static_cast<ConvForwardAlgo>(std::stoi(argv[1]));
     const bool do_verification = std::stoi(argv[2]);
@@ -167,7 +167,7 @@ int main(int argc, char* argv[])
     const bool do_log          = std::stoi(argv[4]);
     const int nrepeat          = std::stoi(argv[5]);
 
-    constexpr ck::ActivTypeEnum_t activ_type = ActivTypeEnum_t::LeakyRelu;
+    constexpr ck::ActivTypeEnum activ_type = ActivTypeEnum::LeakyRelu;
 
 #if 0
     constexpr auto N             = Number<1>{};

library/src/obselete_driver_offline/conv_fwd_driver_offline_nchwc.cpp

@@ -37,7 +37,7 @@ void host_direct_convolution_nchwc(const Tensor<TIn>& in,
                                    const ConvDilations& conv_dilations,
                                    const InLeftPads& in_left_pads,
                                    const InRightPads&,
-                                   const ck::ActivTypeEnum_t activ_type)
+                                   const ck::ActivTypeEnum activ_type)
 {
     using namespace ck;
 
@@ -102,7 +102,7 @@ int main(int argc, char* argv[])
         exit(1);
     }
 
-    constexpr ck::ActivTypeEnum_t activ_type = ActivTypeEnum_t::LeakyRelu;
+    constexpr ck::ActivTypeEnum activ_type = ActivTypeEnum::LeakyRelu;
 
     const ConvForwardAlgo algo = static_cast<ConvForwardAlgo>(std::stoi(argv[1]));
     const bool do_verification = std::stoi(argv[2]);
@@ -149,8 +149,8 @@ int main(int argc, char* argv[])
     const bool do_log          = std::stoi(argv[4]);
     const int nrepeat          = std::stoi(argv[5]);
 
-    // constexpr ck::ActivTypeEnum_t activ_type = ActivTypeEnum_t::Sigmoid;
-    constexpr ck::ActivTypeEnum_t activ_type = ActivTypeEnum_t::LeakyRelu;
+    // constexpr ck::ActivTypeEnum activ_type = ActivTypeEnum::Sigmoid;
+    constexpr ck::ActivTypeEnum activ_type = ActivTypeEnum::LeakyRelu;
 
 #if 0
     constexpr auto N              = Number<1>{};

library/src/obselete_driver_offline/conv_maxpool_fwd_driver_offline_nchwc.cpp

@@ -38,7 +38,7 @@ void host_direct_convolution_maxpool_nchwc(const Tensor<TIn>& in,
                                            const ConvDilations& conv_dilations,
                                            const InLeftPads& in_left_pads,
                                            const InRightPads&,
-                                           const ck::ActivTypeEnum_t activ_type)
+                                           const ck::ActivTypeEnum activ_type)
 {
     using namespace ck;
 
@@ -126,7 +126,7 @@ int main(int argc, char* argv[])
         exit(1);
     }
 
-    constexpr ck::ActivTypeEnum_t activ_type = ActivTypeEnum_t::LeakyRelu;
+    constexpr ck::ActivTypeEnum activ_type = ActivTypeEnum::LeakyRelu;
 
     const ConvForwardAlgo algo = static_cast<ConvForwardAlgo>(std::stoi(argv[1]));
     const bool do_verification = std::stoi(argv[2]);
@@ -176,18 +176,18 @@ int main(int argc, char* argv[])
     const bool do_log          = std::stoi(argv[4]);
     const int nrepeat          = std::stoi(argv[5]);
 
-    constexpr ck::ActivTypeEnum_t activ_type = ActivTypeEnum_t::LeakyRelu;
+    constexpr ck::ActivTypeEnum activ_type = ActivTypeEnum::LeakyRelu;
 
 #if 1
-    constexpr auto N                         = Number<1>{};
-    constexpr auto Hi                        = Number<1080>{};
-    constexpr auto Wi                        = Number<1920>{};
-    constexpr auto Y                         = Number<3>{};
-    constexpr auto X                         = Number<3>{};
-    constexpr auto C0                        = Number<2>{};
-    constexpr auto C1                        = Number<8>{};
-    constexpr auto K0                        = Number<2>{};
-    constexpr auto K1                        = Number<8>{};
+    constexpr auto N                       = Number<1>{};
+    constexpr auto Hi                      = Number<1080>{};
+    constexpr auto Wi                      = Number<1920>{};
+    constexpr auto Y                       = Number<3>{};
+    constexpr auto X                       = Number<3>{};
+    constexpr auto C0                      = Number<2>{};
+    constexpr auto C1                      = Number<8>{};
+    constexpr auto K0                      = Number<2>{};
+    constexpr auto K1                      = Number<8>{};
 #elif 0
     constexpr auto N  = Number<1>{};
     constexpr auto Hi = Number<1080>{};

library/src/tensor_operation_instance/gpu/batched_gemm_reduce/device_batched_gemm_reduce_xdl_cshuffle_f16_f16_f16_f32_f32_gkm_gkn_gmn_instance.cpp

@@ -23,7 +23,7 @@ using PassThrough     = ck::tensor_operation::element_wise::PassThrough;
 using ReduceSum       = ck::tensor_operation::element_wise::ReduceSum;
 using ReduceSquareSum = ck::tensor_operation::element_wise::ReduceSquareSum;
 
-static constexpr auto GemmDefault = ck::tensor_operation::device::GemmSpecialization_t::Default;
+static constexpr auto GemmDefault = ck::tensor_operation::device::GemmSpecialization::Default;
 
 // c[g, m, n] = a[g, m, k] * b[g, n, k]
 // d0[g, m] = reduce0(c[g, m, n])

library/src/tensor_operation_instance/gpu/batched_gemm_reduce/device_batched_gemm_reduce_xdl_cshuffle_f16_f16_f16_f32_f32_gkm_gnk_gmn_instance.cpp

@@ -23,7 +23,7 @@ using PassThrough     = ck::tensor_operation::element_wise::PassThrough;
 using ReduceSum       = ck::tensor_operation::element_wise::ReduceSum;
 using ReduceSquareSum = ck::tensor_operation::element_wise::ReduceSquareSum;
 
-static constexpr auto GemmDefault = ck::tensor_operation::device::GemmSpecialization_t::Default;
+static constexpr auto GemmDefault = ck::tensor_operation::device::GemmSpecialization::Default;
 
 // c[g, m, n] = a[g, m, k] * b[g, n, k]
 // d0[g, m] = reduce0(c[g, m, n])

library/src/tensor_operation_instance/gpu/batched_gemm_reduce/device_batched_gemm_reduce_xdl_cshuffle_f16_f16_f16_f32_f32_gmk_gkn_gmn_instance.cpp

@@ -23,7 +23,7 @@ using PassThrough     = ck::tensor_operation::element_wise::PassThrough;
 using ReduceSum       = ck::tensor_operation::element_wise::ReduceSum;
 using ReduceSquareSum = ck::tensor_operation::element_wise::ReduceSquareSum;
 
-static constexpr auto GemmDefault = ck::tensor_operation::device::GemmSpecialization_t::Default;
+static constexpr auto GemmDefault = ck::tensor_operation::device::GemmSpecialization::Default;
 
 // c[g, m, n] = a[g, m, k] * b[g, n, k]
 // d0[g, m] = reduce0(c[g, m, n])

library/src/tensor_operation_instance/gpu/batched_gemm_reduce/device_batched_gemm_reduce_xdl_cshuffle_f16_f16_f16_f32_f32_gmk_gnk_gmn_instance.cpp

@@ -23,7 +23,7 @@ using PassThrough     = ck::tensor_operation::element_wise::PassThrough;
 using ReduceSum       = ck::tensor_operation::element_wise::ReduceSum;
 using ReduceSquareSum = ck::tensor_operation::element_wise::ReduceSquareSum;
 
-static constexpr auto GemmDefault = ck::tensor_operation::device::GemmSpecialization_t::Default;
+static constexpr auto GemmDefault = ck::tensor_operation::device::GemmSpecialization::Default;
 
 // c[g, m, n] = a[g, m, k] * b[g, n, k]
 // d0[g, m] = reduce0(c[g, m, n])

library/src/tensor_operation_instance/gpu/conv1d_fwd/device_conv1d_fwd_xdl_nwc_kxc_nwk_bf16_instance.cpp

@@ -18,13 +18,13 @@ using S = ck::Sequence<Is...>;
 using PassThrough = ck::tensor_operation::element_wise::PassThrough;
 
 static constexpr auto ConvFwdDefault =
-    ck::tensor_operation::device::ConvolutionForwardSpecialization_t::Default;
+    ck::tensor_operation::device::ConvolutionForwardSpecialization::Default;
 
 static constexpr auto ConvFwd1x1P0 =
-    ck::tensor_operation::device::ConvolutionForwardSpecialization_t::Filter1x1Pad0;
+    ck::tensor_operation::device::ConvolutionForwardSpecialization::Filter1x1Pad0;
 
 static constexpr auto ConvFwd1x1S1P0 =
-    ck::tensor_operation::device::ConvolutionForwardSpecialization_t::Filter1x1Stride1Pad0;
+    ck::tensor_operation::device::ConvolutionForwardSpecialization::Filter1x1Stride1Pad0;
 
 // Compilation parameters for in[n, hi, wi, c] * wei[k, y, x, c] = out[n, ho, wo, k]
 using device_conv1d_fwd_xdl_nwc_kxc_nwk_bf16_instances = std::tuple<

library/src/tensor_operation_instance/gpu/conv1d_fwd/device_conv1d_fwd_xdl_nwc_kxc_nwk_f16_instance.cpp

@@ -18,13 +18,13 @@ using S = ck::Sequence<Is...>;
 using PassThrough = ck::tensor_operation::element_wise::PassThrough;
 
 static constexpr auto ConvFwdDefault =
-    ck::tensor_operation::device::ConvolutionForwardSpecialization_t::Default;
+    ck::tensor_operation::device::ConvolutionForwardSpecialization::Default;
 
 static constexpr auto ConvFwd1x1P0 =
-    ck::tensor_operation::device::ConvolutionForwardSpecialization_t::Filter1x1Pad0;
+    ck::tensor_operation::device::ConvolutionForwardSpecialization::Filter1x1Pad0;
 
 static constexpr auto ConvFwd1x1S1P0 =
-    ck::tensor_operation::device::ConvolutionForwardSpecialization_t::Filter1x1Stride1Pad0;
+    ck::tensor_operation::device::ConvolutionForwardSpecialization::Filter1x1Stride1Pad0;
 
 // Compilation parameters for in[n, hi, wi, c] * wei[k, y, x, c] = out[n, ho, wo, k]
 using device_conv1d_fwd_xdl_nwc_kxc_nwk_f16_instances = std::tuple<

library/src/tensor_operation_instance/gpu/conv1d_fwd/device_conv1d_fwd_xdl_nwc_kxc_nwk_f32_instance.cpp

@@ -17,13 +17,13 @@ using S = ck::Sequence<Is...>;
 using PassThrough = ck::tensor_operation::element_wise::PassThrough;
 
 static constexpr auto ConvFwdDefault =
-    ck::tensor_operation::device::ConvolutionForwardSpecialization_t::Default;
+    ck::tensor_operation::device::ConvolutionForwardSpecialization::Default;
 
 static constexpr auto ConvFwd1x1P0 =
-    ck::tensor_operation::device::ConvolutionForwardSpecialization_t::Filter1x1Pad0;
+    ck::tensor_operation::device::ConvolutionForwardSpecialization::Filter1x1Pad0;
 
 static constexpr auto ConvFwd1x1S1P0 =
-    ck::tensor_operation::device::ConvolutionForwardSpecialization_t::Filter1x1Stride1Pad0;
+    ck::tensor_operation::device::ConvolutionForwardSpecialization::Filter1x1Stride1Pad0;
 
 //------------------------------------------------------------------------------
 //            Conv1D

library/src/tensor_operation_instance/gpu/conv1d_fwd/device_conv1d_fwd_xdl_nwc_kxc_nwk_int8_instance.cpp

@@ -17,13 +17,13 @@ using S = ck::Sequence<Is...>;
 using PassThrough = ck::tensor_operation::element_wise::PassThrough;
 
 static constexpr auto ConvFwdDefault =
-    ck::tensor_operation::device::ConvolutionForwardSpecialization_t::Default;
+    ck::tensor_operation::device::ConvolutionForwardSpecialization::Default;
 
 static constexpr auto ConvFwd1x1P0 =
-    ck::tensor_operation::device::ConvolutionForwardSpecialization_t::Filter1x1Pad0;
+    ck::tensor_operation::device::ConvolutionForwardSpecialization::Filter1x1Pad0;
 
 static constexpr auto ConvFwd1x1S1P0 =
-    ck::tensor_operation::device::ConvolutionForwardSpecialization_t::Filter1x1Stride1Pad0;
+    ck::tensor_operation::device::ConvolutionForwardSpecialization::Filter1x1Stride1Pad0;
 
 // Compilation parameters for in[n, hi, wi, c] * wei[k, y, x, c] = out[n, ho, wo, k]
 using device_conv1d_fwd_xdl_nwc_kxc_nwk_int8_instances =