---
id: pr-vllm-35765
repo: vllm-project/vllm
pr: 35765
title: 'AITER MLA backend: Avoid CPU sync in _build_decode'
author: pschlan-amd
date: '2026-03-11'
url: https://github.com/vllm-project/vllm/pull/35765
source_category: upstream-code
architectures:
- sm100
tags: []
techniques: []
hardware_features: []
kernel_types: []
languages: []
captured_at: '2026-05-16'
status: merged
merge_sha: eac2dc2b410dc11af4b424802e86ef9d36bac28a
inclusion_reason: defer
changed_paths:
- vllm/v1/attention/backends/mla/rocm_aiter_mla.py
artifact_dir: evidence/pull-bundles/vllm/gh-35765
head_ref_oid: e01ccd6bc099bc847f3918d051658a90f9cac0c9
---
# AITER MLA backend: Avoid CPU sync in _build_decode

- Repository: `vllm-project/vllm`
- PR: [35765](https://github.com/vllm-project/vllm/pull/35765)
- Decision: `defer`
- Reason: defer

## Changed Paths

- `vllm/v1/attention/backends/mla/rocm_aiter_mla.py`

## Evidence Bundle

`evidence/pull-bundles/vllm/gh-35765`
