---
id: pr-tensorrt-llm-13477
repo: NVIDIA/TensorRT-LLM
pr: 13477
title: '[None][perf] Scheme X L2-aware dispatcher and PDL launchers for sparse-attention GVR Top-K'
author: longcheng-nv
date: '2026-04-30'
url: https://github.com/NVIDIA/TensorRT-LLM/pull/13477
source_category: upstream-code
architectures:
- sm100
tags:
- DSA
- attention kernel
- attention_kv
- benchmark kernel
- benchmark_test
- cuda kernel
- moe_routing
- scheduler_autotune
techniques:
- autotuning
- tile-scheduling
hardware_features:
- pdl
kernel_types:
- attention
- decode
- moe
- scheduler
languages:
- cuda-cpp
captured_at: '2026-05-16'
status: merged
merge_sha: 24228e92b61d6c2141562734d9b5e94a42d4a07c
inclusion_reason: Preserve page/KV/layout and plan-run contracts; profile memory traffic separately from math utilization.
changed_paths:
- cpp/tensorrt_llm/kernels/heuristicTopKDecode.cu
- cpp/tensorrt_llm/kernels/heuristic_topk.cuh
- cpp/tensorrt_llm/kernels/indexerTopK.cu
- tensorrt_llm/_torch/attention_backend/sparse/dsa.py
- tensorrt_llm/_torch/custom_ops/cpp_custom_ops.py
artifact_dir: evidence/pull-bundles/tensorrt-llm/gh-13477
head_ref_oid: 2a26e4315e6605c6ef487b8cb7825393e23e871f
---
# [None][perf] Scheme X L2-aware dispatcher and PDL launchers for sparse-attention GVR Top-K

- Repository: `NVIDIA/TensorRT-LLM`
- PR: [13477](https://github.com/NVIDIA/TensorRT-LLM/pull/13477)
- Decision: `Preserve page/KV/layout and plan-run contracts; profile memory traffic separately from math utilization.`
- Reason: Preserve page/KV/layout and plan-run contracts; profile memory traffic separately from math utilization.

## Changed Paths

- `cpp/tensorrt_llm/kernels/heuristicTopKDecode.cu`
- `cpp/tensorrt_llm/kernels/heuristic_topk.cuh`
- `cpp/tensorrt_llm/kernels/indexerTopK.cu`
- `tensorrt_llm/_torch/attention_backend/sparse/dsa.py`
- `tensorrt_llm/_torch/custom_ops/cpp_custom_ops.py`

## Evidence Bundle

`evidence/pull-bundles/tensorrt-llm/gh-13477`
