---
id: pr-vllm-39306
repo: vllm-project/vllm
pr: 39306
title: Use CU_MEMCPY_SRC_ACCESS_ORDER_ANY for batch KV cache swaps
author: Etelis
date: '2026-05-10'
url: https://github.com/vllm-project/vllm/pull/39306
source_category: upstream-code
architectures:
- sm100
- sm90
tags:
- attention_kv
- blackwell
- hopper
- memory_primitives
techniques:
- cache-policy
- pipeline-stages
hardware_features:
- blackwell
- hopper
kernel_types:
- attention
- memory
languages:
- cuda-cpp
captured_at: '2026-05-16'
status: merged
merge_sha: 00b0618a03916f826e7da384a67ddf72f2302d97
inclusion_reason: 'Transfer primitive policy carefully: coalescing, shared-memory staging, partial tiles, and determinism are part of the contract.'
changed_paths:
- csrc/cache.h
- csrc/cache_kernels.cu
- csrc/torch_bindings.cpp
- vllm/_custom_ops.py
- vllm/v1/kv_offload/cpu/gpu_worker.py
artifact_dir: evidence/pull-bundles/vllm/gh-39306
head_ref_oid: 5ec48e26d1486e749efe05b297b1553cc279fab1
---
# Use CU_MEMCPY_SRC_ACCESS_ORDER_ANY for batch KV cache swaps

- Repository: `vllm-project/vllm`
- PR: [39306](https://github.com/vllm-project/vllm/pull/39306)
- Decision: `Transfer primitive policy carefully: coalescing, shared-memory staging, partial tiles, and determinism are part of the contract.`
- Reason: Transfer primitive policy carefully: coalescing, shared-memory staging, partial tiles, and determinism are part of the contract.

## Changed Paths

- `csrc/cache.h`
- `csrc/cache_kernels.cu`
- `csrc/torch_bindings.cpp`
- `vllm/_custom_ops.py`
- `vllm/v1/kv_offload/cpu/gpu_worker.py`

## Evidence Bundle

`evidence/pull-bundles/vllm/gh-39306`
