---
id: pr-tensorrt-llm-13169
repo: NVIDIA/TensorRT-LLM
pr: 13169
title: '[https://nvbugs/5945047][fix] Fix cluster launch enablement for SM120 GPUs in allReduce fusion'
author: ziyixiong-nv
date: '2026-05-13'
url: https://github.com/NVIDIA/TensorRT-LLM/pull/13169
source_category: upstream-code
architectures:
- sm100
- sm90
tags:
- allreduce
- arch_pipeline
- benchmark_test
- blackwell
- cuda kernel
- cutlass
- hopper
- memory_primitives
- moe_routing
- sm100
- sm90
techniques:
- cache-policy
- kernel-fusion
- pipeline-stages
- tile-scheduling
hardware_features:
- blackwell
- hopper
kernel_types:
- memory
- moe
- runtime
languages:
- cuda-cpp
- cute-dsl
captured_at: '2026-05-16'
status: merged
merge_sha: 9d12d1e1bb9310ba56ba6c609b1653048390448a
inclusion_reason: 'Extract the architecture assumption first: SM target, TMA/WGMMA/tcgen path, cluster use, and pipeline stages.'
changed_paths:
- cpp/tensorrt_llm/kernels/communicationKernels/allReduceFusionKernels.cu
- tests/integration/test_lists/waives.txt
artifact_dir: evidence/pull-bundles/tensorrt-llm/gh-13169
head_ref_oid: 42e9227b74a79dd85fe7e18836ced4ca985ca479
---
# [https://nvbugs/5945047][fix] Fix cluster launch enablement for SM120 GPUs in allReduce fusion

- Repository: `NVIDIA/TensorRT-LLM`
- PR: [13169](https://github.com/NVIDIA/TensorRT-LLM/pull/13169)
- Decision: `Extract the architecture assumption first: SM target, TMA/WGMMA/tcgen path, cluster use, and pipeline stages.`
- Reason: Extract the architecture assumption first: SM target, TMA/WGMMA/tcgen path, cluster use, and pipeline stages.

## Changed Paths

- `cpp/tensorrt_llm/kernels/communicationKernels/allReduceFusionKernels.cu`
- `tests/integration/test_lists/waives.txt`

## Evidence Bundle

`evidence/pull-bundles/tensorrt-llm/gh-13169`
