---
id: pr-tensorrt-llm-12503
repo: NVIDIA/TensorRT-LLM
pr: 12503
title: '[https://nvbugs/5983390][perf] Split MLA DSA custom op for piecewise CUDA graph capture'
author: liji-nv
date: '2026-03-31'
url: https://github.com/NVIDIA/TensorRT-LLM/pull/12503
source_category: upstream-code
architectures:
- sm100
tags:
- DSA
- MLA
- attention_kv
- benchmark_test
- memory_primitives
- scheduler_autotune
techniques:
- autotuning
- cache-policy
- fine-grained-quantization
- tile-scheduling
hardware_features:
- fp8
kernel_types:
- attention
- memory
- mla
- scheduler
languages:
- cuda-cpp
captured_at: '2026-05-16'
status: merged
merge_sha: 7e477ba8bfe87b6b7bc6e97d35cb863f0940b1a3
inclusion_reason: Preserve page/KV/layout and plan-run contracts; profile memory traffic separately from math utilization.
changed_paths:
- tensorrt_llm/_torch/attention_backend/sparse/dsa.py
- tensorrt_llm/_torch/compilation/piecewise_optimizer.py
- tensorrt_llm/_torch/compilation/utils.py
- tensorrt_llm/_torch/modules/attention.py
artifact_dir: evidence/pull-bundles/tensorrt-llm/gh-12503
head_ref_oid: c21c41cb6120740712af283b1ee554f172950cc4
---
# [https://nvbugs/5983390][perf] Split MLA DSA custom op for piecewise CUDA graph capture

- Repository: `NVIDIA/TensorRT-LLM`
- PR: [12503](https://github.com/NVIDIA/TensorRT-LLM/pull/12503)
- Decision: `Preserve page/KV/layout and plan-run contracts; profile memory traffic separately from math utilization.`
- Reason: Preserve page/KV/layout and plan-run contracts; profile memory traffic separately from math utilization.

## Changed Paths

- `tensorrt_llm/_torch/attention_backend/sparse/dsa.py`
- `tensorrt_llm/_torch/compilation/piecewise_optimizer.py`
- `tensorrt_llm/_torch/compilation/utils.py`
- `tensorrt_llm/_torch/modules/attention.py`

## Evidence Bundle

`evidence/pull-bundles/tensorrt-llm/gh-12503`
