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gaoqiong
MIGraphX
Commits
cf86db72
"docker/rocm.Dockerfile" did not exist on "5afd0365334c113bdfb295687e353c4001f8f2e6"
Commit
cf86db72
authored
Nov 07, 2018
by
Paul
Browse files
Merge branch 'master' into fp16
parents
af454aeb
414e2fac
Changes
167
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20 changed files
with
52 additions
and
23 deletions
+52
-23
src/targets/cpu/gemm.cpp
src/targets/cpu/gemm.cpp
+2
-1
src/targets/cpu/include/migraph/cpu/context.hpp
src/targets/cpu/include/migraph/cpu/context.hpp
+4
-0
src/targets/cpu/include/migraph/cpu/gemm.hpp
src/targets/cpu/include/migraph/cpu/gemm.hpp
+3
-1
src/targets/cpu/include/migraph/cpu/lowering.hpp
src/targets/cpu/include/migraph/cpu/lowering.hpp
+3
-1
src/targets/cpu/include/migraph/cpu/target.hpp
src/targets/cpu/include/migraph/cpu/target.hpp
+3
-1
src/targets/cpu/lowering.cpp
src/targets/cpu/lowering.cpp
+4
-13
src/targets/cpu/target.cpp
src/targets/cpu/target.cpp
+2
-1
src/targets/gpu/add.cpp
src/targets/gpu/add.cpp
+3
-1
src/targets/gpu/batchnorm.cpp
src/targets/gpu/batchnorm.cpp
+2
-1
src/targets/gpu/concat.cpp
src/targets/gpu/concat.cpp
+2
-1
src/targets/gpu/contiguous.cpp
src/targets/gpu/contiguous.cpp
+2
-1
src/targets/gpu/convolution.cpp
src/targets/gpu/convolution.cpp
+2
-1
src/targets/gpu/device/add.cpp
src/targets/gpu/device/add.cpp
+2
-0
src/targets/gpu/device/add_relu.cpp
src/targets/gpu/device/add_relu.cpp
+2
-0
src/targets/gpu/device/concat.cpp
src/targets/gpu/device/concat.cpp
+2
-0
src/targets/gpu/device/contiguous.cpp
src/targets/gpu/device/contiguous.cpp
+2
-0
src/targets/gpu/device/include/migraph/gpu/device/launch.hpp
src/targets/gpu/device/include/migraph/gpu/device/launch.hpp
+3
-0
src/targets/gpu/device/include/migraph/gpu/device/nary.hpp
src/targets/gpu/device/include/migraph/gpu/device/nary.hpp
+3
-0
src/targets/gpu/device/include/migraph/gpu/device/tensor.hpp
src/targets/gpu/device/include/migraph/gpu/device/tensor.hpp
+3
-0
src/targets/gpu/device/include/migraph/gpu/device/types.hpp
src/targets/gpu/device/include/migraph/gpu/device/types.hpp
+3
-0
No files found.
src/targets/cpu/gemm.cpp
View file @
cf86db72
...
...
@@ -4,6 +4,7 @@
#include <blaze/math/CustomMatrix.h>
namespace
migraph
{
inline
namespace
MIGRAPH_INLINE_NS
{
namespace
cpu
{
template
<
class
T
>
...
...
@@ -93,5 +94,5 @@ void migemm(
}
}
// namespace cpu
}
// namespace MIGRAPH_INLINE_NS
}
// namespace migraph
src/targets/cpu/include/migraph/cpu/context.hpp
View file @
cf86db72
#ifndef MIGRAPH_GUARD_RTGLIB_CONTEXT_HPP
#define MIGRAPH_GUARD_RTGLIB_CONTEXT_HPP
#include <migraph/config.hpp>
namespace
migraph
{
inline
namespace
MIGRAPH_INLINE_NS
{
namespace
cpu
{
struct
context
...
...
@@ -10,6 +13,7 @@ struct context
};
}
// namespace cpu
}
// namespace MIGRAPH_INLINE_NS
}
// namespace migraph
#endif
src/targets/cpu/include/migraph/cpu/gemm.hpp
View file @
cf86db72
...
...
@@ -2,15 +2,17 @@
#define MIGRAPH_GUARD_RTGLIB_CPU_GEMM_HPP
#include <migraph/argument.hpp>
#include <migraph/config.hpp>
namespace
migraph
{
inline
namespace
MIGRAPH_INLINE_NS
{
namespace
cpu
{
void
migemm
(
const
argument
&
c_arg
,
const
argument
&
a_arg
,
const
argument
&
b_arg
,
float
alpha
,
float
beta
);
}
// namespace cpu
}
// namespace MIGRAPH_INLINE_NS
}
// namespace migraph
#endif
src/targets/cpu/include/migraph/cpu/lowering.hpp
View file @
cf86db72
...
...
@@ -2,8 +2,10 @@
#define MIGRAPH_GUARD_RTGLIB_CPU_LOWERING_HPP
#include <migraph/program.hpp>
#include <migraph/config.hpp>
namespace
migraph
{
inline
namespace
MIGRAPH_INLINE_NS
{
namespace
cpu
{
struct
lowering
...
...
@@ -13,7 +15,7 @@ struct lowering
};
}
// namespace cpu
}
// namespace MIGRAPH_INLINE_NS
}
// namespace migraph
#endif
src/targets/cpu/include/migraph/cpu/target.hpp
View file @
cf86db72
...
...
@@ -3,8 +3,10 @@
#include <migraph/program.hpp>
#include <migraph/cpu/context.hpp>
#include <migraph/config.hpp>
namespace
migraph
{
inline
namespace
MIGRAPH_INLINE_NS
{
namespace
cpu
{
struct
target
...
...
@@ -15,7 +17,7 @@ struct target
};
}
// namespace cpu
}
// namespace MIGRAPH_INLINE_NS
}
// namespace migraph
#endif
src/targets/cpu/lowering.cpp
View file @
cf86db72
...
...
@@ -10,6 +10,7 @@
#include <utility>
namespace
migraph
{
inline
namespace
MIGRAPH_INLINE_NS
{
namespace
cpu
{
template
<
typename
T
>
...
...
@@ -606,6 +607,7 @@ struct cpu_apply
apply_map
[
"sin"
]
=
simple_op
<
cpu_unary
<
sin_op
>>
();
apply_map
[
"cos"
]
=
simple_op
<
cpu_unary
<
cos_op
>>
();
apply_map
[
"tan"
]
=
simple_op
<
cpu_unary
<
tan_op
>>
();
apply_map
[
"relu"
]
=
simple_op
<
cpu_unary
<
relu_op
>>
();
apply_map
[
"add"
]
=
simple_op
<
cpu_binary
<
add_op
>>
();
apply_map
[
"sub"
]
=
simple_op
<
cpu_binary
<
sub_op
>>
();
apply_map
[
"mul"
]
=
simple_op
<
cpu_binary
<
mul_op
>>
();
...
...
@@ -619,11 +621,7 @@ struct cpu_apply
init
();
for
(
auto
it
:
iterator_for
(
*
prog
))
{
if
(
it
->
name
()
==
"activation"
)
{
apply_activation
(
it
);
}
else
if
(
it
->
name
()
==
"pooling"
)
if
(
it
->
name
()
==
"pooling"
)
{
apply_pooling
(
it
);
}
...
...
@@ -647,13 +645,6 @@ struct cpu_apply
prog
->
replace_instruction
(
ins
,
T
{
op
},
ins
->
inputs
());
}
void
apply_activation
(
instruction_ref
ins
)
{
auto
&&
op
=
any_cast
<
op
::
activation
>
(
ins
->
get_operator
());
if
(
op
.
mode
==
"relu"
)
prog
->
replace_instruction
(
ins
,
cpu_unary
<
relu_op
>
{},
ins
->
inputs
());
}
void
apply_pooling
(
instruction_ref
ins
)
{
auto
&&
op
=
any_cast
<
op
::
pooling
>
(
ins
->
get_operator
());
...
...
@@ -667,5 +658,5 @@ struct cpu_apply
void
lowering
::
apply
(
program
&
p
)
const
{
cpu_apply
{
&
p
}.
apply
();
}
}
// namespace cpu
}
// namespace MIGRAPH_INLINE_NS
}
// namespace migraph
src/targets/cpu/target.cpp
View file @
cf86db72
...
...
@@ -4,6 +4,7 @@
#include <migraph/auto_contiguous.hpp>
namespace
migraph
{
inline
namespace
MIGRAPH_INLINE_NS
{
namespace
cpu
{
std
::
string
target
::
name
()
const
{
return
"cpu"
;
}
...
...
@@ -14,5 +15,5 @@ std::vector<pass> target::get_passes(migraph::context&) const
}
}
// namespace cpu
}
// namespace MIGRAPH_INLINE_NS
}
// namespace migraph
src/targets/gpu/add.cpp
View file @
cf86db72
#include <migraph/gpu/add.hpp>
#include <migraph/operators.hpp>
#include <migraph/manage_ptr.hpp>
#include <migraph/config.hpp>
#include <migraph/gpu/miopen.hpp>
#include <utility>
namespace
migraph
{
inline
namespace
MIGRAPH_INLINE_NS
{
namespace
gpu
{
shape
hip_add
::
compute_shape
(
const
std
::
vector
<
shape
>&
inputs
)
const
...
...
@@ -49,5 +51,5 @@ argument miopen_add::compute(context& ctx,
}
}
// namespace gpu
}
// namespace MIGRAPH_INLINE_NS
}
// namespace migraph
src/targets/gpu/batchnorm.cpp
View file @
cf86db72
...
...
@@ -5,6 +5,7 @@
#include <utility>
namespace
migraph
{
inline
namespace
MIGRAPH_INLINE_NS
{
namespace
gpu
{
shape
miopen_batch_norm_inference
::
compute_shape
(
const
std
::
vector
<
shape
>&
inputs
)
const
...
...
@@ -42,5 +43,5 @@ argument miopen_batch_norm_inference::compute(context& ctx,
}
}
// namespace gpu
}
// namespace MIGRAPH_INLINE_NS
}
// namespace migraph
src/targets/gpu/concat.cpp
View file @
cf86db72
...
...
@@ -6,6 +6,7 @@
#include <utility>
namespace
migraph
{
inline
namespace
MIGRAPH_INLINE_NS
{
namespace
gpu
{
shape
hip_concat
::
compute_shape
(
std
::
vector
<
shape
>
inputs
)
const
...
...
@@ -23,5 +24,5 @@ argument hip_concat::compute(context& ctx,
}
}
// namespace gpu
}
// namespace MIGRAPH_INLINE_NS
}
// namespace migraph
src/targets/gpu/contiguous.cpp
View file @
cf86db72
...
...
@@ -5,6 +5,7 @@
#include <utility>
namespace
migraph
{
inline
namespace
MIGRAPH_INLINE_NS
{
namespace
gpu
{
shape
miopen_contiguous
::
compute_shape
(
const
std
::
vector
<
shape
>&
inputs
)
const
...
...
@@ -24,5 +25,5 @@ argument miopen_contiguous::compute(context& ctx,
}
}
// namespace gpu
}
// namespace MIGRAPH_INLINE_NS
}
// namespace migraph
src/targets/gpu/convolution.cpp
View file @
cf86db72
...
...
@@ -5,6 +5,7 @@
#include <utility>
namespace
migraph
{
inline
namespace
MIGRAPH_INLINE_NS
{
namespace
gpu
{
shape
miopen_convolution
::
compute_shape
(
const
std
::
vector
<
shape
>&
inputs
)
const
...
...
@@ -81,5 +82,5 @@ shape miopen_convolution::compile(context& ctx,
}
}
// namespace gpu
}
// namespace MIGRAPH_INLINE_NS
}
// namespace migraph
src/targets/gpu/device/add.cpp
View file @
cf86db72
...
...
@@ -2,6 +2,7 @@
#include <migraph/gpu/device/nary.hpp>
namespace
migraph
{
inline
namespace
MIGRAPH_INLINE_NS
{
namespace
gpu
{
namespace
device
{
...
...
@@ -21,4 +22,5 @@ void add(hipStream_t stream,
}
// namespace device
}
// namespace gpu
}
// namespace MIGRAPH_INLINE_NS
}
// namespace migraph
src/targets/gpu/device/add_relu.cpp
View file @
cf86db72
...
...
@@ -2,6 +2,7 @@
#include <migraph/gpu/device/nary.hpp>
namespace
migraph
{
inline
namespace
MIGRAPH_INLINE_NS
{
namespace
gpu
{
namespace
device
{
...
...
@@ -26,4 +27,5 @@ void add_relu(hipStream_t stream,
}
// namespace device
}
// namespace gpu
}
// namespace MIGRAPH_INLINE_NS
}
// namespace migraph
src/targets/gpu/device/concat.cpp
View file @
cf86db72
...
...
@@ -5,6 +5,7 @@
#include <migraph/gpu/device/launch.hpp>
namespace
migraph
{
inline
namespace
MIGRAPH_INLINE_NS
{
namespace
gpu
{
namespace
device
{
...
...
@@ -33,4 +34,5 @@ argument concat(hipStream_t stream,
}
// namespace device
}
// namespace gpu
}
// namespace MIGRAPH_INLINE_NS
}
// namespace migraph
src/targets/gpu/device/contiguous.cpp
View file @
cf86db72
...
...
@@ -3,6 +3,7 @@
#include <migraph/gpu/device/nary.hpp>
namespace
migraph
{
inline
namespace
MIGRAPH_INLINE_NS
{
namespace
gpu
{
namespace
device
{
...
...
@@ -13,4 +14,5 @@ void contiguous(hipStream_t stream, argument result, argument arg)
}
// namespace device
}
// namespace gpu
}
// namespace MIGRAPH_INLINE_NS
}
// namespace migraph
src/targets/gpu/device/include/migraph/gpu/device/launch.hpp
View file @
cf86db72
...
...
@@ -2,8 +2,10 @@
#define MIGRAPH_GUARD_RTGLIB_DEVICE_LAUNCH_HPP
#include <hip/hip_runtime.h>
#include <migraph/config.hpp>
namespace
migraph
{
inline
namespace
MIGRAPH_INLINE_NS
{
namespace
gpu
{
namespace
device
{
...
...
@@ -58,6 +60,7 @@ inline auto gs_launch(hipStream_t stream, std::size_t n, std::size_t local = 102
}
// namespace device
}
// namespace gpu
}
// namespace MIGRAPH_INLINE_NS
}
// namespace migraph
#endif
src/targets/gpu/device/include/migraph/gpu/device/nary.hpp
View file @
cf86db72
...
...
@@ -6,8 +6,10 @@
#include <migraph/gpu/device/types.hpp>
#include <migraph/functional.hpp>
#include <migraph/ranges.hpp>
#include <migraph/config.hpp>
namespace
migraph
{
inline
namespace
MIGRAPH_INLINE_NS
{
namespace
gpu
{
namespace
device
{
...
...
@@ -394,6 +396,7 @@ inline auto nary(hipStream_t stream,
}
// namespace device
}
// namespace gpu
}
// namespace MIGRAPH_INLINE_NS
}
// namespace migraph
#endif
src/targets/gpu/device/include/migraph/gpu/device/tensor.hpp
View file @
cf86db72
...
...
@@ -3,8 +3,10 @@
#include <hip/hip_runtime.h>
#include <migraph/functional.hpp>
#include <migraph/config.hpp>
namespace
migraph
{
inline
namespace
MIGRAPH_INLINE_NS
{
namespace
gpu
{
namespace
device
{
...
...
@@ -85,6 +87,7 @@ struct hip_tensor_descriptor
}
// namespace device
}
// namespace gpu
}
// namespace MIGRAPH_INLINE_NS
}
// namespace migraph
#endif
src/targets/gpu/device/include/migraph/gpu/device/types.hpp
View file @
cf86db72
...
...
@@ -9,8 +9,10 @@
#define MIGRAPH_GUARD_RTGLIB_GPU_DEVICE_TYPES_HPP
#include <migraph/half.hpp>
#include <migraph/config.hpp>
namespace
migraph
{
inline
namespace
MIGRAPH_INLINE_NS
{
namespace
gpu
{
namespace
device
{
...
...
@@ -75,6 +77,7 @@ device_type<T>* device_cast(T* x)
}
// namespace device
}
// namespace gpu
}
// namespace MIGRAPH_INLINE_NS
}
// namespace migraph
#endif
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